diff options
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/mips/interp.c | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 56bf291..a69ac32 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,8 @@ +Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * interp.c (decode_coproc): Clarify warning about unsuported MTC0, + MFC0. + Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com> * gencode.c (build_instruction): Use SIGNED64 for 64 bit diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 6ace9e3..9336ce3 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -4127,9 +4127,9 @@ decode_coproc(instruction) /* CPR[0,rd] = GPR[rt]; */ default: if (code == 0x00) - callback->printf_filtered(callback,"Warning: MFC0 %d,%d not handled yet (architecture specific)\n",rt,rd); + callback->printf_filtered(callback,"Warning: MFC0 %d,%d ignored (architecture specific)\n",rt,rd); else - callback->printf_filtered(callback,"Warning: MTC0 %d,%d not handled yet (architecture specific)\n",rt,rd); + callback->printf_filtered(callback,"Warning: MTC0 %d,%d ignored (architecture specific)\n",rt,rd); } } else if (code == 0x10 && (instruction & 0x3f) == 0x18) |