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Diffstat (limited to 'sim/mips/ChangeLog')
| -rw-r--r-- | sim/mips/ChangeLog | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index ac9e4b1..a29f164 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,15 @@ +1998-12-12 Gavin Romig-Koch <gavin@cygnus.com> + +start-sanitize-vr4xxx + * configure.in (mips64vr4xxx): Enable TARGET_ENABLE_FR. + Set mips_fpu, and mips_fpu_bitsize. + Set sim_gen, and sim_igen_machine. + * configure: Rebuild. + +end-sanitize-vr4xxx + * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts. + * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR. + 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com> * mips/interp.c (DEBUG): Cleanups. |