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-rw-r--r--sim/m32r/ChangeLog4
-rw-r--r--sim/m32r/sim-if.c2
2 files changed, 5 insertions, 1 deletions
diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog
index b695a25..9faeeb8 100644
--- a/sim/m32r/ChangeLog
+++ b/sim/m32r/ChangeLog
@@ -1,3 +1,7 @@
+Thu Sep 4 10:30:02 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-if.c (sim_open): Pass zero modulo arg to sim_core_attach.
+
Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
diff --git a/sim/m32r/sim-if.c b/sim/m32r/sim-if.c
index a273347..28f0637 100644
--- a/sim/m32r/sim-if.c
+++ b/sim/m32r/sim-if.c
@@ -81,7 +81,7 @@ sim_open (kind, callback, abfd, argv)
/* FIXME:wip */
sim_core_attach (sd, NULL, attach_raw_memory, access_read_write_exec,
- 0, 0, M32R_DEFAULT_MEM_SIZE, NULL, NULL);
+ 0, 0, M32R_DEFAULT_MEM_SIZE, 0, NULL, NULL);
/* Only needed for profiling, but the structure member is small. */
for (i = 0; i < MAX_NR_PROCESSORS; ++i)