diff options
Diffstat (limited to 'sim/m32r/tconfig.in')
| -rw-r--r-- | sim/m32r/tconfig.in | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/sim/m32r/tconfig.in b/sim/m32r/tconfig.in new file mode 100644 index 0000000..b6f03d7 --- /dev/null +++ b/sim/m32r/tconfig.in @@ -0,0 +1,35 @@ +/* M32R target configuration file. -*- C -*- */ + +/* Define this if the simulator can vary the size of memory. + See the xxx simulator for an example. + This enables the `-m size' option. + The memory size is stored in STATE_MEM_SIZE. */ +/* Not used for M32R since we use the memory module. */ +/* #define SIM_HAVE_MEM_SIZE */ + +/* For MSPR support. FIXME: revisit. */ +#define WITH_DEVICES 1 + +/* The semantic code should probably always use a switch(). + However, in case that's not possible in some circumstance, we allow + the target to choose. Perhaps this can be autoconf'd on whether the + switch is too big? I can't (yet) think of a reason for allowing the + user to choose, though the developer may certainly wish to. */ +#ifdef WANT_CPU_M32R +#define WITH_FAST 1 +#define WITH_SEM_SWITCH_FULL 0 +#define WITH_SEM_SWITCH_FAST 1 +#endif + +#ifdef WANT_CPU_M32RX +#define HAVE_PARALLEL_EXEC +#define WITH_FAST 0 +#define WITH_SEM_SWITCH_FULL 1 +#define WITH_SEM_SWITCH_FAST 0 +/* The m32rx currently never uses the scache. So hardcode this off. */ +#undef WITH_SCACHE +#define WITH_SCACHE 0 +#endif + +/* ??? Temporary hack until model support unified. */ +#define SIM_HAVE_MODEL |