diff options
Diffstat (limited to 'sim/m32r/Makefile.in')
| -rw-r--r-- | sim/m32r/Makefile.in | 59 |
1 files changed, 58 insertions, 1 deletions
diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in index 3c005b1..256c3e3 100644 --- a/sim/m32r/Makefile.in +++ b/sim/m32r/Makefile.in @@ -21,6 +21,7 @@ ## COMMON_PRE_CONFIG_FRAG M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o +M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o CONFIG_DEVICES = dv-sockser.o CONFIG_DEVICES = @@ -36,6 +37,7 @@ SIM_OBJS = \ cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ sim-if.o arch.o \ $(M32R_OBJS) \ + $(M32RX_OBJS) \ traps.o devices.o \ $(CONFIG_DEVICES) @@ -87,9 +89,64 @@ decode.o: decode.c $(M32RBF_INCLUDE_DEPS) sem.o: sem.c $(M32RBF_INCLUDE_DEPS) model.o: model.c $(M32RBF_INCLUDE_DEPS) +# M32RX objs + +M32RXF_INCLUDE_DEPS = \ + $(CGEN_MAIN_CPU_DEPS) \ + cpux.h decodex.h engx.h + +m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS) + +# FIXME: Use of `mono' is wip. +mloopx.c engx.h: stamp-xmloop +stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile + $(SHELL) $(srccom)/genmloop.sh \ + -mono -no-fast -pbb -parallel-write -switch semx-switch.c \ + -cpu m32rxf -infile $(srcdir)/mloopx.in + $(SHELL) $(srcroot)/move-if-change eng.hin engx.h + $(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c + touch stamp-xmloop +mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS) + +cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS) +decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS) +semx.o: semx.c $(M32RXF_INCLUDE_DEPS) +modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS) m32r-clean: rm -f mloop.c eng.h stamp-mloop + rm -f mloopx.c engx.h stamp-xmloop +# start-sanitize-cygnus + rm -f stamp-arch stamp-cpu stamp-xcpu +# end-sanitize-cygnus rm -f tmp-* - +# start-sanitize-cygnus +# cgen support, enable with --enable-cgen-maint +CGEN_MAINT = ; @true +# The following line is commented in or out depending upon --enable-cgen-maint. +@CGEN_MAINT@CGEN_MAINT = + +stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ + FLAGS="with-scache with-profile=fn" + touch stamp-arch +arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch + @true + +stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ + cpu=m32rbf mach=m32r SUFFIX= \ + FLAGS="with-scache with-profile=fn" \ + EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" + touch stamp-cpu +cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu + @true + +stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ + cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)" + touch stamp-xcpu +cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu + @true +# end-sanitize-cygnus |