diff options
Diffstat (limited to 'sim/i960')
| -rw-r--r-- | sim/i960/ChangeLog | 10 | ||||
| -rw-r--r-- | sim/i960/i960-desc.h | 1 | ||||
| -rw-r--r-- | sim/i960/sem-switch.c | 16 | ||||
| -rw-r--r-- | sim/i960/sem.c | 20 | ||||
| -rw-r--r-- | sim/i960/traps.c | 5 |
5 files changed, 35 insertions, 17 deletions
diff --git a/sim/i960/ChangeLog b/sim/i960/ChangeLog index c5e2809..2986bf7 100644 --- a/sim/i960/ChangeLog +++ b/sim/i960/ChangeLog @@ -1,3 +1,13 @@ +1999-10-04 Doug Evans <devans@casey.cygnus.com> + + * sem.c,sem-switch.c: Rebuild. + * traps.c (sim_engine_invalid_insn): New arg `vpc'. Change type of + result to SEM_PC. Return vpc. + +Wed Sep 29 14:46:36 1999 Dave Brolley <brolley@cygnus.com> + + * traps.c (sim_engine_invalid_insn): Return PC. + Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes. diff --git a/sim/i960/i960-desc.h b/sim/i960/i960-desc.h index 40ca227..40b6599 100644 --- a/sim/i960/i960-desc.h +++ b/sim/i960/i960-desc.h @@ -49,6 +49,7 @@ with this program; if not, write to the Free Software Foundation, Inc., e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands we can't hash on everything up to the space. */ #define CGEN_MNEMONIC_OPERANDS + /* Maximum number of operands any insn or macro-insn has. */ #define CGEN_MAX_INSN_OPERANDS 16 diff --git a/sim/i960/sem-switch.c b/sim/i960/sem-switch.c index c610249..e1fd336 100644 --- a/sim/i960/sem-switch.c +++ b/sim/i960/sem-switch.c @@ -396,13 +396,15 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) vpc = SEM_NEXT_VPC (sem_arg, pc, 0); { -#if WITH_SCACHE - /* Update the recorded pc in the cpu state struct. */ + /* Update the recorded pc in the cpu state struct. + Only necessary for WITH_SCACHE case, but to avoid the + conditional compilation .... */ SET_H_PC (pc); -#endif - sim_engine_invalid_insn (current_cpu, pc); - sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n"); - /* NOTREACHED */ + /* Virtual insns have zero size. Overwrite vpc with address of next insn + using the default-insn-bitsize spec. When executing insns in parallel + we may want to queue the fault and continue execution. */ + vpc = SEM_NEXT_VPC (sem_arg, pc, 4); + vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); } #undef FLD @@ -7326,7 +7328,7 @@ CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31 IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); -do { } while (0); /*nop*/ +((void) 0); /*nop*/ #undef FLD } diff --git a/sim/i960/sem.c b/sim/i960/sem.c index 5498817..262340e 100644 --- a/sim/i960/sem.c +++ b/sim/i960/sem.c @@ -55,13 +55,15 @@ SEM_FN_NAME (i960base,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); { -#if WITH_SCACHE - /* Update the recorded pc in the cpu state struct. */ + /* Update the recorded pc in the cpu state struct. + Only necessary for WITH_SCACHE case, but to avoid the + conditional compilation .... */ SET_H_PC (pc); -#endif - sim_engine_invalid_insn (current_cpu, pc); - sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n"); - /* NOTREACHED */ + /* Virtual insns have zero size. Overwrite vpc with address of next insn + using the default-insn-bitsize spec. When executing insns in parallel + we may want to queue the fault and continue execution. */ + vpc = SEM_NEXT_VPC (sem_arg, pc, 4); + vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); } return vpc; @@ -7577,7 +7579,7 @@ SEM_FN_NAME (i960base,flushreg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) IADDR UNUSED pc = abuf->addr; SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); -do { } while (0); /*nop*/ +((void) 0); /*nop*/ return vpc; #undef FLD @@ -7897,7 +7899,9 @@ SEM_FN_NAME (i960base,init_idesc_table) (SIM_CPU *current_cpu) for (sf = &sem_fns[0]; sf->fn != 0; ++sf) { - int valid_p = CGEN_INSN_MACH_HAS_P (idesc_table[sf->index].idata, mach_num); + const CGEN_INSN *insn = idesc_table[sf->index].idata; + int valid_p = (CGEN_INSN_VIRTUAL_P (insn) + || CGEN_INSN_MACH_HAS_P (insn, mach_num)); #if FAST_P if (valid_p) idesc_table[sf->index].sem_fast = sf->fn; diff --git a/sim/i960/traps.c b/sim/i960/traps.c index 5b62ca1..570fc95 100644 --- a/sim/i960/traps.c +++ b/sim/i960/traps.c @@ -23,8 +23,8 @@ with this program; if not, write to the Free Software Foundation, Inc., /* The semantic code invokes this for illegal (unrecognized) instructions. */ -void -sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia) +SEM_PC +sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc) { SIM_DESC sd = CPU_STATE (current_cpu); @@ -46,6 +46,7 @@ sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia) else #endif sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL); + return vpc; } /* Process an address exception. */ |