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-rw-r--r--sim/fr30/fr30-sim.h192
1 files changed, 96 insertions, 96 deletions
diff --git a/sim/fr30/fr30-sim.h b/sim/fr30/fr30-sim.h
index dbb8117..f1d9109 100644
--- a/sim/fr30/fr30-sim.h
+++ b/sim/fr30/fr30-sim.h
@@ -1,96 +1,96 @@
-/* collection of junk waiting time to sort out
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef FR30_SIM_H
-#define FR30_SIM_H
-
-/* gdb register numbers */
-#define PC_REGNUM 16
-#define PS_REGNUM 17
-#define TBR_REGNUM 18
-#define RP_REGNUM 19
-#define SSP_REGNUM 20
-#define USP_REGNUM 21
-#define MDH_REGNUM 22
-#define MDL_REGNUM 23
-
-extern BI fr30bf_h_sbit_get_handler (SIM_CPU *);
-extern void fr30bf_h_sbit_set_handler (SIM_CPU *, BI);
-
-extern UQI fr30bf_h_ccr_get_handler (SIM_CPU *);
-extern void fr30bf_h_ccr_set_handler (SIM_CPU *, UQI);
-
-extern UQI fr30bf_h_scr_get_handler (SIM_CPU *);
-extern void fr30bf_h_scr_set_handler (SIM_CPU *, UQI);
-
-extern UQI fr30bf_h_ilm_get_handler (SIM_CPU *);
-extern void fr30bf_h_ilm_set_handler (SIM_CPU *, UQI);
-
-extern USI fr30bf_h_ps_get_handler (SIM_CPU *);
-extern void fr30bf_h_ps_set_handler (SIM_CPU *, USI);
-
-extern SI fr30bf_h_dr_get_handler (SIM_CPU *, UINT);
-extern void fr30bf_h_dr_set_handler (SIM_CPU *, UINT, SI);
-
-#define GETTWI GETTSI
-#define SETTWI SETTSI
-
-/* Hardware/device support.
- ??? Will eventually want to move device stuff to config files. */
-
-/* Special purpose traps. */
-#define TRAP_SYSCALL 10
-#define TRAP_BREAKPOINT 9
-
-/* Support for the MCCR register (Cache Control Register) is needed in order
- for overlays to work correctly with the scache: cached instructions need
- to be flushed when the instruction space is changed at runtime. */
-
-/* Cache Control Register */
-#define MCCR_ADDR 0xffffffff
-#define MCCR_CP 0x80
-/* not supported */
-#define MCCR_CM0 2
-#define MCCR_CM1 1
-
-/* Serial device addresses. */
-/* These are the values for the MSA2000 board.
- ??? Will eventually need to move this to a config file. */
-#define UART_INCHAR_ADDR 0xff004009
-#define UART_OUTCHAR_ADDR 0xff004007
-#define UART_STATUS_ADDR 0xff004002
-
-#define UART_INPUT_READY 0x4
-#define UART_OUTPUT_READY 0x1
-
-/* Start address and length of all device support. */
-#define FR30_DEVICE_ADDR 0xff000000
-#define FR30_DEVICE_LEN 0x00ffffff
-
-/* sim_core_attach device argument. */
-extern device fr30_devices;
-
-/* FIXME: Temporary, until device support ready. */
-struct _device { int foo; };
-
-/* Handle the trap insn. */
-USI fr30_int (SIM_CPU *, PCADDR, int);
-
-#endif /* FR30_SIM_H */
+// OBSOLETE /* collection of junk waiting time to sort out
+// OBSOLETE Copyright (C) 1998, 1999 Free Software Foundation, Inc.
+// OBSOLETE Contributed by Cygnus Solutions.
+// OBSOLETE
+// OBSOLETE This file is part of the GNU Simulators.
+// OBSOLETE
+// OBSOLETE This program is free software; you can redistribute it and/or modify
+// OBSOLETE it under the terms of the GNU General Public License as published by
+// OBSOLETE the Free Software Foundation; either version 2, or (at your option)
+// OBSOLETE any later version.
+// OBSOLETE
+// OBSOLETE This program is distributed in the hope that it will be useful,
+// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of
+// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// OBSOLETE GNU General Public License for more details.
+// OBSOLETE
+// OBSOLETE You should have received a copy of the GNU General Public License along
+// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,
+// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+// OBSOLETE
+// OBSOLETE #ifndef FR30_SIM_H
+// OBSOLETE #define FR30_SIM_H
+// OBSOLETE
+// OBSOLETE /* gdb register numbers */
+// OBSOLETE #define PC_REGNUM 16
+// OBSOLETE #define PS_REGNUM 17
+// OBSOLETE #define TBR_REGNUM 18
+// OBSOLETE #define RP_REGNUM 19
+// OBSOLETE #define SSP_REGNUM 20
+// OBSOLETE #define USP_REGNUM 21
+// OBSOLETE #define MDH_REGNUM 22
+// OBSOLETE #define MDL_REGNUM 23
+// OBSOLETE
+// OBSOLETE extern BI fr30bf_h_sbit_get_handler (SIM_CPU *);
+// OBSOLETE extern void fr30bf_h_sbit_set_handler (SIM_CPU *, BI);
+// OBSOLETE
+// OBSOLETE extern UQI fr30bf_h_ccr_get_handler (SIM_CPU *);
+// OBSOLETE extern void fr30bf_h_ccr_set_handler (SIM_CPU *, UQI);
+// OBSOLETE
+// OBSOLETE extern UQI fr30bf_h_scr_get_handler (SIM_CPU *);
+// OBSOLETE extern void fr30bf_h_scr_set_handler (SIM_CPU *, UQI);
+// OBSOLETE
+// OBSOLETE extern UQI fr30bf_h_ilm_get_handler (SIM_CPU *);
+// OBSOLETE extern void fr30bf_h_ilm_set_handler (SIM_CPU *, UQI);
+// OBSOLETE
+// OBSOLETE extern USI fr30bf_h_ps_get_handler (SIM_CPU *);
+// OBSOLETE extern void fr30bf_h_ps_set_handler (SIM_CPU *, USI);
+// OBSOLETE
+// OBSOLETE extern SI fr30bf_h_dr_get_handler (SIM_CPU *, UINT);
+// OBSOLETE extern void fr30bf_h_dr_set_handler (SIM_CPU *, UINT, SI);
+// OBSOLETE
+// OBSOLETE #define GETTWI GETTSI
+// OBSOLETE #define SETTWI SETTSI
+// OBSOLETE
+// OBSOLETE /* Hardware/device support.
+// OBSOLETE ??? Will eventually want to move device stuff to config files. */
+// OBSOLETE
+// OBSOLETE /* Special purpose traps. */
+// OBSOLETE #define TRAP_SYSCALL 10
+// OBSOLETE #define TRAP_BREAKPOINT 9
+// OBSOLETE
+// OBSOLETE /* Support for the MCCR register (Cache Control Register) is needed in order
+// OBSOLETE for overlays to work correctly with the scache: cached instructions need
+// OBSOLETE to be flushed when the instruction space is changed at runtime. */
+// OBSOLETE
+// OBSOLETE /* Cache Control Register */
+// OBSOLETE #define MCCR_ADDR 0xffffffff
+// OBSOLETE #define MCCR_CP 0x80
+// OBSOLETE /* not supported */
+// OBSOLETE #define MCCR_CM0 2
+// OBSOLETE #define MCCR_CM1 1
+// OBSOLETE
+// OBSOLETE /* Serial device addresses. */
+// OBSOLETE /* These are the values for the MSA2000 board.
+// OBSOLETE ??? Will eventually need to move this to a config file. */
+// OBSOLETE #define UART_INCHAR_ADDR 0xff004009
+// OBSOLETE #define UART_OUTCHAR_ADDR 0xff004007
+// OBSOLETE #define UART_STATUS_ADDR 0xff004002
+// OBSOLETE
+// OBSOLETE #define UART_INPUT_READY 0x4
+// OBSOLETE #define UART_OUTPUT_READY 0x1
+// OBSOLETE
+// OBSOLETE /* Start address and length of all device support. */
+// OBSOLETE #define FR30_DEVICE_ADDR 0xff000000
+// OBSOLETE #define FR30_DEVICE_LEN 0x00ffffff
+// OBSOLETE
+// OBSOLETE /* sim_core_attach device argument. */
+// OBSOLETE extern device fr30_devices;
+// OBSOLETE
+// OBSOLETE /* FIXME: Temporary, until device support ready. */
+// OBSOLETE struct _device { int foo; };
+// OBSOLETE
+// OBSOLETE /* Handle the trap insn. */
+// OBSOLETE USI fr30_int (SIM_CPU *, PCADDR, int);
+// OBSOLETE
+// OBSOLETE #endif /* FR30_SIM_H */