diff options
Diffstat (limited to 'sim/d30v')
| -rw-r--r-- | sim/d30v/ChangeLog | 1390 | ||||
| -rw-r--r-- | sim/d30v/Makefile.in | 217 | ||||
| -rw-r--r-- | sim/d30v/acconfig.h | 15 | ||||
| -rw-r--r-- | sim/d30v/alu.h | 106 | ||||
| -rw-r--r-- | sim/d30v/config.in | 162 | ||||
| -rwxr-xr-x | sim/d30v/configure | 4459 | ||||
| -rw-r--r-- | sim/d30v/configure.in | 40 | ||||
| -rw-r--r-- | sim/d30v/cpu.c | 172 | ||||
| -rw-r--r-- | sim/d30v/cpu.h | 249 | ||||
| -rw-r--r-- | sim/d30v/d30v-insns | 2421 | ||||
| -rw-r--r-- | sim/d30v/dc-short | 22 | ||||
| -rw-r--r-- | sim/d30v/engine.c | 496 | ||||
| -rw-r--r-- | sim/d30v/ic-d30v | 80 | ||||
| -rw-r--r-- | sim/d30v/sim-calls.c | 364 | ||||
| -rw-r--r-- | sim/d30v/sim-main.h | 82 | ||||
| -rw-r--r-- | sim/d30v/tconfig.in | 8 |
16 files changed, 0 insertions, 10283 deletions
diff --git a/sim/d30v/ChangeLog b/sim/d30v/ChangeLog deleted file mode 100644 index d1c1df5..0000000 --- a/sim/d30v/ChangeLog +++ /dev/null @@ -1,1390 +0,0 @@ -2002-07-13 Andrew Cagney <ac131313@redhat.com> - - * cpu.h: Mark file obsolete. - * sim-main.h, sim-calls.c, engine.c, cpu.c, alu.h: Ditto. - * dc-short, ic-d30v, d30v-insns, Makefile.in: Ditto. - -2002-06-16 Andrew Cagney <ac131313@redhat.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -2000-07-05 Nick Clifton <nickc@cygnus.com> - - * d30v-insns: Change minimum loop size limit to 0x10. - -Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -2000-04-12 Frank Ch. Eigler <fche@redhat.com> - - * cpu.h (GPR_CLEAR): New macro. - (GPR_SET): Removed macro. - -Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Sep 1 11:38:21 1999 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns: Cast CIA to LONG in printfs. - -Tue Aug 31 01:32:22 1999 Andrew Cagney <cagney@b1.cygnus.com> - - * cpu.h (unqueue_writes): Add declaration. - -1999-05-27 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (do_repeat): Print a warning if a REPEAT or REPEATI - instruction loop is too small. - -1999-05-08 Felix Lee <flee@cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -1999-03-16 Martin Hunt <hunt@cygnus.com> - From Frank Ch. Eigler <fche@cygnus.com> - - * cpu.h (mvtsys_left_p): New flag for MVTSYS instruction history. - * d30v-insns (mvtsys): Set this flag instead of left_kills_right_p. - (do_sath): Detect MVTSYS by new flag. - * engine.c (unqueue_writes): Detect MVTSYS by new flag. - (do_2_short, do_parallel): Initialize new flag. - -1999-02-26 Frank Ch. Eigler <fche@cygnus.com> - - * tconfig.in (SIM_HANDLES_LMA): Make it so. - -1999-01-12 Frank Ch. Eigler <fche@cygnus.com> - - * engine.c (unqueue_writes): Make PSW conflict resolution code - conditional - disable it for MVTSYS || insn case. - -1999-01-11 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG - update. - * engine.c (unqueue_writes): Make non-static. Remove PSW_V/VA - special case. - (do_parallel): Don't drain PSW write queue for MVTSYS || insn. - -1999-01-07 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_ld2h): Sign-extend loaded half-words. - -1999-01-05 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_ld2h): Read memory in word units. - (do_ld4bh): Ditto. Correct sign extension. - (do_ld4bhu): Ditto. - (do_st2h): Write memory in word units. - (do_st4hb): Ditto. - (st4hb): Correct mnemonic in igen template. - -1998-12-08 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn. - (do_ld2w): Ditto. - (do_ld4bh): Ditto. - (do_ld4bhu): Ditto. - (do_mulx2h): Ditto. - -1998-12-03 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_repeat): Don't set RP for repeat count 1. - -1998-12-03 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_src): Treat shift count -32 naturally instead of - producing zero result. - -1998-11-22 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_src): Limit SRC shift count to -32 .. 31. - -1998-11-16 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2. - * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here. - -1998-11-12 Frank Ch. Eigler <fche@cygnus.com> - - * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated - RPT_IS_CALL macro. - * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call. - * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto. - (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto. - * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead. - (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto. - * engine.c (sim_engine_run): Remove conditional setting of R62 based - upon RPT_IS_CALL. - -1998-11-08 Frank Ch. Eigler <fche@cygnus.com> - - * sim-calls.c (sim_open): Add dummy memory range over control - register region (0x40000000..0x4000FFFF). - -1998-11-06 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0. - -Tue Oct 13 11:01:16 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift - count -32 to produce zero result. - (do_src): Ditto for shift count == -64. - -Mon Oct 12 23:04:11 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking. - (do_sra,do_srl): Use loop to limit shift count to -32 .. 31. - (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31. - (sra2h,srl2h): Use loop to limit shift count to -16 .. 15. - (do_src): Use loop to limit shift count to -64 .. 63. - -Fri Oct 9 16:46:52 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim-calls.c (get_insn_name): New fn. - (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS. - * sim-main.h (MAX_INSNS,INSN_NAME): Delete. - -Mon Sep 28 10:43:28 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use - correct MSB bit numbers for sign extension masks. - -Fri Sep 25 17:32:27 1998 Frank Ch. Eigler <fche@cygnus.com> - - * engine.c (do_parallel): Unqueue writes if MU instruction was - a MVTSYS, as identified by its left_kills_right_p side-effect. - -Fri Sep 25 12:31:34 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask - shift/rotate counts to number of bits in width of operand; no - longer saturate at maxima. - -Tue Jul 14 18:39:23 1998 Frank Ch. Eigler <fche@cygnus.com> - - * cpu.h (left_kills_right_p): New flag for non-branch instructions - that, when executed in left slot of a -> sequential pair, kill the - right slot. - * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands. - * engine.c (do_2_short): Respect flag. - -Thu Jun 4 16:48:58 1998 David Taylor <taylor@texas.cygnus.com> - - * d30v-insns (do_trap): don't save the bPSW and PSW based on - current values because an instruction done in parallel with - the trap might change them, instead set a flag do that - unqueue_writes will take care of it. - * engine.c (unqueue_writes): finish trap handling - * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP - to make use of it; set by do_trap, tested and cleared by - unqueue_writes. - -Tue May 19 16:07:04 1998 Frank Ch. Eigler <fche@cygnus.com> - - * engine.c (unqueue_writes): Suppress the all enqueued writes to - the same flags in PSW except the last. - -Fri May 15 11:38:59 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (RETI): Correct instruction spelling to "reit". - -Thu May 14 09:34:20 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (dbt): Handle DBT at end of repeat block. - (do_trap, dbt): Clear PSW_RP if at end of repeat block. - -Thu May 14 07:41:41 1998 Frank Ch. Eigler <fche@cygnus.com> - - * engine.c (sim_engine_run): Trigger DDBT based on previous PC, - instead of next PC. - -Wed May 13 11:03:40 1998 Frank Ch. Eigler <fche@cygnus.com> - - * engine.c (sim_engine_run): Move DDBT handling after instruction - decode/execute stage. - -Tue May 12 12:14:53 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to - properly handle negative saturation inputs. - -Tue May 12 11:11:26 1998 Frank Ch. Eigler <fche@cygnus.com> - - * engine.c (sim_engine_run): Decrement RPT_C only under more - restricted conditions. - -Mon May 11 17:33:46 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data - unchanged. - -Mon May 11 16:27:04 1998 Frank Ch. Eigler <fche@cygnus.com> - - * engine.c (sim_engine_run): Implement DDBT (debugger debug trap) - functionality. - -Fri May 8 16:44:19 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_trap): Set bPC to RPT_S if trap is last - instruction in repeat block. - (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch - is last instruction in repeat block. - -Fri May 8 11:06:50 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag - macro. - * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit. - -Wed May 6 19:40:56 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim-main.h (INSN_NAME): New arg `cpu'. - -Fri May 1 14:24:30 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns: Fix parameter list to sim_engine_abort. - -Thu Apr 30 14:28:00 1998 Fred Fish <fnf@cygnus.com> - - * d30v-insns (do_sath): Add additional argument that determines - whether or not the F4 (PSW_S) bit in the PSW is updated. - (SAT2H): Do not update PSW_S bit. - (SATHp): Do update PSW_S bit. - -Tue Apr 28 23:36:00 1998 Fred Fish <fnf@cygnus.com> - - * d30v-insns (SRAHp, SRLHp): Immediate values are signed 6 bit - values, not 5 bit values. - -Wed Apr 29 12:57:55 1998 Frank Ch. Eigler <fche@cygnus.com> - - * d30v-insns (do_incr): Check modular arithmetic limits after - postincrement/postdecrement, rather than before, to match - erroneous hardware behavior. - -Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Mon Apr 27 19:42:00 1998 Fred Fish <fnf@cygnus.com> - - * d30v-insns (do_trap): Clear all bits in PSW except SM and DB. - -Mon Apr 27 14:55:00 1998 Fred Fish <fnf@cygnus.com> - - * d30v-insns (do_mulx2h): Low order results go in ra+1, high - order in ra. - -Mon Apr 27 14:42:00 1998 Fred Fish <fnf@cygnus.com> - - * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed - multiply of high and low fields from operands. - -Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Sun Apr 26 15:20:20 1998 Tom Tromey <tromey@cygnus.com> - - * acconfig.h: New file. - * configure.in: Reverted change of Apr 24; use sinclude again. - -Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Fri Apr 24 11:20:00 1998 Tom Tromey <tromey@cygnus.com> - - * configure.in: Don't call sinclude. - -Wed Apr 22 21:23:00 1998 Fred Fish <fnf@cygnus.com> - - * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc. - * d30v-insns (MVTACC): Use new RbU and RcU macros. - -Wed Apr 22 20:52:00 1998 Fred Fish <fnf@cygnus.com> - - * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL. - * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of - RbH and RbL. - -Mon Apr 13 16:59:00 1998 Fred Fish <fnf@cygnus.com> - - * d30v-insns (do_srl): Avoid undefined behavior of host compiler - when shifting left by more than 31 bits. - -Tue Apr 7 18:09:00 1998 Fred Fish <fnf@cygnus.com> - - * engine.c (sim_engine_run): Remove at_loop_end variable. Add - rp_was_set and rpt_c_was_nonzero variables. Major restructuring of - code before and after instruction execution to properly handle state - of the RP bit in the PSW, the value in RPT_C, and other loop related - problems. - -Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Apr 3 15:26:00 1998 Fred Fish <fnf@cygnus.com> - - * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded - BASE_ADDRESS constant. - * cpu.h (BASE_ADDRESS): Remove constant not used any longer. - -Fri Apr 3 14:42:00 1998 Fred Fish <fnf@cygnus.com> - - * cpu.h (EIT_VB): Define macro to access EIT_VB register. - (EIT_VB_DEFAULT): Define value of EIT_VB register after reset. - * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT. - -Tue Mar 31 19:00:00 1998 Fred Fish <fnf@cygnus.com> - - * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than - just pcdisp. - -Mon Mar 30 20:30:00 1998 Fred Fish <fnf@cygnus.com> - - * engine.c (sim_engine_run): Add at_loop_end. Rework end of loop - code to use this to both reset PSW_RP when needed and to set PC - to RPT_S for another pass through the loop. - -Mon Mar 30 16:12:00 1998 Fred Fish <fnf@cygnus.com> - - * engine.c (sim_engine_run): Change code that handles RPT_* regs - and PSW_RP bit in PSW so that PSW_RP is always set while executing - the loop and loop terminates upon completion of the pass for which - RPT_C is zero. More closely follow logic in architecture manual. - -Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Thu Mar 19 00:25:43 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_open): Move memory-region commands back to - before the call to sim_parse_args. - (d30v_option_handler): Implement extmem-size option using - memory-delete and memory-region commands. - - * sim-calls.c (d30v_option_handler): Use ANSI-C argument list, - correct number and type of arguments. - -Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Mar 11 13:56:32 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map, - read_map and write_map resp. - - * cpu.c (d30v_read_mem, d30v_write_mem): Ditto. - -Mon Mar 2 13:34:08 1998 Fred Fish <fnf@cygnus.com> - - * d30v-insns (do_repeat): Abort repeat instructions that have - a repeat count of zero. - -Fri Feb 27 18:44:12 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim-calls.c (sim_open): Update call to sim_add_option_table. - -Thu Feb 26 18:34:31 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_info): Delete. - -Wed Feb 25 14:44:58 1998 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (mvtsys): If moving to EIT_VB register, and with - valid bits. Optimize code somewhat. - - * cpu.h (eit_vector_base_cr): New CR we need to special case. - (EIT_VALID): Valid bits for EIT_VB register. - - * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is - in the low 16 bits of the register. - - * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back - results. - (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing - result back to the registers. - -Tue Feb 24 18:09:52 1998 Fred Fish <fnf@cygnus.com> - - * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force - r0 to always be zero. - * cpu.h (GPR_SET): Define. - -Tue Feb 24 14:12:57 1998 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (do_sath): Do saturation in 32 bits, before - converting to 16. - (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend. - (do_sath_p): Delete, no longer used. - (sathp): Call do_sath, not do_sath_p. - -Mon Feb 23 15:55:14 1998 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (illegal,wrong_slot): Print \n after PC and before we - call sim_engine_halt. - (sr{a,l}hp): Implement missing instructions. - (do_trap): Print high order PSW bits in human readable fashion. - (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP. - - * alu.h (PSW_SET_QUEUE): New macro to set PSW bits. - - * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C - being > 0. If RPT_C is decremented to 0, clear PSW RP bit. - -Fri Feb 20 10:13:34 1998 Fred Fish <fnf@cygnus.com> - - * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020. - -Tue Feb 17 12:39:52 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_store_register, sim_fetch_register): Pass in - length parameter. Return -1. - -Fri Feb 6 17:39:54 1998 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (do_dbrai): Correct typo, use shift, not comparison. - -Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Jan 30 08:29:20 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * engine.c (sim_engine_run): Add parameter nr_cpus. - -Fri Jan 30 17:09:37 1998 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (jsrtzr): Check for register == 0, not != 0. - -Wed Jan 21 17:52:04 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * engine.c (do_stack_swap): Make type of new_sp unsigned. - -Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Mon Jan 5 16:04:17 1998 Andrew Cagney <cagney@sanguine.cygnus.com> - - * sim-calls.c (sim_info): Call profile_print. - - * sim-main.h: Enable instruction profiling. - -Thu Dec 18 12:21:38 1997 Michael Meissner <meissner@cygnus.com> - - * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry - and overflow bits. Don't look at the current value of PSW. - (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in - question. Don't look at the current value of PSW. - - * d30v-insns: All instructions that set the PSW, will only queue - up the particular bits in question that were set by the - instruction. Don't look at the current value of PSW. - -Wed Dec 17 11:41:44 1997 Michael Meissner <meissner@cygnus.com> - - * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW. - (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set. - - * engine.c (trace_alu32): When changing BPSW/DPSW, print the - special PSW bits. - - * d30v-insns (do_cmp_cc): Fix cmpps and cmpng. - (do_cmp{,u}_cc): Print which cc value was used if not in switch - statement. - (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}. - (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID. - -Tue Dec 16 18:17:26 1997 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (mulx2h): Add missing instruction. Complain if - register is not even. - (do_{add,sub}h_ppp): Get correct high/low values. Also correctly - handle short immediates. - (do_ld{2w,4bh}): Don't load r0 if ra == 0. - - * engine.c (d30v_interrupt_event): Remove unused variable - (unqueue_writes): Ditto. - -Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Sat Dec 13 23:40:17 1997 Michael Meissner <meissner@cygnus.com> - - * cpu.h (_write{32,64}): New structures for keeping track of - queued writes to registers. - (_sim_cpu): Add _write{32,64} structures. Make is_delayed_call - unsigned32 also. - (WRITE{32,64}*): New macros for queueing up writes to registers. - - * alu.h (ALU16_END): Take field that says whether we are setting - the high or low half word. Queue up changes to registers. - (ALU32_END): Queue up changes to registers. - (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up. - - * sim-main.h (do_stack_swap): Remove declaration. - - * engine.c (do_stack_swap): Make static. - (unqueue_writes): New function to unqueue all changes to 32 and 64 - bit registers in order. Implement --trace-alu. Reset high water - marks for # of queued registers. If PSW changed, possibly update - stack pointer. - (do_{long,2_short,parallel}): Unqueue register writes at the - appropriate time. - - * d30v-insns: Modify all insns to queue changes to registers, - rather than do them immediately so that parallel instructions get - the right values for inputs. Rewrite 16 bit operations to be done - in terms of masked 32 bit registers. Don't call do_stack_swap any - more here. - -Thu Dec 11 10:06:02 1997 Michael Meissner <meissner@cygnus.com> - - * sim-calls.c (d30v_option_handler): Add support for --extmem-size - to size external memory. - (sim_open): Ditto. Default if no --extmem-size option is 8 meg. - -Wed Dec 10 01:08:24 1997 Jim Blandy <jimb@zwingli.cygnus.com> - - * d30v-insns (do_rot2h): Clip rotate amounts to four bits. The - upper bits, and the sign of the rotation amount, are red herrings. - (do_sra, do_srl): Handle shifts greater than 32 bits. - (do_srah, do_sral): Properly sign-extend value and shift amount. - Handle shifts larger than 16 bits. - -Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Mon Dec 1 15:10:44 1997 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (do_sub2h): For short instruction, correctly - dupplicate lower 16 bits of immediate in upper 16 bits. - (sat2z): Fix typo that ignored the upper half of the register. - (do_satz): If < 0, set *ra to 0, if not call do_sat. - (mvtsys): Before setting PSW, and with PSW_VALID. - - * cpu.h (PSW_VALID): Mask for bits in PSW that is valid. - -Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in - printf, return dummy at end. - -Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with - ALU_ADDC. - (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C. - (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB. - (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B. - - * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of - ALU16_HAD_CARRY. - (ALU32_END): Ditto. - - * sim-main.h (string.h, strings.h): Include. - - * sim-calls.c: Delete inclusion of string.h and strings.h. - -Sun Nov 30 17:29:25 1997 Michael Meissner <meissner@cygnus.com> - - * configure.in (--enable-sim-trapdump): New switch to control - whether traps 0..30 dump out the registers or do the real trap. - * configure: Regenerate. - - * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if - appropriate --{en,dis}able-sim-trapdump is done. - - * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE. - (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump. - (d30v_option_handler): Add support for --trace-trapdump. - (d30v_options): Ditto. - (sim_open): Ditto. - - * d30v-insns (do_trap): Do register dump if --trace-trapdump and - not the system call trap. Remove support for calling old function - sim_io_syscalls. - -Sat Nov 29 18:54:55 1997 Michael Meissner <meissner@cygnus.com> - - * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields. - (TRACE_CALL_P): Non-zero if --trace-call. - (TRACE_ACTION): Non-zero if there is a tracing action at the end - of processing an instruction boundary. - (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return. - (d30v_next_insn): Delete, now trace_action field in cpu state. - - * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu - state. - (return_occurred): Minimum saved register to check is now 34. - - * engine.c (sim_engine_run): Change call tracing to use - trace_action field in cpu state. - - * sim-calls.c (d30v_option_handler): Handle d30v specific options. - (d30v_options): D30V specific options. Right now, --trace-call. - (sim_open): Register d30v specific options. - - * d30v-insns (call, return insns): Move --trace-debug call/return - tracing action to d30v specific --trace-call option. - -Fri Nov 28 20:12:48 1997 Michael Meissner <meissner@cygnus.com> - - * cpu.h (CREG): Rename from CR. - - * d30v-insns (do_{addc,subb}): Explicitly import the carry bit. - (do_trap): Use CREG, not CR. Switch to using cb_syscall. - -Thu Nov 27 19:25:43 1997 Michael Meissner <meissner@cygnus.com> - - * cpu.h (ACC): Define as short cut to accumulators. - - * d30v-insns (do_rot): Delete explicit function, use ROT32 to do - rotate instruction. - (do_trap): Make trap 30 print out accumulators and first 16 - control registers as well. - (do_avg): Sign extend to 64 bit type before doing add/shift. - (do_avg2h): Sign extend 16 bit chunks before doing add/shift. - -Wed Nov 26 15:20:24 1997 Doug Evans <devans@canuck.cygnus.com> - - * Makefile.in (NL_TARGET): Define. - -Wed Nov 26 16:55:38 1997 Michael Meissner <meissner@cygnus.com> - - * cpu.h (d30v_next_insn): New flag for things we are supposed to - trace between instruction words. - ({call,return}_occurred): Remove index argument. - (d30v_{read,write}_mem): Add declarations. - - * cpu.c (d30v_next_insn): New flag for things we are supposed to - trace between instruction words. - ({call,return}_occurred): Remove index argument. - (d30v_{read,write}_mem): New functions for reading/writing - simulated memory in the new common system call support. - - * d30v-insns: Set emacs C mode. - (call/return insns): Set bit to trace call at instruction - boundary, rather than doing it here. - (do_trap): Set up to use new common system call interface. - - * engine.c (sim_engine_run): If d30v_next_insn is non zero, do - function call/return tracing. - -Mon Nov 24 16:40:49 1997 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (bnot): Correctly reset bit in question. - (do_trap): Use common system call emulation support, rather than - our home grown support. - -Sun Nov 23 22:47:20 1997 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (mvfacc): Immediate field is unsigned, allowing - shifts of up to 63 to be encoded. Also do shift signed, rather - than unsigned. - - * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants. - - * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign - extends. - -Sat Nov 22 19:04:34 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns (illegal, wrong_slot): Replace SIGILL with - SIM_SIGILL. - - * sim-calls.c (signal.h): Do not include, replaced by - sim-signal.h. - - * sim-main.h (signal.h): Do not include, include sim-signal.h - instead. - -Fri Nov 21 09:33:54 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * cpu.c (call_occurred): Use ZALLOC instead of xmalloc. - (return_occurred): Use zfree instead of free. - -Wed Nov 19 13:28:09 1997 Michael Meissner <meissner@cygnus.com> - - * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include - files in $(ENGINE_H). - - * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes - a VAL argument to add/subtract along with the carry. - -Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> - - * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). - -Tue Nov 18 13:56:15 1997 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (do_trap): Change to new system call numbers. Add - read emulation. - -Mon Nov 17 14:43:45 1997 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (mulx): Add mulx instruction. - -Sun Nov 16 19:06:56 1997 Michael Meissner <meissner@cygnus.com> - - * cpu.c ({call,return}_occurred): New trace functions to mark - function calls and returns and check whether all saved registers - really were saved. - - * cpu.h ({call,return}_occurred): Add declaration. - - * d30v-insns ({bsr, jsr} patterns): Call call_occurred if - --trace-debug to trace function calls. - (jmp register pattern): If this is a jump r62 and --trace-debug, - call return_occurred to trace function calls. - (bsr{tnz,tzr}): Move setting r62 inside conditional against reg. - (do_ld2w): Grab memory in 64-bit chunk, to check alignment. - (do_st2w): Ditto. - -Sat Nov 15 20:57:57 1997 Michael Meissner <meissner@cygnus.com> - - * d30v-insns: Undo changes from Nov. 11, allowing for odd register - pairs, since the machine doesn't support such usage. Trap on odd - registers, rather than give a warning. Keep do_src and do_trap - changes. - -Fri Nov 14 11:59:29 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns (do_trap): Pacify compiler warnings for printf calls. - -Tue Nov 11 18:26:03 1997 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (not_r63_reg): Rename from make_even_reg, only check - for register being r63. Change callers ld2{h,w}, ld4bh{,u}. - (get_reg_not_r63): Rename from get_even_reg, and only check for - register r63. Change callers st2{w,h}, st4b. - (do_src): Correct register pair for shift left. - (do_trap): Temporarily make trap 30 print out the registers. - -Tue Nov 4 08:51:22 1997 Michael Meissner <meissner@cygnus.com> - - * d30v-insns (do_trap): Make trap 31 be used for system calls. - Add primitive write and exit system calls. - - * Makefile (FILTER): New make variable to filter out known igen - warnings. - (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter - out warnings that should be ignored by default. - -Fri Oct 31 19:36:51 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_open): Change EIT to memory region. - -Fri Oct 17 16:51:31 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT. - (ALU32_END): Get result from ALU32_OVERFLOW_RESULT. - -Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Mon Sep 29 15:23:35 1997 Stu Grossman <grossman@babylon-5.cygnus.com> - - * d30v-insns (MVFSYS MVTSYS): Fix bit patterns so that these - instructions get recognised. - -Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Sep 24 17:51:43 1997 Stu Grossman <grossman@babylon-5.cygnus.com> - - * Makefile.in (SIM_OBJS): Add sim-break.o. - * (INCLUDE_DEPS): Add tconfig.h. - * alu.h (MEM STORE): Change to sim_core_read/write_unaligned to - allow for trapping unaligned accesses. - * cpu.h: Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint - mechanism. - * d30v-insn (short syscall): Use syscall 5 for breakpoint insn. - * sim-calls.c (sim_fetch_register sim_store_register): Implement. - * tconfig.in: Define SIM_HAVE_BREAKPOINTS to enable intrinsic - breakpoint mechanism. - -Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN, - SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common. - (SIM_EXTRA_CFLAGS): Update. - -Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure.in: Specify strict alignment. - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Sep 12 16:13:04 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_open): Change memory to - internal inst. RAM h'00000000-h'0000ffff (64KB) - internal data RAM h'20000000-h'20007fff (32KB) - external RAM h'80000000-h'803fffff (4MB) - EIT h'fffff000-h'ffffffff - - -Thu Sep 11 08:59:34 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * Makefile.in (SIM_OBJS): Add sim-hrw.o module. - - * sim-calls.c (sim_read): Delete. use sim-hrw. - (sim_write): Delete, use sim-hrw. - - -Tue Sep 9 01:36:20 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * ic-d30v (imm_5): Update nr args passed to LSMASKED. - - * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix, - computing the max sat value incorrectly. - -Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Sep 5 09:15:33 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit - type cast instead of SIGNED64 macro. - -Thu Sep 4 10:28:45 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * Makefile.in (SIM_OBJS): Include sim-memopt.o module. - - * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach - calls. - (sim_open): If no memory, use memory commands to establish d30v - ram. - (d30v_option_handler): Delete, replased by sim-memopt.c. - (sim_create_inferior): Call sim_module_init. - - * sim-main.h (struct sim_state): Remove members eit_ram, - sizeof_eit_ram, external_ram, baseof_external_ram, - sizeof_external_ram. Using generic memory model instead. - -Mon Sep 1 11:04:09 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_open): Use sim_state_alloc. - -Sat Aug 30 10:01:51 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define. - - * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS - not -1. - -Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Wed Aug 27 13:41:54 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_open): Add call to sim_analyze_program, update - call to sim_config. - - * sim-calls.c (sim_create_inferior): Add ABFD argument. - Initialize CPU registers including PC. - (sim_load): Delete, using sim-hload. - - * Makefile.in (SIM_OBJS): Add sim-hload.o module. - -Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Mon Aug 25 15:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_open): Add ABFD argument. - (sim_open): Move sim_config call to after sim_parse_args. - (sim_open): Check sim_config return status. - -Fri Aug 22 16:38:59 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp. - (do_subh_ppp): Compute rc=rb-src instead of src-rb. - (do_addh_ppp): Ditto. - -Fri Jun 27 14:43:20 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was - wrong. Update handling of PSW[DS] bit. - (dbt): Fix debug trap address. - - * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers. - -Tue Jun 24 12:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns (DBT, RTD): Swap the stack after updating the PSW. - (DBT): Use PSW_SET to update PSW. - - * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit. - -Tue Jun 24 12:16:14 1997 Andrew Cagney <cagney@b2.cygnus.com> - - * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so - that they are of class %s instead of class function. - -Tue Jun 10 12:26:39 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-main.h (engine_error, engine_restart, engine_halt, - engine_run_until_stop): Delete prototypes. Functions deleted - earlier. - (do_interrupt_handler): Add prototype. - (sim_state): Add pending_event member to struct. - - * sim-calls.c (sim_open): Configure interrupt handler. - * engine.c (d30v_interrupt_event): New function. Deliver external - interrupt to processor. - - * d30v-insns (do_stack_swap): Move function from here. - * engine.c (do_stack_swap): To here. - * sim-main.h (do_stack_swap): Add prototype. - - * cpu.h (registers): Change current_sp to an int. - * d30v-insn (do_stack_swap): Update. - -Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of - instruction. - (str_XXX): Fix case of XX == 3 - return "-". - -Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * engine.c (sim_engine_run): Issuing L->R and R->L instructions in - wrong order. - - * d30v-insn (CMPUcc imm long): With of RB field should be 6 not - three. - (MUL, MUL2H, MULHX): X field 01 instead of 10. - -Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW. - (dbt, rtd): New instructions. - - * cpu.h (NR_CONTROL_REGISTERS): Now 15. - (debug_program_status_word_cr, debug_program_counter_cr): Add - debug control registers. Renumber other control registers. - (PSW_DS): New PSW bit. - (DPC, DPSW): Define. - -Wed May 28 13:45:47 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * engine.c (sim_engine_run): Check the event queue on every cycle. - - * sim-calls.c (sim_size): Delete. - (sim_do_command): Call sim_args_command. - (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct. - (simulation): Delete global now depend on sd argument. - (sim_open): Initialize sim-watch. - (d30v_option_handler): New function, parse mem-size argument. - -Tue May 27 14:03:38 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_set_callbacks): Delete. - (sim_write): Pass NULL cpu arg to sim_core_write_buffer. - - * engine.c (engine_init): Delete. Handled in sim_open. - (engine_create): Ditto. - -Tue May 20 10:15:35 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_open): Add callback argument. - (sim_set_callbacks): Delete SIM_DESC argument. - -Mon May 19 14:59:32 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_open): Set the sim.base magic number. - -Fri May 16 15:25:59 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d30v-insns: Replace engine_error with common sim_engine_abort. - * cpu.c (is_condition_ok, is_wrong_slot): Ditto. - - * engine.c (engine_run_until_stop): Rename this. - (sim_engine_run): To this. Simplify - most moved to common. - - * sim-calls.c (sim_stop_reason, sim_resume, sim_stop): - Delete. Replaced by common code. - - * engine.c (engine_error, engine_restart, engine_halt): Ditto. - - * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK): - Define as NOPs. - -Mon May 5 23:05:41 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in - ../common. - * sim-calls.c (sim_open): Ditto. - - * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright - notice. - -Fri May 2 12:01:38 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim-options.h, sim-utils.h): Include. - * Makefile.in (sim-calls.o): Add dependencies. - - * d30v-insns (address_word): Remove cia argument from support - functions, igen now does this automatically. - - * Makefile.in (tmp-igen): Include line number information in - generated files. - - * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to - simulator base type sim_state_base. - (sim-core.h, sim-events.h, sim-io.h): Replace with #include - "sim-base.h". - - * sim-main.h (sim_state): Track recomendations in common - directory. - * cpu.h (sim_cpu): Ditto. - * engine.c (do_2_short, do_parallel): Ditto. - * cpu.h (GPR): Ditto. - * alu.h (MEM, IMEM, STORE): Ditto. - * cpu.c (is_wrong_slot): Ditto. - * ic-d30v (Aa, Ab): Ditto. - -Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o. - * sim-calls.c (sim_open): Call sim_module_uninstall if argument - parsing fails. Call sim_post_argv_init. - (sim_close): Call sim_module_uninstall. - -Fri Apr 18 13:44:48 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-calls.c (sim_stop): New function. - -Thu Apr 17 02:57:55 1997 Doug Evans <dje@canuck.cygnus.com> - - * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o. - (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete. - (SIM_RUN_OBJS): Change from run.o to nrun.o. - * cpu.h (sim_cpu): New member base. Delete members trace, sd. - (cpu_traces): Delete. - * engine.c (engine_init): Set backlink from cpu to state. - * sim-calls.c: #include bfd.h. - (sim_open): Set STATE_OPEN_KIND. Call sim_pre_argv_init, - sim_parse_args. - (sim_load): Return SIM_RC. New arg abfd. - Call sim_load_file to load file into simulator. - (sim_create_inferior): Return SIM_RC. Delete arg start_address. - (sim_trace): Delete. - * sim-main.h (struct sim_state): sim_state_base is typedef now. - (STATE_CPU): Define. - -Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> - - * Makefile.in (SIM_EXTRA_DEPS): Define. - (SIM_OBJS): Add sim-utils.o. - (SIM_GEN): Delete tmp-common. - (SIM_EXTRA_CLEAN): Delete clean-common. - (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in. - (tmp-common,clean-common): Delete. - (ENGINE_H): sim-state.h renamed to sim-main.h. - (clean-igen): Delete tmp-insns. - - * cpu.c: sim-state.h renamed to sim-main.h. - * engine.c: Likewise. - * sim-calls.c: Likewise. - (zalloc,zfree): Moved to ../common/sim-utils.c. - * sim-main.h: Renamed from sim-state.h. - - * sim-calls.c (sim_open): New arg `kind'. - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Apr 2 11:13:15 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o - - * engine.c (current_target_byte_order, current_host_byte_order, - current_environment, current_alignment, current_floating_point, - current_model_issue, current_stdio): Delete, moved to - ../common/sim-config.c - -Mon Mar 24 14:50:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * d30v-insns (do_ldw): Load 4 bytes not 2. - (do_incr, LD*, ST*): Increment register not its value. - -Mon Mar 24 09:59:53 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * cpu.c (is_wrong_slot): Ditto. - (is_condition_ok): Ditto. - - * sim-calls.c (sim_trace): Ditto. - - * engine.c (engine_init): Ditto. - (do_2_short): Ditto. - (engine_run_until_stop): Ditto. - - * d30v-insns (void): Update. For functions, remove `SIM_DESC sd' - and `cpu *processor' arguments as igen now handles this. - - * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable - processor to cpu. - - * sim-state.h: Update. - -Fri Mar 21 12:52:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * d30v-insns (do_sat): Correct calculation of saturate lower - bound. - (do_sath): Ditto. - (do_satzh, do_satz): Arguments should be signed. - - * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for - moment. - (filter_filename): Drop. - - * cpu.h (is_wrong_slot): Correct declaration name - was - is_valid_slot. - - * engine.c (do_parallel): Plicate GCC. - (engine_error): Ditto. - (engine_run_until_stop): Ditto. - * cpu.c (is_wrong_slot): Ditto. - (is_condition_ok): Ditto. - * sim-calls.c (sim_size): Ditto. - (sim_read): Ditto. - (sim_trace): Ditto. - - * engine.h, engine.c (engine_create): Add missing prototype to - header file. Clean up missing variables. - - * configure.in (unistd.h, string.h, strings.h): Configure in. - * configure, config.in: Rebuild. - -Thu Mar 20 19:40:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * d30v-insns (void): Provide a second emul instruction using a - branch prefix. - -Tue Mar 18 20:51:42 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * d30v-insn (do_sat*): Pass all necessary args. - -Tue Mar 18 18:49:10 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * d30v-insns (SAT*): Issue warning when bit overflow. - (EMUL): Exit with GPR[2] not 2. - -Tue Mar 18 14:24:09 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * sim-state.h: New file rename engine.h. - (sim_state): Rename engine strut to sim_state, rename events and - core members. - - * engine.c: Update. - * cpu.h, cpu.c: Ditto. - * alu.h: Ditto. - * d30v-insns: Ditto. - * sim-calls.c: Ditto. - - * Makefile.in (sim-*.c): Moved to ../common. - -Tue Mar 18 10:39:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * d30v-insns (do_mac): Adding wrong register. - (do_macs): Ditto. - (do_msub): Ditto. - (do_msubs): Ditto. - - * ic-d30v: Put back definitions of RaH, RaL, et.al. - (do_sra2h, do_srah): Use. - (do_srl2h, do_srlh): Use. - - * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate. - -Tue Mar 18 03:01:25 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * d30v-insns: Specify wild insted of reserved bits. - (void): - -Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * configure: Re-generate. - -Mon Mar 17 14:35:37 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_* - options. Allow RESERVED_BITS to be configured. - * configure: Re-generate. - - * Makefile.in (sim-*.h): Drop, not needed. - (sim-*.c): Make each explicit so that they automatically update. - -Sat Mar 15 02:34:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * ic-d30v (imm long): Incorrect calculation. - - * d30v-insns (EMUL): Finish exit, write-string emul-call. - - * sim-calls.c (sim_trace): Have sim-trace enable basic instruction - tracing. - -Sat Mar 15 02:10:31 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * configure.in: Enable common options - endian, inline and - warnings. - * configure: Regenerate. - -Fri Mar 14 16:11:50 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * Makefile.in (cpu.o): Update dependencies. - * cpu.c (is_condition_ok): Update PSW bit manipulations. - -Fri Mar 14 12:49:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * configure.in: Autoconfig m4 - * configure: Regenerate. - - * Makefile.in: Use m4 to preprocess d30v-insns. - * d30v-insn: Adjust. - -Thu Mar 13 12:44:54 1997 Doug Evans <dje@canuck.cygnus.com> - - * sim-calls.c (sim_open): New SIM_DESC result. Argument is now - in argv form. - (other sim_*): New SIM_DESC argument. - -Wed Mar 12 19:05:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * sim-calls.c (sim_open): Create all the d30v RAM blocks. - - * engine.c (engine_run_until_stop): Handle delayed subroutine - call. - * d30v-insn: Ditto. - - * ic-d30v: For Rb and Rc always return the value and not the - equation. - * d30v-insn: Use. - - * ic-d30v (val_Ra): Returns 0 or RA. - * d30v-insn: Use. - - * d30v-insn (make_even_reg, get_even_reg): New functions. Force - the register index to be even, issusing a warning if it was not. - (LD*, ST*): Use. - -Wed Mar 12 14:57:26 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * d30v-insns (do_trap): Implement TRAP instruction. - - * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag - onto PSW bit. - * ic-d30v: Drop F* expressions. - * d30v-insn: Use more explicit PSW_FLAG_ ops. - * cpu.h (PSW_*): Redo PSW bit values. - * alu.h (ALU*_END): Update. Fix setting of overflow - logic was - backwards. - - * d30v-insn (MVFSYS, MVTSYS): Implement. - * cpu.h (PSWH, PSWL): New macros for high, low word of PSW. - -Wed Mar 12 14:12:11 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * cpu.h (RPT_IS_CALL): New macro for processor field - is_delayed_call. That in turn used as a flag to indicate if a - delayed branch or delayed call is to occure. - * d30v-insns (do_dbra): Set/clear RPT_IS_CALL; - (do_dbrai): Ditto. - (do_dbsr): Ditto. - (do_dbsr): Ditto. - (do_djmp): Ditto. - (do_djmpi): Dotto. - (do_djsr): Ditto. - (do_djsri): Ditto. - (void): - - * d30v-insn (do_incr): Finish - handle modulo registers. - - * d30v-insns (CMPU): Include all possible compare - operations. Issue a warning where op defined by the processor - spec. - -Wed Mar 12 13:55:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * d30v-insns: Add a new instruction class _EMUL and a new - instruction EMUL that emulates a few basic IO operations. - - * Makefile.in (tmp-igen): Filter in emul instructions. - -Fri Mar 7 20:32:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * d30v-insns (void): Fill in the gaps. - -Wed Feb 26 09:31:10 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au> - - * Makefile.in (tmp-igen): Include ic-d30v in dependencies. - - * ic-d30v (cache): Update to use H_word, L_word added to - sim-endian.h. - -Tue Feb 25 15:26:51 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au> - - * Makefile.in (tmp-igen): Correctly run $(MAKE). - -Thu Feb 20 20:30:31 1997 Andrew Cagney <cagney@critters.cygnus.com> - - * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated - files dependant on tmp-igen. Define ENGINE_H. - -Sun Feb 16 16:42:48 1997 Andrew Cagney <cagney@critters.cygnus.com> - - * configure.in: New file - follow Doug Evans instructions. - * Makefile.in: Ditto. - diff --git a/sim/d30v/Makefile.in b/sim/d30v/Makefile.in deleted file mode 100644 index 76afe20..0000000 --- a/sim/d30v/Makefile.in +++ /dev/null @@ -1,217 +0,0 @@ -# OBSOLETE # Mitsubishi Electric Corp. D30V Simulator. -# OBSOLETE # Copyright (C) 1997, Free Software Foundation, Inc. -# OBSOLETE # Contributed by Cygnus Support. -# OBSOLETE # -# OBSOLETE # This file is part of GDB, the GNU debugger. -# OBSOLETE # -# OBSOLETE # This program is free software; you can redistribute it and/or modify -# OBSOLETE # it under the terms of the GNU General Public License as published by -# OBSOLETE # the Free Software Foundation; either version 2, or (at your option) -# OBSOLETE # any later version. -# OBSOLETE # -# OBSOLETE # This program is distributed in the hope that it will be useful, -# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of -# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# OBSOLETE # GNU General Public License for more details. -# OBSOLETE # -# OBSOLETE # You should have received a copy of the GNU General Public License along -# OBSOLETE # with this program; if not, write to the Free Software Foundation, Inc., -# OBSOLETE # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -# OBSOLETE -# OBSOLETE M4= @M4@ -# OBSOLETE -# OBSOLETE -# OBSOLETE ## COMMON_PRE_CONFIG_FRAG -# OBSOLETE -# OBSOLETE # These variables are given default values in COMMON_PRE_CONFIG_FRAG. -# OBSOLETE # We override the ones we need to here. -# OBSOLETE # Not all of these need to be mentioned, only the necessary ones. -# OBSOLETE -# OBSOLETE # List of object files, less common parts. -# OBSOLETE SIM_OBJS = \ -# OBSOLETE $(SIM_NEW_COMMON_OBJS) \ -# OBSOLETE engine.o cpu.o \ -# OBSOLETE s_support.o l_support.o \ -# OBSOLETE s_idecode.o l_idecode.o \ -# OBSOLETE s_semantics.o l_semantics.o \ -# OBSOLETE sim-calls.o itable.o \ -# OBSOLETE sim-hload.o \ -# OBSOLETE sim-hrw.o \ -# OBSOLETE sim-engine.o \ -# OBSOLETE sim-stop.o \ -# OBSOLETE sim-reason.o \ -# OBSOLETE sim-resume.o -# OBSOLETE -# OBSOLETE # List of extra dependencies. -# OBSOLETE # Generally this consists of simulator specific files included by sim-main.h. -# OBSOLETE SIM_EXTRA_DEPS = itable.h s_idecode.h l_idecode.h cpu.h alu.h -# OBSOLETE -# OBSOLETE # List of generators -# OBSOLETE SIM_GEN=tmp-igen -# OBSOLETE -# OBSOLETE # List of extra flags to always pass to $(CC). -# OBSOLETE SIM_EXTRA_CFLAGS = @sim_trapdump@ -# OBSOLETE -# OBSOLETE # List of main object files for `run'. -# OBSOLETE SIM_RUN_OBJS = nrun.o -# OBSOLETE -# OBSOLETE # Dependency of `clean' to clean any extra files. -# OBSOLETE SIM_EXTRA_CLEAN = clean-igen -# OBSOLETE -# OBSOLETE # This selects the d30v newlib/libgloss syscall definitions. -# OBSOLETE NL_TARGET=-DNL_TARGET_d30v -# OBSOLETE -# OBSOLETE ## COMMON_POST_CONFIG_FRAG -# OBSOLETE -# OBSOLETE MAIN_INCLUDE_DEPS = tconfig.h -# OBSOLETE INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) -# OBSOLETE -# OBSOLETE # Rules need to build $(SIM_OBJS), plus whatever else the target wants. -# OBSOLETE -# OBSOLETE # ... target specific rules ... -# OBSOLETE -# OBSOLETE # Filter to eliminate known warnings -# OBSOLETE FILTER = 2>&1 | egrep -v "Discarding instruction|instruction field of type \`compute\' changed to \`cache\'|Instruction format is not 64 bits wide" -# OBSOLETE -# OBSOLETE BUILT_SRC_FROM_IGEN = \ -# OBSOLETE s_icache.h \ -# OBSOLETE s_icache.c \ -# OBSOLETE s_idecode.h \ -# OBSOLETE s_idecode.c \ -# OBSOLETE s_semantics.h \ -# OBSOLETE s_semantics.c \ -# OBSOLETE s_model.h \ -# OBSOLETE s_model.c \ -# OBSOLETE s_support.h \ -# OBSOLETE s_support.c \ -# OBSOLETE l_icache.h \ -# OBSOLETE l_icache.c \ -# OBSOLETE l_idecode.h \ -# OBSOLETE l_idecode.c \ -# OBSOLETE l_semantics.h \ -# OBSOLETE l_semantics.c \ -# OBSOLETE l_model.h \ -# OBSOLETE l_model.c \ -# OBSOLETE l_support.h \ -# OBSOLETE l_support.c \ -# OBSOLETE itable.h itable.c -# OBSOLETE $(BUILT_SRC_FROM_IGEN): tmp-igen -# OBSOLETE # -# OBSOLETE -# OBSOLETE .PHONY: clean-igen -# OBSOLETE clean-igen: -# OBSOLETE rm -f $(BUILT_SRC_FROM_IGEN) -# OBSOLETE rm -f tmp-igen tmp-insns -# OBSOLETE -# OBSOLETE ../igen/igen: -# OBSOLETE cd ../igen && $(MAKE) -# OBSOLETE -# OBSOLETE tmp-igen: $(srcdir)/dc-short $(srcdir)/d30v-insns $(srcdir)/ic-d30v ../igen/igen -# OBSOLETE cd ../igen && $(MAKE) -# OBSOLETE echo "# 1 \"$(srcdir)/d30v-insns\"" > tmp-insns -# OBSOLETE $(M4) < $(srcdir)/d30v-insns >> tmp-insns -# OBSOLETE @echo "Generating short version ..." -# OBSOLETE ../igen/igen \ -# OBSOLETE -G gen-zero-r0 \ -# OBSOLETE -G direct-access \ -# OBSOLETE -G default-nia-minus-one \ -# OBSOLETE -G conditional-issue \ -# OBSOLETE -G verify-slot \ -# OBSOLETE -G field-widths \ -# OBSOLETE -F short,emul \ -# OBSOLETE -B 32 \ -# OBSOLETE -P "s_" \ -# OBSOLETE -o $(srcdir)/dc-short \ -# OBSOLETE -k $(srcdir)/ic-d30v \ -# OBSOLETE -n $(srcdir)/d30v-insns -i tmp-insns \ -# OBSOLETE -n s_icache.h -hc tmp-icache.h \ -# OBSOLETE -n s_icache.c -c tmp-icache.c \ -# OBSOLETE -n s_semantics.h -hs tmp-semantics.h \ -# OBSOLETE -n s_semantics.c -s tmp-semantics.c \ -# OBSOLETE -n s_idecode.h -hd tmp-idecode.h \ -# OBSOLETE -n s_idecode.c -d tmp-idecode.c \ -# OBSOLETE -n s_model.h -hm tmp-model.h \ -# OBSOLETE -n s_model.c -m tmp-model.c \ -# OBSOLETE -n s_support.h -hf tmp-support.h \ -# OBSOLETE -n s_support.c -f tmp-support.c $(FILTER) -# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.h s_icache.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.c s_icache.c -# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.h s_idecode.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.c s_idecode.c -# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.h s_semantics.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.c s_semantics.c -# OBSOLETE $(srcdir)/../../move-if-change tmp-model.h s_model.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-model.c s_model.c -# OBSOLETE $(srcdir)/../../move-if-change tmp-support.h s_support.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-support.c s_support.c -# OBSOLETE @echo "Generating long version ..." -# OBSOLETE ../igen/igen \ -# OBSOLETE -G gen-zero-r0 \ -# OBSOLETE -G direct-access \ -# OBSOLETE -G default-nia-minus-one \ -# OBSOLETE -G conditional-issue \ -# OBSOLETE -G field-widths \ -# OBSOLETE -F long,emul \ -# OBSOLETE -B 64 \ -# OBSOLETE -P "l_" \ -# OBSOLETE -o $(srcdir)/dc-short \ -# OBSOLETE -k $(srcdir)/ic-d30v \ -# OBSOLETE -i tmp-insns \ -# OBSOLETE -n l_icache.h -hc tmp-icache.h \ -# OBSOLETE -n l_icache.c -c tmp-icache.c \ -# OBSOLETE -n l_semantics.h -hs tmp-semantics.h \ -# OBSOLETE -n l_semantics.c -s tmp-semantics.c \ -# OBSOLETE -n l_idecode.h -hd tmp-idecode.h \ -# OBSOLETE -n l_idecode.c -d tmp-idecode.c \ -# OBSOLETE -n l_model.h -hm tmp-model.h \ -# OBSOLETE -n l_model.c -m tmp-model.c \ -# OBSOLETE -n l_support.h -hf tmp-support.h \ -# OBSOLETE -n l_support.c -f tmp-support.c $(FILTER) -# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.h l_icache.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-icache.c l_icache.c -# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.h l_idecode.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-idecode.c l_idecode.c -# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.h l_semantics.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-semantics.c l_semantics.c -# OBSOLETE $(srcdir)/../../move-if-change tmp-model.h l_model.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-model.c l_model.c -# OBSOLETE $(srcdir)/../../move-if-change tmp-support.h l_support.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-support.c l_support.c -# OBSOLETE @echo "Generating instruction database ..." -# OBSOLETE ../igen/igen \ -# OBSOLETE -G field-widths \ -# OBSOLETE -F short,long,emul \ -# OBSOLETE -B 64 \ -# OBSOLETE -o $(srcdir)/dc-short \ -# OBSOLETE -k $(srcdir)/ic-d30v \ -# OBSOLETE -i tmp-insns \ -# OBSOLETE -n itable.h -ht tmp-itable.h \ -# OBSOLETE -n itable.c -t tmp-itable.c $(FILTER) -# OBSOLETE $(srcdir)/../../move-if-change tmp-itable.h itable.h -# OBSOLETE $(srcdir)/../../move-if-change tmp-itable.c itable.c -# OBSOLETE touch tmp-igen -# OBSOLETE -# OBSOLETE ENGINE_H = \ -# OBSOLETE sim-main.h \ -# OBSOLETE $(srcdir)/../common/sim-basics.h \ -# OBSOLETE config.h \ -# OBSOLETE $(srcdir)/../common/sim-config.h \ -# OBSOLETE $(srcdir)/../common/sim-inline.h \ -# OBSOLETE $(srcdir)/../common/sim-types.h \ -# OBSOLETE $(srcdir)/../common/sim-bits.h \ -# OBSOLETE $(srcdir)/../common/sim-endian.h \ -# OBSOLETE itable.h \ -# OBSOLETE l_idecode.h s_idecode.h \ -# OBSOLETE cpu.h \ -# OBSOLETE alu.h \ -# OBSOLETE $(srcdir)/../common/sim-alu.h \ -# OBSOLETE $(srcdir)/../common/sim-core.h \ -# OBSOLETE $(srcdir)/../common/sim-events.h \ -# OBSOLETE -# OBSOLETE engine.o: engine.c $(ENGINE_H) -# OBSOLETE sim-calls.o: sim-calls.c $(ENGINE_H) $(srcdir)/../common/sim-utils.h $(srcdir)/../common/sim-options.h -# OBSOLETE cpu.o: cpu.c $(ENGINE_H) -# OBSOLETE s_support.o: s_support.c $(ENGINE_H) -# OBSOLETE l_support.o: l_support.c $(ENGINE_H) -# OBSOLETE s_semantics.o: s_semantics.c $(ENGINE_H) -# OBSOLETE l_semantics.o: l_semantics.c $(ENGINE_H) diff --git a/sim/d30v/acconfig.h b/sim/d30v/acconfig.h deleted file mode 100644 index f9b87a1..0000000 --- a/sim/d30v/acconfig.h +++ /dev/null @@ -1,15 +0,0 @@ - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have catgets and don't want to use GNU gettext. */ -#undef HAVE_CATGETS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES diff --git a/sim/d30v/alu.h b/sim/d30v/alu.h deleted file mode 100644 index 5605ce2..0000000 --- a/sim/d30v/alu.h +++ /dev/null @@ -1,106 +0,0 @@ -/* OBSOLETE /* Mitsubishi Electric Corp. D30V Simulator. */ -/* OBSOLETE Copyright (C) 1997, Free Software Foundation, Inc. */ -/* OBSOLETE Contributed by Cygnus Support. */ -/* OBSOLETE */ -/* OBSOLETE This file is part of GDB, the GNU debugger. */ -/* OBSOLETE */ -/* OBSOLETE This program is free software; you can redistribute it and/or modify */ -/* OBSOLETE it under the terms of the GNU General Public License as published by */ -/* OBSOLETE the Free Software Foundation; either version 2, or (at your option) */ -/* OBSOLETE any later version. */ -/* OBSOLETE */ -/* OBSOLETE This program is distributed in the hope that it will be useful, */ -/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ -/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ -/* OBSOLETE GNU General Public License for more details. */ -/* OBSOLETE */ -/* OBSOLETE You should have received a copy of the GNU General Public License along */ -/* OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., */ -/* OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE #ifndef _D30V_ALU_H_ */ -/* OBSOLETE #define _D30V_ALU_H_ */ -/* OBSOLETE */ -/* OBSOLETE #define ALU_CARRY (PSW_VAL(PSW_C) != 0) */ -/* OBSOLETE */ -/* OBSOLETE #include "sim-alu.h" */ -/* OBSOLETE */ -/* OBSOLETE #define ALU16_END(TARG, HIGH) \ */ -/* OBSOLETE { \ */ -/* OBSOLETE unsigned32 mask, value; \ */ -/* OBSOLETE if (ALU16_HAD_OVERFLOW) { \ */ -/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C); \ */ -/* OBSOLETE value = BIT32 (PSW_V) | BIT32 (PSW_VA); \ */ -/* OBSOLETE } \ */ -/* OBSOLETE else { \ */ -/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_C); \ */ -/* OBSOLETE value = 0; \ */ -/* OBSOLETE } \ */ -/* OBSOLETE if (ALU16_HAD_CARRY_BORROW) \ */ -/* OBSOLETE value |= BIT32 (PSW_C); \ */ -/* OBSOLETE if (HIGH) \ */ -/* OBSOLETE WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT<<16, 0xffff0000); \ */ -/* OBSOLETE else \ */ -/* OBSOLETE WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT, 0x0000ffff); \ */ -/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, value, mask); \ */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE #define ALU32_END(TARG) \ */ -/* OBSOLETE { \ */ -/* OBSOLETE unsigned32 mask, value; \ */ -/* OBSOLETE if (ALU32_HAD_OVERFLOW) { \ */ -/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C); \ */ -/* OBSOLETE value = BIT32 (PSW_V) | BIT32 (PSW_VA); \ */ -/* OBSOLETE } \ */ -/* OBSOLETE else { \ */ -/* OBSOLETE mask = BIT32 (PSW_V) | BIT32 (PSW_C); \ */ -/* OBSOLETE value = 0; \ */ -/* OBSOLETE } \ */ -/* OBSOLETE if (ALU32_HAD_CARRY_BORROW) \ */ -/* OBSOLETE value |= BIT32 (PSW_C); \ */ -/* OBSOLETE WRITE32_QUEUE (TARG, ALU32_OVERFLOW_RESULT); \ */ -/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, value, mask); \ */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE #define ALU_END(TARG) ALU32_END(TARG) */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE /* PSW & Flag manipulation */ */ -/* OBSOLETE */ -/* OBSOLETE #define PSW_SET(BIT,VAL) BLIT32(PSW, (BIT), (VAL)) */ -/* OBSOLETE #define PSW_VAL(BIT) EXTRACTED32(PSW, (BIT), (BIT)) */ -/* OBSOLETE */ -/* OBSOLETE #define PSW_F(FLAG) (17 + ((FLAG) % 8) * 2) */ -/* OBSOLETE #define PSW_FLAG_SET(FLAG,VAL) PSW_SET(PSW_F(FLAG), VAL) */ -/* OBSOLETE #define PSW_FLAG_VAL(FLAG) PSW_VAL(PSW_F(FLAG)) */ -/* OBSOLETE */ -/* OBSOLETE #define PSW_SET_QUEUE(BIT,VAL) \ */ -/* OBSOLETE do { \ */ -/* OBSOLETE unsigned32 mask = BIT32 (BIT); \ */ -/* OBSOLETE unsigned32 bitval = (VAL) ? mask : 0; \ */ -/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, bitval, mask); \ */ -/* OBSOLETE } while (0) */ -/* OBSOLETE */ -/* OBSOLETE #define PSW_FLAG_SET_QUEUE(FLAG,VAL) \ */ -/* OBSOLETE do { \ */ -/* OBSOLETE unsigned32 mask = BIT32 (PSW_F (FLAG)); \ */ -/* OBSOLETE unsigned32 bitval = (VAL) ? mask : 0; \ */ -/* OBSOLETE WRITE32_QUEUE_MASK (&PSW, bitval, mask); \ */ -/* OBSOLETE } while (0) */ -/* OBSOLETE */ -/* OBSOLETE /* Bring data in from the cold */ */ -/* OBSOLETE */ -/* OBSOLETE #define IMEM(EA) \ */ -/* OBSOLETE (sim_core_read_8(STATE_CPU (sd, 0), cia, exec_map, (EA))) */ -/* OBSOLETE */ -/* OBSOLETE #define MEM(SIGN, EA, NR_BYTES) \ */ -/* OBSOLETE ((SIGN##_##NR_BYTES) sim_core_read_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, read_map, (EA))) */ -/* OBSOLETE */ -/* OBSOLETE #define STORE(EA, NR_BYTES, VAL) \ */ -/* OBSOLETE do { \ */ -/* OBSOLETE sim_core_write_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, write_map, (EA), (VAL)); \ */ -/* OBSOLETE } while (0) */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE #endif */ diff --git a/sim/d30v/config.in b/sim/d30v/config.in deleted file mode 100644 index 9723b86..0000000 --- a/sim/d30v/config.in +++ /dev/null @@ -1,162 +0,0 @@ -/* config.in. Generated automatically from configure.in by autoheader. */ - -/* Define if using alloca.c. */ -#undef C_ALLOCA - -/* Define to empty if the keyword does not work. */ -#undef const - -/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems. - This function is required for alloca.c support on those systems. */ -#undef CRAY_STACKSEG_END - -/* Define if you have alloca, as a function or macro. */ -#undef HAVE_ALLOCA - -/* Define if you have <alloca.h> and it should be used (not on Ultrix). */ -#undef HAVE_ALLOCA_H - -/* Define if you have a working `mmap' system call. */ -#undef HAVE_MMAP - -/* Define as __inline if that's what the C compiler calls it. */ -#undef inline - -/* Define to `long' if <sys/types.h> doesn't define. */ -#undef off_t - -/* Define if you need to in order for stat and other things to work. */ -#undef _POSIX_SOURCE - -/* Define as the return type of signal handlers (int or void). */ -#undef RETSIGTYPE - -/* Define to `unsigned' if <sys/types.h> doesn't define. */ -#undef size_t - -/* If using the C implementation of alloca, define if you know the - direction of stack growth for your system; otherwise it will be - automatically deduced at run-time. - STACK_DIRECTION > 0 => grows toward higher addresses - STACK_DIRECTION < 0 => grows toward lower addresses - STACK_DIRECTION = 0 => direction of growth unknown - */ -#undef STACK_DIRECTION - -/* Define if you have the ANSI C header files. */ -#undef STDC_HEADERS - -/* Define if your processor stores words with the most significant - byte first (like Motorola and SPARC, unlike Intel and VAX). */ -#undef WORDS_BIGENDIAN - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES - -/* Define if you have the __argz_count function. */ -#undef HAVE___ARGZ_COUNT - -/* Define if you have the __argz_next function. */ -#undef HAVE___ARGZ_NEXT - -/* Define if you have the __argz_stringify function. */ -#undef HAVE___ARGZ_STRINGIFY - -/* Define if you have the __setfpucw function. */ -#undef HAVE___SETFPUCW - -/* Define if you have the dcgettext function. */ -#undef HAVE_DCGETTEXT - -/* Define if you have the getcwd function. */ -#undef HAVE_GETCWD - -/* Define if you have the getpagesize function. */ -#undef HAVE_GETPAGESIZE - -/* Define if you have the getrusage function. */ -#undef HAVE_GETRUSAGE - -/* Define if you have the munmap function. */ -#undef HAVE_MUNMAP - -/* Define if you have the putenv function. */ -#undef HAVE_PUTENV - -/* Define if you have the setenv function. */ -#undef HAVE_SETENV - -/* Define if you have the setlocale function. */ -#undef HAVE_SETLOCALE - -/* Define if you have the sigaction function. */ -#undef HAVE_SIGACTION - -/* Define if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if you have the strcasecmp function. */ -#undef HAVE_STRCASECMP - -/* Define if you have the strchr function. */ -#undef HAVE_STRCHR - -/* Define if you have the time function. */ -#undef HAVE_TIME - -/* Define if you have the <argz.h> header file. */ -#undef HAVE_ARGZ_H - -/* Define if you have the <fcntl.h> header file. */ -#undef HAVE_FCNTL_H - -/* Define if you have the <fpu_control.h> header file. */ -#undef HAVE_FPU_CONTROL_H - -/* Define if you have the <limits.h> header file. */ -#undef HAVE_LIMITS_H - -/* Define if you have the <locale.h> header file. */ -#undef HAVE_LOCALE_H - -/* Define if you have the <malloc.h> header file. */ -#undef HAVE_MALLOC_H - -/* Define if you have the <nl_types.h> header file. */ -#undef HAVE_NL_TYPES_H - -/* Define if you have the <stdlib.h> header file. */ -#undef HAVE_STDLIB_H - -/* Define if you have the <string.h> header file. */ -#undef HAVE_STRING_H - -/* Define if you have the <strings.h> header file. */ -#undef HAVE_STRINGS_H - -/* Define if you have the <sys/param.h> header file. */ -#undef HAVE_SYS_PARAM_H - -/* Define if you have the <sys/resource.h> header file. */ -#undef HAVE_SYS_RESOURCE_H - -/* Define if you have the <sys/time.h> header file. */ -#undef HAVE_SYS_TIME_H - -/* Define if you have the <time.h> header file. */ -#undef HAVE_TIME_H - -/* Define if you have the <unistd.h> header file. */ -#undef HAVE_UNISTD_H - -/* Define if you have the <values.h> header file. */ -#undef HAVE_VALUES_H diff --git a/sim/d30v/configure b/sim/d30v/configure deleted file mode 100755 index 90a98a0..0000000 --- a/sim/d30v/configure +++ /dev/null @@ -1,4459 +0,0 @@ -#! /bin/sh - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -sim_inline="-DDEFAULT_INLINE=0" - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -# This file is derived from `gettext.m4'. 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D30V Simulator. */ -/* OBSOLETE Copyright (C) 1997, Free Software Foundation, Inc. */ -/* OBSOLETE Contributed by Cygnus Support. */ -/* OBSOLETE */ -/* OBSOLETE This file is part of GDB, the GNU debugger. */ -/* OBSOLETE */ -/* OBSOLETE This program is free software; you can redistribute it and/or modify */ -/* OBSOLETE it under the terms of the GNU General Public License as published by */ -/* OBSOLETE the Free Software Foundation; either version 2, or (at your option) */ -/* OBSOLETE any later version. */ -/* OBSOLETE */ -/* OBSOLETE This program is distributed in the hope that it will be useful, */ -/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ -/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ -/* OBSOLETE GNU General Public License for more details. */ -/* OBSOLETE */ -/* OBSOLETE You should have received a copy of the GNU General Public License along */ -/* OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., */ -/* OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE #ifndef _CPU_C_ */ -/* OBSOLETE #define _CPU_C_ */ -/* OBSOLETE */ -/* OBSOLETE #include "sim-main.h" */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE int */ -/* OBSOLETE is_wrong_slot (SIM_DESC sd, */ -/* OBSOLETE address_word cia, */ -/* OBSOLETE itable_index index) */ -/* OBSOLETE { */ -/* OBSOLETE switch (STATE_CPU (sd, 0)->unit) */ -/* OBSOLETE { */ -/* OBSOLETE case memory_unit: */ -/* OBSOLETE return !itable[index].option[itable_option_mu]; */ -/* OBSOLETE case integer_unit: */ -/* OBSOLETE return !itable[index].option[itable_option_iu]; */ -/* OBSOLETE case any_unit: */ -/* OBSOLETE return 0; */ -/* OBSOLETE default: */ -/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */ -/* OBSOLETE "internal error - is_wrong_slot - bad switch"); */ -/* OBSOLETE return -1; */ -/* OBSOLETE } */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE int */ -/* OBSOLETE is_condition_ok (SIM_DESC sd, */ -/* OBSOLETE address_word cia, */ -/* OBSOLETE int cond) */ -/* OBSOLETE { */ -/* OBSOLETE switch (cond) */ -/* OBSOLETE { */ -/* OBSOLETE case 0x0: */ -/* OBSOLETE return 1; */ -/* OBSOLETE case 0x1: */ -/* OBSOLETE return PSW_VAL(PSW_F0); */ -/* OBSOLETE case 0x2: */ -/* OBSOLETE return !PSW_VAL(PSW_F0); */ -/* OBSOLETE case 0x3: */ -/* OBSOLETE return PSW_VAL(PSW_F1); */ -/* OBSOLETE case 0x4: */ -/* OBSOLETE return !PSW_VAL(PSW_F1); */ -/* OBSOLETE case 0x5: */ -/* OBSOLETE return PSW_VAL(PSW_F0) && PSW_VAL(PSW_F1); */ -/* OBSOLETE case 0x6: */ -/* OBSOLETE return PSW_VAL(PSW_F0) && !PSW_VAL(PSW_F1); */ -/* OBSOLETE case 0x7: */ -/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */ -/* OBSOLETE "is_condition_ok - bad instruction condition bits"); */ -/* OBSOLETE return 0; */ -/* OBSOLETE default: */ -/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */ -/* OBSOLETE "internal error - is_condition_ok - bad switch"); */ -/* OBSOLETE return -1; */ -/* OBSOLETE } */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* If --trace-call, trace calls, remembering the current state of */ -/* OBSOLETE registers. */ */ -/* OBSOLETE */ -/* OBSOLETE typedef struct _call_stack { */ -/* OBSOLETE struct _call_stack *prev; */ -/* OBSOLETE registers regs; */ -/* OBSOLETE } call_stack; */ -/* OBSOLETE */ -/* OBSOLETE static call_stack *call_stack_head = (call_stack *)0; */ -/* OBSOLETE static int call_depth = 0; */ -/* OBSOLETE */ -/* OBSOLETE void call_occurred (SIM_DESC sd, */ -/* OBSOLETE sim_cpu *cpu, */ -/* OBSOLETE address_word cia, */ -/* OBSOLETE address_word nia) */ -/* OBSOLETE { */ -/* OBSOLETE call_stack *ptr = ZALLOC (call_stack); */ -/* OBSOLETE ptr->regs = cpu->regs; */ -/* OBSOLETE ptr->prev = call_stack_head; */ -/* OBSOLETE call_stack_head = ptr; */ -/* OBSOLETE */ -/* OBSOLETE trace_one_insn (sd, cpu, nia, 1, "", 0, "call", */ -/* OBSOLETE "Depth %3d, Return 0x%.8lx, Args 0x%.8lx 0x%.8lx", */ -/* OBSOLETE ++call_depth, (unsigned long)cia+8, (unsigned long)GPR[2], */ -/* OBSOLETE (unsigned long)GPR[3]); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* If --trace-call, trace returns, checking if any saved register was changed. */ */ -/* OBSOLETE */ -/* OBSOLETE void return_occurred (SIM_DESC sd, */ -/* OBSOLETE sim_cpu *cpu, */ -/* OBSOLETE address_word cia, */ -/* OBSOLETE address_word nia) */ -/* OBSOLETE { */ -/* OBSOLETE char buffer[1024]; */ -/* OBSOLETE char *buf_ptr = buffer; */ -/* OBSOLETE call_stack *ptr = call_stack_head; */ -/* OBSOLETE int regno; */ -/* OBSOLETE char *prefix = ", Registers that differ: "; */ -/* OBSOLETE */ -/* OBSOLETE *buf_ptr = '\0'; */ -/* OBSOLETE for (regno = 34; regno <= 63; regno++) { */ -/* OBSOLETE if (cpu->regs.general_purpose[regno] != ptr->regs.general_purpose[regno]) { */ -/* OBSOLETE sprintf (buf_ptr, "%sr%d", prefix, regno); */ -/* OBSOLETE buf_ptr += strlen (buf_ptr); */ -/* OBSOLETE prefix = " "; */ -/* OBSOLETE } */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE if (cpu->regs.accumulator[1] != ptr->regs.accumulator[1]) { */ -/* OBSOLETE sprintf (buf_ptr, "%sa1", prefix); */ -/* OBSOLETE buf_ptr += strlen (buf_ptr); */ -/* OBSOLETE prefix = " "; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "", 0, "return", */ -/* OBSOLETE "Depth %3d, Return 0x%.8lx, Ret. 0x%.8lx 0x%.8lx%s", */ -/* OBSOLETE call_depth--, (unsigned long)nia, (unsigned long)GPR[2], */ -/* OBSOLETE (unsigned long)GPR[3], buffer); */ -/* OBSOLETE */ -/* OBSOLETE call_stack_head = ptr->prev; */ -/* OBSOLETE zfree (ptr); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE /* Read/write functions for system call interface. */ */ -/* OBSOLETE int */ -/* OBSOLETE d30v_read_mem (host_callback *cb, */ -/* OBSOLETE struct cb_syscall *sc, */ -/* OBSOLETE unsigned long taddr, */ -/* OBSOLETE char *buf, */ -/* OBSOLETE int bytes) */ -/* OBSOLETE { */ -/* OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1; */ -/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */ -/* OBSOLETE */ -/* OBSOLETE return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE int */ -/* OBSOLETE d30v_write_mem (host_callback *cb, */ -/* OBSOLETE struct cb_syscall *sc, */ -/* OBSOLETE unsigned long taddr, */ -/* OBSOLETE const char *buf, */ -/* OBSOLETE int bytes) */ -/* OBSOLETE { */ -/* OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1; */ -/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */ -/* OBSOLETE */ -/* OBSOLETE return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE #endif /* _CPU_C_ */ */ diff --git a/sim/d30v/cpu.h b/sim/d30v/cpu.h deleted file mode 100644 index 1e9f3d8..0000000 --- a/sim/d30v/cpu.h +++ /dev/null @@ -1,249 +0,0 @@ -/* OBSOLETE /* Mitsubishi Electric Corp. D30V Simulator. */ -/* OBSOLETE Copyright (C) 1997, Free Software Foundation, Inc. */ -/* OBSOLETE Contributed by Cygnus Support. */ -/* OBSOLETE */ -/* OBSOLETE This file is part of GDB, the GNU debugger. */ -/* OBSOLETE */ -/* OBSOLETE This program is free software; you can redistribute it and/or modify */ -/* OBSOLETE it under the terms of the GNU General Public License as published by */ -/* OBSOLETE the Free Software Foundation; either version 2, or (at your option) */ -/* OBSOLETE any later version. */ -/* OBSOLETE */ -/* OBSOLETE This program is distributed in the hope that it will be useful, */ -/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ -/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ -/* OBSOLETE GNU General Public License for more details. */ -/* OBSOLETE */ -/* OBSOLETE You should have received a copy of the GNU General Public License along */ -/* OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., */ -/* OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE #ifndef _CPU_H_ */ -/* OBSOLETE #define _CPU_H_ */ -/* OBSOLETE */ -/* OBSOLETE enum { */ -/* OBSOLETE NR_GENERAL_PURPOSE_REGISTERS = 64, */ -/* OBSOLETE NR_CONTROL_REGISTERS = 64, */ -/* OBSOLETE NR_ACCUMULATORS = 2, */ -/* OBSOLETE STACK_POINTER_GPR = 63, */ -/* OBSOLETE NR_STACK_POINTERS = 2, */ -/* OBSOLETE }; */ -/* OBSOLETE */ -/* OBSOLETE enum { */ -/* OBSOLETE processor_status_word_cr = 0, */ -/* OBSOLETE backup_processor_status_word_cr = 1, */ -/* OBSOLETE program_counter_cr = 2, */ -/* OBSOLETE backup_program_counter_cr = 3, */ -/* OBSOLETE debug_backup_processor_status_word_cr = 4, */ -/* OBSOLETE debug_backup_program_counter_cr = 5, */ -/* OBSOLETE reserved_6_cr = 6, */ -/* OBSOLETE repeat_count_cr = 7, */ -/* OBSOLETE repeat_start_address_cr = 8, */ -/* OBSOLETE repeat_end_address_cr = 9, */ -/* OBSOLETE modulo_start_address_cr = 10, */ -/* OBSOLETE modulo_end_address_cr = 11, */ -/* OBSOLETE instruction_break_address_cr = 14, */ -/* OBSOLETE eit_vector_base_cr = 15, */ -/* OBSOLETE }; */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE enum { */ -/* OBSOLETE PSW_SM = 0, */ -/* OBSOLETE PSW_EA = 2, */ -/* OBSOLETE PSW_DB = 3, */ -/* OBSOLETE PSW_DS = 4, */ -/* OBSOLETE PSW_IE = 5, */ -/* OBSOLETE PSW_RP = 6, */ -/* OBSOLETE PSW_MD = 7, */ -/* OBSOLETE PSW_F0 = 17, */ -/* OBSOLETE PSW_F1 = 19, */ -/* OBSOLETE PSW_F2 = 21, */ -/* OBSOLETE PSW_F3 = 23, */ -/* OBSOLETE PSW_S = 25, */ -/* OBSOLETE PSW_V = 27, */ -/* OBSOLETE PSW_VA = 29, */ -/* OBSOLETE PSW_C = 31, */ -/* OBSOLETE }; */ -/* OBSOLETE */ -/* OBSOLETE /* aliases for PSW flag numbers (F0..F7) */ */ -/* OBSOLETE enum */ -/* OBSOLETE { */ -/* OBSOLETE PSW_S_FLAG = 4, */ -/* OBSOLETE }; */ -/* OBSOLETE */ -/* OBSOLETE typedef struct _registers { */ -/* OBSOLETE unsigned32 general_purpose[NR_GENERAL_PURPOSE_REGISTERS]; */ -/* OBSOLETE /* keep track of the stack pointer */ */ -/* OBSOLETE unsigned32 sp[NR_STACK_POINTERS]; /* swap with SP */ */ -/* OBSOLETE unsigned32 current_sp; */ -/* OBSOLETE unsigned32 control[NR_CONTROL_REGISTERS]; */ -/* OBSOLETE unsigned64 accumulator[NR_ACCUMULATORS]; */ -/* OBSOLETE } registers; */ -/* OBSOLETE */ -/* OBSOLETE typedef enum _cpu_units { */ -/* OBSOLETE memory_unit, */ -/* OBSOLETE integer_unit, */ -/* OBSOLETE any_unit, */ -/* OBSOLETE } cpu_units; */ -/* OBSOLETE */ -/* OBSOLETE /* In order to support parallel instructions, which one instruction can be */ -/* OBSOLETE writing to a register that is used as input to another, queue up the */ -/* OBSOLETE writes to the end of the instruction boundaries. */ */ -/* OBSOLETE */ -/* OBSOLETE #define MAX_WRITE32 16 */ -/* OBSOLETE #define MAX_WRITE64 2 */ -/* OBSOLETE */ -/* OBSOLETE struct _write32 { */ -/* OBSOLETE int num; /* # of 32-bit writes queued up */ */ -/* OBSOLETE unsigned32 value[MAX_WRITE32]; /* value to write */ */ -/* OBSOLETE unsigned32 mask[MAX_WRITE32]; /* mask to use */ */ -/* OBSOLETE unsigned32 *ptr[MAX_WRITE32]; /* address to write to */ */ -/* OBSOLETE }; */ -/* OBSOLETE */ -/* OBSOLETE struct _write64 { */ -/* OBSOLETE int num; /* # of 64-bit writes queued up */ */ -/* OBSOLETE unsigned64 value[MAX_WRITE64]; /* value to write */ */ -/* OBSOLETE unsigned64 *ptr[MAX_WRITE64]; /* address to write to */ */ -/* OBSOLETE }; */ -/* OBSOLETE */ -/* OBSOLETE struct _sim_cpu { */ -/* OBSOLETE cpu_units unit; */ -/* OBSOLETE registers regs; */ -/* OBSOLETE sim_cpu_base base; */ -/* OBSOLETE int trace_call_p; /* Whether to do call tracing. */ */ -/* OBSOLETE int trace_trap_p; /* If unknown traps dump out the regs */ */ -/* OBSOLETE int trace_action; /* trace bits at end of instructions */ */ -/* OBSOLETE int left_kills_right_p; /* left insn kills insn in right slot of -> */ */ -/* OBSOLETE int mvtsys_left_p; /* left insn was mvtsys */ */ -/* OBSOLETE int did_trap; /* we did a trap & need to finish it */ */ -/* OBSOLETE struct _write32 write32; /* queued up 32-bit writes */ */ -/* OBSOLETE struct _write64 write64; /* queued up 64-bit writes */ */ -/* OBSOLETE }; */ -/* OBSOLETE */ -/* OBSOLETE #define PC (STATE_CPU (sd, 0)->regs.control[program_counter_cr]) */ -/* OBSOLETE #define PSW (STATE_CPU (sd, 0)->regs.control[processor_status_word_cr]) */ -/* OBSOLETE #define PSWL (*AL2_4(&PSW)) */ -/* OBSOLETE #define PSWH (*AH2_4(&PSW)) */ -/* OBSOLETE #define DPSW (STATE_CPU (sd, 0)->regs.control[debug_backup_processor_status_word_cr]) */ -/* OBSOLETE #define DPC (STATE_CPU (sd, 0)->regs.control[debug_backup_program_counter_cr]) */ -/* OBSOLETE #define bPC (STATE_CPU (sd, 0)->regs.control[backup_program_counter_cr]) */ -/* OBSOLETE #define bPSW (STATE_CPU (sd, 0)->regs.control[backup_processor_status_word_cr]) */ -/* OBSOLETE #define RPT_C (STATE_CPU (sd, 0)->regs.control[repeat_count_cr]) */ -/* OBSOLETE #define RPT_S (STATE_CPU (sd, 0)->regs.control[repeat_start_address_cr]) */ -/* OBSOLETE #define RPT_E (STATE_CPU (sd, 0)->regs.control[repeat_end_address_cr]) */ -/* OBSOLETE #define MOD_S (STATE_CPU (sd, 0)->regs.control[modulo_start_address_cr]) */ -/* OBSOLETE #define MOD_E (STATE_CPU (sd, 0)->regs.control[modulo_end_address_cr]) */ -/* OBSOLETE #define IBA (STATE_CPU (sd, 0)->regs.control[instruction_break_address_cr]) */ -/* OBSOLETE #define EIT_VB (STATE_CPU (sd, 0)->regs.control[eit_vector_base_cr]) */ -/* OBSOLETE #define GPR (STATE_CPU (sd, 0)->regs.general_purpose) */ -/* OBSOLETE #define GPR_CLEAR(N) (GPR[(N)] = 0) */ -/* OBSOLETE #define ACC (STATE_CPU (sd, 0)->regs.accumulator) */ -/* OBSOLETE #define CREG (STATE_CPU (sd, 0)->regs.control) */ -/* OBSOLETE #define SP (GPR[STACK_POINTER_GPR]) */ -/* OBSOLETE #define TRACE_CALL_P (STATE_CPU (sd, 0)->trace_call_p) */ -/* OBSOLETE #define TRACE_TRAP_P (STATE_CPU (sd, 0)->trace_trap_p) */ -/* OBSOLETE #define TRACE_ACTION (STATE_CPU (sd, 0)->trace_action) */ -/* OBSOLETE #define TRACE_ACTION_CALL 0x00000001 /* call occurred */ */ -/* OBSOLETE #define TRACE_ACTION_RETURN 0x00000002 /* return occurred */ */ -/* OBSOLETE */ -/* OBSOLETE #define WRITE32 (STATE_CPU (sd, 0)->write32) */ -/* OBSOLETE #define WRITE32_NUM (WRITE32.num) */ -/* OBSOLETE #define WRITE32_PTR(N) (WRITE32.ptr[N]) */ -/* OBSOLETE #define WRITE32_MASK(N) (WRITE32.mask[N]) */ -/* OBSOLETE #define WRITE32_VALUE(N) (WRITE32.value[N]) */ -/* OBSOLETE #define WRITE32_QUEUE(PTR, VALUE) WRITE32_QUEUE_MASK (PTR, VALUE, 0xffffffff) */ -/* OBSOLETE */ -/* OBSOLETE #define WRITE32_QUEUE_MASK(PTR, VALUE, MASK) \ */ -/* OBSOLETE do { \ */ -/* OBSOLETE int _num = WRITE32_NUM; \ */ -/* OBSOLETE if (_num >= MAX_WRITE32) \ */ -/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, \ */ -/* OBSOLETE "Too many queued 32-bit writes"); \ */ -/* OBSOLETE WRITE32_PTR(_num) = PTR; \ */ -/* OBSOLETE WRITE32_VALUE(_num) = VALUE; \ */ -/* OBSOLETE WRITE32_MASK(_num) = MASK; \ */ -/* OBSOLETE WRITE32_NUM = _num+1; \ */ -/* OBSOLETE } while (0) */ -/* OBSOLETE */ -/* OBSOLETE #define DID_TRAP (STATE_CPU (sd, 0)->did_trap) */ -/* OBSOLETE */ -/* OBSOLETE #define WRITE64 (STATE_CPU (sd, 0)->write64) */ -/* OBSOLETE #define WRITE64_NUM (WRITE64.num) */ -/* OBSOLETE #define WRITE64_PTR(N) (WRITE64.ptr[N]) */ -/* OBSOLETE #define WRITE64_VALUE(N) (WRITE64.value[N]) */ -/* OBSOLETE #define WRITE64_QUEUE(PTR, VALUE) \ */ -/* OBSOLETE do { \ */ -/* OBSOLETE int _num = WRITE64_NUM; \ */ -/* OBSOLETE if (_num >= MAX_WRITE64) \ */ -/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, \ */ -/* OBSOLETE "Too many queued 64-bit writes"); \ */ -/* OBSOLETE WRITE64_PTR(_num) = PTR; \ */ -/* OBSOLETE WRITE64_VALUE(_num) = VALUE; \ */ -/* OBSOLETE WRITE64_NUM = _num+1; \ */ -/* OBSOLETE } while (0) */ -/* OBSOLETE */ -/* OBSOLETE #define DPSW_VALID 0xbf005555 */ -/* OBSOLETE #define PSW_VALID 0xb7005555 */ -/* OBSOLETE #define EIT_VALID 0xfffff000 /* From page 7-4 of D30V/MPEG arch. manual */ */ -/* OBSOLETE #define EIT_VB_DEFAULT 0xfffff000 /* Value of the EIT_VB register after reset */ */ -/* OBSOLETE */ -/* OBSOLETE /* Verify that the instruction is in the correct slot */ */ -/* OBSOLETE */ -/* OBSOLETE #define IS_WRONG_SLOT is_wrong_slot(sd, cia, MY_INDEX) */ -/* OBSOLETE extern int is_wrong_slot */ -/* OBSOLETE (SIM_DESC sd, */ -/* OBSOLETE address_word cia, */ -/* OBSOLETE itable_index index); */ -/* OBSOLETE */ -/* OBSOLETE #define IS_CONDITION_OK is_condition_ok(sd, cia, CCC) */ -/* OBSOLETE extern int is_condition_ok */ -/* OBSOLETE (SIM_DESC sd, */ -/* OBSOLETE address_word cia, */ -/* OBSOLETE int cond); */ -/* OBSOLETE */ -/* OBSOLETE #define SIM_HAVE_BREAKPOINTS /* Turn on internal breakpoint module */ */ -/* OBSOLETE */ -/* OBSOLETE /* Internal breakpoint instruction is syscall 5 */ */ -/* OBSOLETE #define SIM_BREAKPOINT {0x0e, 0x00, 0x00, 0x05} */ -/* OBSOLETE #define SIM_BREAKPOINT_SIZE (4) */ -/* OBSOLETE */ -/* OBSOLETE /* Call occurred */ */ -/* OBSOLETE extern void call_occurred */ -/* OBSOLETE (SIM_DESC sd, */ -/* OBSOLETE sim_cpu *cpu, */ -/* OBSOLETE address_word cia, */ -/* OBSOLETE address_word nia); */ -/* OBSOLETE */ -/* OBSOLETE /* Return occurred */ */ -/* OBSOLETE extern void return_occurred */ -/* OBSOLETE (SIM_DESC sd, */ -/* OBSOLETE sim_cpu *cpu, */ -/* OBSOLETE address_word cia, */ -/* OBSOLETE address_word nia); */ -/* OBSOLETE */ -/* OBSOLETE /* Whether to do call tracing. */ */ -/* OBSOLETE extern int d30v_call_trace_p; */ -/* OBSOLETE */ -/* OBSOLETE /* Read/write functions for system call interface. */ */ -/* OBSOLETE extern int d30v_read_mem */ -/* OBSOLETE (host_callback *cb, */ -/* OBSOLETE struct cb_syscall *sc, */ -/* OBSOLETE unsigned long taddr, */ -/* OBSOLETE char *buf, */ -/* OBSOLETE int bytes); */ -/* OBSOLETE */ -/* OBSOLETE extern int d30v_write_mem */ -/* OBSOLETE (host_callback *cb, */ -/* OBSOLETE struct cb_syscall *sc, */ -/* OBSOLETE unsigned long taddr, */ -/* OBSOLETE const char *buf, */ -/* OBSOLETE int bytes); */ -/* OBSOLETE */ -/* OBSOLETE /* Process all of the queued up writes in order now */ */ -/* OBSOLETE void unqueue_writes */ -/* OBSOLETE (SIM_DESC sd, */ -/* OBSOLETE sim_cpu *cpu, */ -/* OBSOLETE address_word cia); */ -/* OBSOLETE */ -/* OBSOLETE #endif /* _CPU_H_ */ */ diff --git a/sim/d30v/d30v-insns b/sim/d30v/d30v-insns deleted file mode 100644 index 10ce868..0000000 --- a/sim/d30v/d30v-insns +++ /dev/null @@ -1,2421 +0,0 @@ -# OBSOLETE // -*- C -*- -# OBSOLETE // Mitsubishi Electric Corp. D30V Simulator. -# OBSOLETE // Copyright (C) 1997, Free Software Foundation, Inc. -# OBSOLETE // Contributed by Cygnus Solutions Inc. -# OBSOLETE // -# OBSOLETE // This file is part of GDB, the GNU debugger. -# OBSOLETE // -# OBSOLETE // This program is free software; you can redistribute it and/or modify -# OBSOLETE // it under the terms of the GNU General Public License as published by -# OBSOLETE // the Free Software Foundation; either version 2 of the License, or -# OBSOLETE // (at your option) any later version. -# OBSOLETE // -# OBSOLETE // This program is distributed in the hope that it will be useful, -# OBSOLETE // but WITHOUT ANY WARRANTY; without even the implied warranty of -# OBSOLETE // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# OBSOLETE // GNU General Public License for more details. -# OBSOLETE // -# OBSOLETE // You should have received a copy of the GNU General Public License -# OBSOLETE // along with this program; if not, write to the Free Software -# OBSOLETE // Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# OBSOLETE // -# OBSOLETE -# OBSOLETE -# OBSOLETE define( _BRA, `1.*,CCC,000') -# OBSOLETE define( _LOGIC, `1.*,CCC,001') -# OBSOLETE define( _IMEM, `1.*,CCC,010') -# OBSOLETE define( _IALU1, `1.*,CCC,100') -# OBSOLETE define(_IALU2, `1.*,CCC,101') -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE define(_IMM6, `6.IMM_6S') -# OBSOLETE define(_IMM12, `12.IMM_12S') -# OBSOLETE define(_IMM18, `18.IMM_18S') -# OBSOLETE define(_IMM32, `6.IMM_6L,*,000,8.IMM_8L,00,18.IMM_18L') -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // The following is called when ever an illegal instruction is -# OBSOLETE // encountered -# OBSOLETE ::internal::illegal -# OBSOLETE sim_io_eprintf (sd, "illegal instruction at 0x%lx\n", (long) cia); -# OBSOLETE sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL); -# OBSOLETE -# OBSOLETE // The following is called when ever an instruction in the wrong -# OBSOLETE // slot is encountered. -# OBSOLETE ::internal::wrong_slot -# OBSOLETE sim_io_eprintf (sd, "wrong slot at 0x%lx\n", (long) cia); -# OBSOLETE sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // Something illegal that can be used to contact the simulator emul -# OBSOLETE // library. -# OBSOLETE define(_EMUL, `1.*,CCC,111') -# OBSOLETE -# OBSOLETE void::function::do_emul:int imm -# OBSOLETE /* temp hack - later replace with real interface */ -# OBSOLETE enum { -# OBSOLETE param1 = 2, param2, param3, param4 -# OBSOLETE }; -# OBSOLETE switch (imm) { -# OBSOLETE case 0: -# OBSOLETE { -# OBSOLETE sim_engine_abort (SD, CPU, cia, "UNIX call emulation unsupported"); -# OBSOLETE break; -# OBSOLETE } -# OBSOLETE case 1: -# OBSOLETE /* Trap 1 - prints a string */ -# OBSOLETE { -# OBSOLETE address_word str = GPR[param1]; -# OBSOLETE char chr; -# OBSOLETE while (1) { -# OBSOLETE chr = MEM (unsigned, str, 1); -# OBSOLETE if (chr == '\0') break; -# OBSOLETE sim_io_write_stdout (sd, &chr, sizeof chr); -# OBSOLETE str++; -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE } -# OBSOLETE case 3: -# OBSOLETE /* Trap 3 - writes a character */ -# OBSOLETE { -# OBSOLETE char chr = GPR[param1]; -# OBSOLETE sim_io_write_stdout (sd, &chr, sizeof chr); -# OBSOLETE break; -# OBSOLETE } -# OBSOLETE case 4: -# OBSOLETE /* Trap 4 exits with status in [param1] */ -# OBSOLETE { -# OBSOLETE sim_engine_halt (SD, CPU, NULL, cia, sim_exited, GPR[param1]); -# OBSOLETE break; -# OBSOLETE } -# OBSOLETE case 5: -# OBSOLETE /* Trap 5 breakpoints. If the breakpoint system knows about this, it -# OBSOLETE won't return. Otherwise, we fall through to treat this as an -# OBSOLETE unknown instruction. */ -# OBSOLETE { -# OBSOLETE sim_handle_breakpoint (SD, CPU, cia); -# OBSOLETE /* Fall through to default case.*/ -# OBSOLETE } -# OBSOLETE default: -# OBSOLETE sim_engine_abort (SD, CPU, cia, "Unknown monitor call %d", imm); -# OBSOLETE } -# OBSOLETE -# OBSOLETE _EMUL,00000,00,6.*,6.*,IMM_6S:EMUL:short,emul:iu,mu:EMUL -# OBSOLETE "syscall <imm>" -# OBSOLETE do_emul (_SD, imm); -# OBSOLETE _BRA,00000,00,6.**,6.**,_IMM32:BRA:long:iu,mu:EMUL long -# OBSOLETE "syscall <imm>" -# OBSOLETE do_emul (_SD, imm); -# OBSOLETE -# OBSOLETE // ABS -# OBSOLETE -# OBSOLETE _IALU1,01000,00,6.RA,6.RB,6.**:IALU1:short:iu,mu:ABS -# OBSOLETE "abs r<RA>, r<RB>" -# OBSOLETE WRITE32_QUEUE (Ra, abs(Rb)); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ADD -# OBSOLETE -# OBSOLETE void::function::do_add:unsigned32 *ra, unsigned32 rb, unsigned32 imm -# OBSOLETE ALU_BEGIN(rb); -# OBSOLETE ALU_ADDC(imm); -# OBSOLETE ALU_END(ra); -# OBSOLETE -# OBSOLETE _IALU1,00000,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD -# OBSOLETE "add r<RA>, r<RB>, r<RC>" -# OBSOLETE do_add (_SD, Ra, Rb, Rc); -# OBSOLETE _IALU1,00000,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD imm -# OBSOLETE "add r<RA>, r<RB>, <imm>" -# OBSOLETE do_add (_SD, Ra, Rb, imm); -# OBSOLETE _IALU1,00000,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD imm long -# OBSOLETE "add r<RA>, r<RB>, <imm>" -# OBSOLETE do_add (_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ADD2H -# OBSOLETE -# OBSOLETE void::function::do_add2h:signed32 *ra, signed32 rb, signed32 imm -# OBSOLETE unsigned16 ah2 = VH2_4(rb) + VH2_4(imm); -# OBSOLETE unsigned16 al2 = VL2_4(rb) + VL2_4(imm); -# OBSOLETE WRITE32_QUEUE (ra, (ah2 << 16) | al2); -# OBSOLETE -# OBSOLETE _IALU1,00001,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD2H -# OBSOLETE "add2h r<RA>, r<RB>, r<RC>" -# OBSOLETE do_add2h (_SD, Ra, Rb, Rc); -# OBSOLETE _IALU1,00001,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD2H imm -# OBSOLETE "add2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_add2h (_SD, Ra, Rb, immHL); -# OBSOLETE _IALU1,00001,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD2H imm long -# OBSOLETE "add2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_add2h (_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ADDC -# OBSOLETE -# OBSOLETE void::function::do_addc:unsigned32 *ra, unsigned32 rb, unsigned32 imm -# OBSOLETE ALU_BEGIN(rb); -# OBSOLETE ALU_ADDC_C(imm, ALU_CARRY); -# OBSOLETE ALU_END(ra); -# OBSOLETE -# OBSOLETE _IALU1,00100,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDC -# OBSOLETE "addc r<RA>, r<RB>, r<RC>" -# OBSOLETE do_addc (_SD, Ra, Rb, Rc); -# OBSOLETE _IALU1,00100,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDC imm -# OBSOLETE "addc r<RA>, r<RB>, <imm>" -# OBSOLETE do_addc (_SD, Ra, Rb, imm); -# OBSOLETE _IALU1,00100,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDC imm long -# OBSOLETE "addc r<RA>, r<RB>, <imm>" -# OBSOLETE do_addc (_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ADDHppp -# OBSOLETE -# OBSOLETE void::function::do_addh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE switch (ppp) { -# OBSOLETE case 0x0: /* LLL */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VL2_4(rb)); -# OBSOLETE ALU16_ADDC(VL2_4(src)); -# OBSOLETE ALU16_END(ra, 0); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x1: /* LLH */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VL2_4(rb)); -# OBSOLETE ALU16_ADDC(VH2_4(src)); -# OBSOLETE ALU16_END(ra, 0); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x2: /* LHL */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VH2_4(rb)); -# OBSOLETE ALU16_ADDC(VL2_4(src)); -# OBSOLETE ALU16_END(ra, 0); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x3: /* LHH */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VH2_4(rb)); -# OBSOLETE ALU16_ADDC(VH2_4(src)); -# OBSOLETE ALU16_END(ra, 0); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x4: /* HLL */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VL2_4(rb)); -# OBSOLETE ALU16_ADDC(VL2_4(src)); -# OBSOLETE ALU16_END(ra, 1); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x5: /* HLH */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VL2_4(rb)); -# OBSOLETE ALU16_ADDC(VH2_4(src)); -# OBSOLETE ALU16_END(ra, 1); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x6: /* HHL */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VH2_4(rb)); -# OBSOLETE ALU16_ADDC(VL2_4(src)); -# OBSOLETE ALU16_END(ra, 1); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x7: /* HHH */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VH2_4(rb)); -# OBSOLETE ALU16_ADDC(VH2_4(src)); -# OBSOLETE ALU16_END(ra, 1); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE default: -# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_addh_ppp - internal error - bad switch"); -# OBSOLETE } -# OBSOLETE ::%s::ppp:int ppp -# OBSOLETE switch (ppp) -# OBSOLETE { -# OBSOLETE case 0x0: return "lll"; -# OBSOLETE case 0x1: return "llh"; -# OBSOLETE case 0x2: return "lhl"; -# OBSOLETE case 0x3: return "lhh"; -# OBSOLETE case 0x4: return "hll"; -# OBSOLETE case 0x5: return "hlh"; -# OBSOLETE case 0x6: return "hhl"; -# OBSOLETE case 0x7: return "hhh"; -# OBSOLETE default: return "?"; -# OBSOLETE } -# OBSOLETE -# OBSOLETE _IALU1,10,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDHppp -# OBSOLETE "addh%s<ppp> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_addh_ppp(_SD, ppp, Ra, Rb, Rc); -# OBSOLETE _IALU1,10,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDHppp imm -# OBSOLETE "addh%s<ppp> r<RA>, r<RB>, <imm>" -# OBSOLETE do_addh_ppp(_SD, ppp, Ra, Rb, immHL); -# OBSOLETE _IALU1,10,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDHppp imm long -# OBSOLETE "addh%s<ppp> r<RA>, r<RB>, <imm>" -# OBSOLETE do_addh_ppp(_SD, ppp, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ADDS -# OBSOLETE -# OBSOLETE void::function::do_adds:unsigned32 *ra, unsigned32 rb, unsigned32 imm -# OBSOLETE ALU_BEGIN(rb); -# OBSOLETE ALU_ADDC(EXTRACTED32(imm, 0, 0)); -# OBSOLETE ALU_END(ra); -# OBSOLETE -# OBSOLETE _IALU1,00110,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS -# OBSOLETE "adds r<RA>, r<RB>, r<RC>" -# OBSOLETE do_adds (_SD, Ra, Rb, Rc); -# OBSOLETE _IALU1,00110,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS imm -# OBSOLETE "adds r<RA>, r<RB>, <imm>" -# OBSOLETE do_adds (_SD, Ra, Rb, imm); -# OBSOLETE _IALU1,00110,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS imm long -# OBSOLETE "adds r<RA>, r<RB>, <imm>" -# OBSOLETE do_adds (_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ADDS2H -# OBSOLETE -# OBSOLETE void::function::do_adds2h:unsigned32 *ra, unsigned32 rb, unsigned32 immHL -# OBSOLETE unsigned16 high = VH2_4(rb) + EXTRACTED32(immHL, 0, 0); -# OBSOLETE unsigned16 low = VL2_4(rb) + EXTRACTED32(immHL, 16, 16); -# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low); -# OBSOLETE -# OBSOLETE _IALU1,00111,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS2H -# OBSOLETE "adds2h r<RA>, r<RB>, r<RC>" -# OBSOLETE do_adds2h (_SD, Ra, Rb, Rc); -# OBSOLETE _IALU1,00111,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS2H imm -# OBSOLETE "adds2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_adds2h (_SD, Ra, Rb, immHL); -# OBSOLETE _IALU1,00111,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS2H imm long -# OBSOLETE "adds2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_adds2h (_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // AND -# OBSOLETE -# OBSOLETE _LOGIC,11000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:AND -# OBSOLETE "and r<RA>, r<RB>, r<RC>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb & Rc); -# OBSOLETE _LOGIC,11000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:AND imm -# OBSOLETE "and r<RA>, r<RB>, <imm>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb & imm); -# OBSOLETE _LOGIC,11000,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:AND imm long -# OBSOLETE "and r<RA>, r<RB>, <imm>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb & imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE // ANDFG -# OBSOLETE -# OBSOLETE _LOGIC,01000,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:Logical AND Flags -# OBSOLETE "andfg f<FA>, f<FB>, f<FC>" -# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & PSW_FLAG_VAL(FC)); -# OBSOLETE _LOGIC,01000,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:Logical AND Flags imm -# OBSOLETE "andfg f<FA>, f<FB>, <imm_6>" -# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & (imm_6 & 1)); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // AVG -# OBSOLETE -# OBSOLETE void::function::do_avg:unsigned32 *ra, unsigned32 rb, unsigned32 imm -# OBSOLETE WRITE32_QUEUE (ra, ((signed64)(signed32)rb + (signed64)(signed32)imm + 1) >> 1); -# OBSOLETE -# OBSOLETE _IALU1,01010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG -# OBSOLETE "avg r<RA>, r<RB>, r<RC>" -# OBSOLETE do_avg (_SD, Ra, Rb, Rc); -# OBSOLETE _IALU1,01010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG imm -# OBSOLETE "avg r<RA>, r<RB>, <imm>" -# OBSOLETE do_avg (_SD, Ra, Rb, imm); -# OBSOLETE _IALU1,01010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG imm long -# OBSOLETE "avg r<RA>, r<RB>, <imm>" -# OBSOLETE do_avg (_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // AVG2H -# OBSOLETE -# OBSOLETE void::function::do_avg2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm -# OBSOLETE unsigned16 high = ((signed32)(signed16)VH2_4(rb) + (signed32)(signed16)VH2_4(imm) + 1) >> 1; -# OBSOLETE unsigned16 low = ((signed32)(signed16)VL2_4(rb) + (signed32)(signed16)VL2_4(imm) + 1) >> 1; -# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low); -# OBSOLETE -# OBSOLETE _IALU1,01011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG2H -# OBSOLETE "avg2h r<RA>, r<RB>, r<RC>" -# OBSOLETE do_avg2h (_SD, Ra, Rb, Rc); -# OBSOLETE _IALU1,01011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG2H imm -# OBSOLETE "avg2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_avg2h (_SD, Ra, Rb, immHL); -# OBSOLETE _IALU1,01011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG2H imm long -# OBSOLETE "avg2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_avg2h (_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // BCLR -# OBSOLETE -# OBSOLETE _LOGIC,00011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BCLR -# OBSOLETE "bclr r<RA>, r<RB>, r<RC>" -# OBSOLETE WRITE32_QUEUE(Ra, Rb & ~BIT32((Rc) % 32)); -# OBSOLETE _LOGIC,00011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BCLR imm -# OBSOLETE "bclr r<RA>, r<RB>, <imm>" -# OBSOLETE WRITE32_QUEUE(Ra, Rb & ~BIT32((imm) % 32)); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // BNOT -# OBSOLETE -# OBSOLETE _LOGIC,00001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BNOT -# OBSOLETE "bnot r<RA>, r<RB>, r<RC>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ BIT32((Rc) % 32)); -# OBSOLETE _LOGIC,00001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BNOT imm -# OBSOLETE "bnot r<RA>, r<RB>, <imm>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ BIT32((imm) % 32)); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // BRA -# OBSOLETE -# OBSOLETE _BRA,00000,00,6.**,6.**,6.RC:BRA:short:mu:BRA -# OBSOLETE "bra r<RC>" -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE _BRA,00000,10,_IMM18:BRA:short:mu:BRA imm -# OBSOLETE "bra <pcdisp>" -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE _BRA,00000,10,6.**,6.**,_IMM32:BRA:long:mu:BRA imm long -# OBSOLETE "bra <pcdisp>" -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // BRATNZ -# OBSOLETE -# OBSOLETE _BRA,00100,01,6.RA,6.**,6.RC:BRA:short:mu:BRATNZ -# OBSOLETE "bratnz r<RC>" -# OBSOLETE if (*Ra != 0) -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE _BRA,00100,11,6.RA,_IMM12:BRA:short:mu:BRATNZ imm -# OBSOLETE "bratnz <pcdisp>" -# OBSOLETE if (*Ra != 0) -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE _BRA,00100,11,6.RA,6.**,_IMM32:BRA:long:mu:BRATNZ imm long -# OBSOLETE "bratnz <pcdisp>" -# OBSOLETE if (*Ra != 0) -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // BRATZR -# OBSOLETE -# OBSOLETE _BRA,00100,00,6.RA,6.**,6.RC:BRA:short:mu:BRATZR -# OBSOLETE "bratzr r<RC>" -# OBSOLETE if (val_Ra == 0) -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE _BRA,00100,10,6.RA,_IMM12:BRA:short:mu:BRATZR imm -# OBSOLETE "bratzr <pcdisp>" -# OBSOLETE if (val_Ra == 0) -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE _BRA,00100,10,6.RA,6.**,_IMM32:BRA:long:mu:BRATZR imm long -# OBSOLETE "bratzr <pcdisp>" -# OBSOLETE if (val_Ra == 0) -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // BSET -# OBSOLETE -# OBSOLETE _LOGIC,00010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BSET -# OBSOLETE "bset r<RA>, r<RB>, r<RC>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb | BIT32((Rc) % 32)); -# OBSOLETE _LOGIC,00010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BSET imm -# OBSOLETE "bset r<RA>, r<RB>, <imm>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb | BIT32((imm) % 32)); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // BSR -# OBSOLETE -# OBSOLETE _BRA,00010,00,6.**,6.**,6.RC:BRA:short:mu:BSR -# OBSOLETE "bsr r<RC>" -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE _BRA,00010,10,_IMM18:BRA:short:mu:BSR imm -# OBSOLETE "bsr <pcdisp>" -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE _BRA,00010,10,6.**,6.**,_IMM32:BRA:long:mu:BSR imm long -# OBSOLETE "bsr <pcdisp>" -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE -# OBSOLETE -# OBSOLETE // BSRTNZ -# OBSOLETE -# OBSOLETE _BRA,00110,01,6.RA,6.**,6.RC:BRA:short:mu:BSRTNZ -# OBSOLETE "bsrtnz r<RC>" -# OBSOLETE if (val_Ra != 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE -# OBSOLETE _BRA,00110,11,6.RA,_IMM12:BRA:short:mu:BSRTNZ imm -# OBSOLETE "bsrtnz <pcdisp>" -# OBSOLETE if (val_Ra != 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE -# OBSOLETE _BRA,00110,11,6.RA,6.**,_IMM32:BRA:long:mu:BSRTNZ imm long -# OBSOLETE "bsrtnz <pcdisp>" -# OBSOLETE if (val_Ra != 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE -# OBSOLETE -# OBSOLETE // BSRTZR -# OBSOLETE -# OBSOLETE _BRA,00110,00,6.RA,6.**,6.RC:BRA:short:mu:BSRTZR -# OBSOLETE "bsrtzr r<RC>" -# OBSOLETE if (val_Ra == 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE -# OBSOLETE _BRA,00110,10,6.RA,_IMM12:BRA:short:mu:BSRTZR imm -# OBSOLETE "bsrtzr <pcdisp>" -# OBSOLETE if (val_Ra == 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE -# OBSOLETE _BRA,00110,10,6.RA,6.**,_IMM32:BRA:long:mu:BSRTZR imm long -# OBSOLETE "bsrtzr <pcdisp>" -# OBSOLETE if (val_Ra == 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = cia + pcdisp; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE -# OBSOLETE -# OBSOLETE // BTST -# OBSOLETE -# OBSOLETE _LOGIC,00000,00,***,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:BTST -# OBSOLETE "btst f<FA>, r<RB>, r<RC>" -# OBSOLETE int bit = (Rc) % 32; -# OBSOLETE PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit)); -# OBSOLETE _LOGIC,00000,10,***,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:BTST imm -# OBSOLETE "btst f<FA>, r<RB>, <imm>" -# OBSOLETE int bit = imm % 32; -# OBSOLETE PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit)); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // CMPcc -# OBSOLETE -# OBSOLETE void::function::do_cmp_cc:int cc, int fa, signed32 rb, signed32 rc -# OBSOLETE int value = 0; -# OBSOLETE switch (cc) { -# OBSOLETE case 0: /* EQ */ -# OBSOLETE value = (rb == rc); -# OBSOLETE break; -# OBSOLETE case 1: /* NE */ -# OBSOLETE value = (rb != rc); -# OBSOLETE break; -# OBSOLETE case 2: /* GT */ -# OBSOLETE value = (rb > rc); -# OBSOLETE break; -# OBSOLETE case 3: /* GE */ -# OBSOLETE value = (rb >= rc); -# OBSOLETE break; -# OBSOLETE case 4: /* LT */ -# OBSOLETE value = (rb < rc); -# OBSOLETE break; -# OBSOLETE case 5: /* LE */ -# OBSOLETE value = (rb <= rc); -# OBSOLETE break; -# OBSOLETE case 6: /* PS */ -# OBSOLETE value = ((rb >= 0) && (rc >= 0)); -# OBSOLETE break; -# OBSOLETE case 7: /* NG */ -# OBSOLETE value = ((rb < 0) && (rc < 0)); -# OBSOLETE break; -# OBSOLETE default: -# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_cmp_cc - internal error - bad switch (%d)", cc); -# OBSOLETE } -# OBSOLETE PSW_FLAG_SET_QUEUE(fa, value); -# OBSOLETE -# OBSOLETE ::%s::ccc:int ccc -# OBSOLETE switch (ccc) -# OBSOLETE { -# OBSOLETE case 0: return "eq"; -# OBSOLETE case 1: return "ne"; -# OBSOLETE case 2: return "gt"; -# OBSOLETE case 3: return "ge"; -# OBSOLETE case 4: return "lt"; -# OBSOLETE case 5: return "le"; -# OBSOLETE case 6: return "ps"; -# OBSOLETE case 7: return "ng"; -# OBSOLETE default: return "?"; -# OBSOLETE } -# OBSOLETE -# OBSOLETE _LOGIC,01100,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPcc -# OBSOLETE "cmp%s<ccc> f<FA>, r<RB>, r<RC>" -# OBSOLETE do_cmp_cc(_SD, ccc, FA, Rb, Rc); -# OBSOLETE _LOGIC,01100,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPcc imm -# OBSOLETE "cmp%s<ccc> f<FA>, r<RB>, <imm>" -# OBSOLETE do_cmp_cc(_SD, ccc, FA, Rb, imm); -# OBSOLETE _LOGIC,01100,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPcc imm long -# OBSOLETE "cmp%s<ccc> f<FA>, r<RB>, <imm>" -# OBSOLETE do_cmp_cc(_SD, ccc, FA, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // CMPUcc -# OBSOLETE -# OBSOLETE void::function::do_cmpu_cc:int cc, int fa, unsigned32 rb, unsigned32 rc -# OBSOLETE int value = 0; -# OBSOLETE switch (cc) { -# OBSOLETE case 2: /* GT */ -# OBSOLETE value = (rb > rc); -# OBSOLETE break; -# OBSOLETE case 3: /* GE */ -# OBSOLETE value = (rb >= rc); -# OBSOLETE break; -# OBSOLETE case 4: /* LT */ -# OBSOLETE value = (rb < rc); -# OBSOLETE break; -# OBSOLETE case 5: /* LE */ -# OBSOLETE value = (rb <= rc); -# OBSOLETE break; -# OBSOLETE default: -# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_cmpu_cc - internal error - bad switch (%d)", cc); -# OBSOLETE } -# OBSOLETE PSW_FLAG_SET_QUEUE(fa, value); -# OBSOLETE -# OBSOLETE _LOGIC,01101,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPUcc -# OBSOLETE "cmpu%s<ccc> f<FA>, r<RB>, r<RC>" -# OBSOLETE do_cmpu_cc(_SD, ccc, FA, Rb, Rc); -# OBSOLETE _LOGIC,01101,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPUcc imm -# OBSOLETE "cmpu%s<ccc> f<FA>, r<RB>, <imm>" -# OBSOLETE do_cmpu_cc(_SD, ccc, FA, Rb, imm_6u); -# OBSOLETE _LOGIC,01101,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPUcc imm long -# OBSOLETE "cmpu%s<ccc> f<FA>, r<RB>, <imm>" -# OBSOLETE do_cmpu_cc(_SD, ccc, FA, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // DBRA -# OBSOLETE -# OBSOLETE void::function::do_dbra:address_word pcdisp, unsigned32 ra -# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp); -# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7)); -# OBSOLETE -# OBSOLETE _BRA,10000,00,6.RA,6.**,6.RC:BRA:short:mu:DBRA -# OBSOLETE "dbra r<RA>, r<RC>" -# OBSOLETE do_dbra(_SD, pcdisp, val_Ra); -# OBSOLETE _BRA,10000,10,6.RA,_IMM12:BRA:short:mu:DBRA imm -# OBSOLETE "dbra r<RA>, <pcdisp>" -# OBSOLETE do_dbra(_SD, pcdisp, val_Ra); -# OBSOLETE _BRA,10000,10,6.RA,6.**,_IMM32:BRA:long:mu:DBRA imm long -# OBSOLETE "dbra r<RA>, <pcdisp>" -# OBSOLETE do_dbra(_SD, pcdisp, val_Ra); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // DBRAI -# OBSOLETE -# OBSOLETE void::function::do_dbrai:address_word pcdisp, unsigned32 imm -# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp); -# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); -# OBSOLETE -# OBSOLETE _BRA,10100,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBRAI -# OBSOLETE "dbrai <IMM_6>, r<RC>" -# OBSOLETE do_dbrai(_SD, pcdisp, IMM_6); -# OBSOLETE _BRA,10100,10,6.IMM_6,_IMM12:BRA:short:mu:DBRAI imm -# OBSOLETE "dbrai <IMM_6>, <pcdisp>" -# OBSOLETE do_dbrai(_SD, pcdisp, IMM_6); -# OBSOLETE _BRA,10100,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBRAI imm long -# OBSOLETE "dbrai <IMM_6>, <pcdisp>" -# OBSOLETE do_dbrai(_SD, pcdisp, IMM_6); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // DBSR -# OBSOLETE -# OBSOLETE void::function::do_dbsr:address_word pcdisp, unsigned32 ra -# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp); -# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + ra); -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + ra + 8); -# OBSOLETE -# OBSOLETE _BRA,10010,00,6.RA,6.**,6.RC:BRA:short:mu:DBSR -# OBSOLETE "dbsr r<RA>, r<RC>" -# OBSOLETE do_dbsr(_SD, pcdisp, val_Ra); -# OBSOLETE _BRA,10010,10,6.RA,_IMM12:BRA:short:mu:DBSR imm -# OBSOLETE "dbsr r<RA>, <pcdisp>" -# OBSOLETE do_dbsr(_SD, pcdisp, val_Ra); -# OBSOLETE _BRA,10010,10,6.RA,6.**,_IMM32:BRA:long:mu:DBSR imm long -# OBSOLETE "dbsr r<RA>, <pcdisp>" -# OBSOLETE do_dbsr(_SD, pcdisp, val_Ra); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // DBSRI -# OBSOLETE -# OBSOLETE void::function::do_dbsri:address_word pcdisp, unsigned32 imm -# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp); -# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8); -# OBSOLETE -# OBSOLETE _BRA,10110,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBSRI -# OBSOLETE "dbsri <IMM_6>, r<RC>" -# OBSOLETE do_dbsri(_SD, pcdisp, IMM_6); -# OBSOLETE _BRA,10110,10,6.IMM_6,_IMM12:BRA:short:mu:DBSRI imm -# OBSOLETE "dbsri <IMM_6>, <pcdisp>" -# OBSOLETE do_dbsri(_SD, pcdisp, IMM_6); -# OBSOLETE _BRA,10110,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBSRI imm long -# OBSOLETE "dbsri <IMM_6>, <pcdisp>" -# OBSOLETE do_dbsri(_SD, pcdisp, IMM_6); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // DBT -# OBSOLETE -# OBSOLETE -# OBSOLETE _BRA,01011,00,6.**,6.**,6.**:BRA:short:mu:DBT -# OBSOLETE "dbt" -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE { -# OBSOLETE WRITE32_QUEUE (&DPC, RPT_S); -# OBSOLETE if (RPT_C == 0) -# OBSOLETE PSW_SET (PSW_RP, 0); -# OBSOLETE } -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&DPC, cia + 8); -# OBSOLETE DID_TRAP = 2; -# OBSOLETE nia = 0xfffff120; /* debug_trap_address */ -# OBSOLETE -# OBSOLETE // DJMP -# OBSOLETE -# OBSOLETE void::function::do_djmp:address_word pcdisp, unsigned32 ra -# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp); -# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7)); -# OBSOLETE -# OBSOLETE _BRA,10001,00,6.RA,6.**,6.RC:BRA:short:mu:DJMP -# OBSOLETE "djmp r<RA>, r<RC>" -# OBSOLETE do_djmp(_SD, pcdisp, val_Ra); -# OBSOLETE _BRA,10001,10,6.RA,_IMM12:BRA:short:mu:DJMP imm -# OBSOLETE "djmp r<RA>, <pcdisp>" -# OBSOLETE do_djmp(_SD, pcdisp, val_Ra); -# OBSOLETE _BRA,10001,10,6.RA,6.**,_IMM32:BRA:long:mu:DJMP imm long -# OBSOLETE "djmp r<RA>, <pcdisp>" -# OBSOLETE do_djmp(_SD, pcdisp, val_Ra); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // DJMPI -# OBSOLETE -# OBSOLETE void::function::do_djmpi:address_word pcdisp, unsigned32 imm -# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp); -# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); -# OBSOLETE -# OBSOLETE _BRA,10101,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJMPI -# OBSOLETE "djmpi <IMM_6>, r<RC>" -# OBSOLETE do_djmpi(_SD, pcdisp, IMM_6); -# OBSOLETE _BRA,10101,10,6.IMM_6,_IMM12:BRA:short:mu:DJMPI imm -# OBSOLETE "djmpi <IMM_6>, <pcdisp>" -# OBSOLETE do_djmpi(_SD, pcdisp, IMM_6); -# OBSOLETE _BRA,10101,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJMPI imm long -# OBSOLETE "djmpi <IMM_6>, <pcdisp>" -# OBSOLETE do_djmpi(_SD, pcdisp, IMM_6); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // DJSR -# OBSOLETE -# OBSOLETE void::function::do_djsr:address_word pcdisp, unsigned32 ra -# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp); -# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7)); -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + (ra & ~0x7) + 8); -# OBSOLETE -# OBSOLETE _BRA,10011,00,6.RA,6.**,6.RC:BRA:short:mu:DJSR -# OBSOLETE "djsr r<RA>, r<RC>" -# OBSOLETE do_djsr(_SD, pcdisp, val_Ra); -# OBSOLETE _BRA,10011,10,6.RA,_IMM12:BRA:short:mu:DJSR imm -# OBSOLETE "djsr r<RA>, <pcdisp>" -# OBSOLETE do_djsr(_SD, pcdisp, val_Ra); -# OBSOLETE _BRA,10011,10,6.RA,6.**,_IMM32:BRA:long:mu:DJSR imm long -# OBSOLETE "djsr r<RA>, <pcdisp>" -# OBSOLETE do_djsr(_SD, pcdisp, val_Ra); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // DJSRI -# OBSOLETE -# OBSOLETE void::function::do_djsri:address_word pcdisp, unsigned32 imm -# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_C, 1); -# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp); -# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3)); -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8); -# OBSOLETE -# OBSOLETE _BRA,10111,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJSRI -# OBSOLETE "djsri <IMM_6>, r<RC>" -# OBSOLETE do_djsri(_SD, pcdisp, IMM_6); -# OBSOLETE _BRA,10111,10,6.IMM_6,_IMM12:BRA:short:mu:DJSRI imm -# OBSOLETE "djsri <IMM_6>, <pcdisp>" -# OBSOLETE do_djsri(_SD, pcdisp, IMM_6); -# OBSOLETE _BRA,10111,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJSRI imm long -# OBSOLETE "djsri <IMM_6>, <pcdisp>" -# OBSOLETE do_djsri(_SD, pcdisp, IMM_6); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // JMP -# OBSOLETE -# OBSOLETE _BRA,00001,00,6.**,6.**,6.RC:BRA:short:mu:JMP -# OBSOLETE "jmp r<RC>" -# OBSOLETE nia = pcaddr; -# OBSOLETE if (RC == 62 && TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_RETURN; -# OBSOLETE _BRA,00001,10,_IMM18:BRA:short:mu:JMP imm -# OBSOLETE "jmp <pcdisp>" -# OBSOLETE nia = pcaddr; -# OBSOLETE _BRA,00001,10,6.**,6.**,_IMM32:BRA:long:mu:JMP imm long -# OBSOLETE "jmp <pcdisp>" -# OBSOLETE nia = pcaddr; -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // JMPTNZ -# OBSOLETE -# OBSOLETE _BRA,00101,01,6.RA,6.**,6.RC:BRA:short:mu:JMPTNZ -# OBSOLETE "jmptnz r<RC>" -# OBSOLETE if (val_Ra != 0) -# OBSOLETE nia = pcaddr; -# OBSOLETE _BRA,00101,11,6.RA,_IMM12:BRA:short:mu:JMPTNZ imm -# OBSOLETE "jmptnz <pcdisp>" -# OBSOLETE if (val_Ra != 0) -# OBSOLETE nia = pcaddr; -# OBSOLETE _BRA,00101,11,6.RA,6.**,_IMM32:BRA:long:mu:JMPTNZ imm long -# OBSOLETE "jmptnz <pcdisp>" -# OBSOLETE if (val_Ra != 0) -# OBSOLETE nia = pcaddr; -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // JMPTZR -# OBSOLETE -# OBSOLETE _BRA,00101,00,6.RA,6.**,6.RC:BRA:short:mu:JMPTZR -# OBSOLETE "jmptzr r<RC>" -# OBSOLETE if (val_Ra == 0) -# OBSOLETE nia = pcaddr; -# OBSOLETE _BRA,00101,10,6.RA,_IMM12:BRA:short:mu:JMPTZR imm -# OBSOLETE "jmptzr <pcdisp>" -# OBSOLETE if (val_Ra == 0) -# OBSOLETE nia = pcaddr; -# OBSOLETE _BRA,00101,10,6.RA,6.**,_IMM32:BRA:long:mu:JMPTZR imm long -# OBSOLETE "jmptzr <pcdisp>" -# OBSOLETE if (val_Ra == 0) -# OBSOLETE nia = pcaddr; -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // JOINpp -# OBSOLETE -# OBSOLETE void::function::do_join_pp:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE switch (pp) { -# OBSOLETE case 0x0: /* LL */ -# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VL2_4(src)); -# OBSOLETE break; -# OBSOLETE case 0x1: /* LH */ -# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VH2_4(src)); -# OBSOLETE break; -# OBSOLETE case 0x2: /* HL */ -# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VL2_4(src)); -# OBSOLETE break; -# OBSOLETE case 0x3: /* HH */ -# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VH2_4(src)); -# OBSOLETE break; -# OBSOLETE } -# OBSOLETE -# OBSOLETE ::%s::pp:int pp -# OBSOLETE switch (pp) -# OBSOLETE { -# OBSOLETE case 0x0: return "ll"; -# OBSOLETE case 0x1: return "lh"; -# OBSOLETE case 0x2: return "hl"; -# OBSOLETE case 0x3: return "hh"; -# OBSOLETE default: return "?"; -# OBSOLETE } -# OBSOLETE -# OBSOLETE _IALU1,011,pp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:JOINpp -# OBSOLETE "join%s<pp> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_join_pp(_SD, pp, Ra, Rb, Rc); -# OBSOLETE _IALU1,011,pp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:JOINpp imm -# OBSOLETE "join%s<pp> r<RA>, r<RB>, <imm>" -# OBSOLETE do_join_pp(_SD, pp, Ra, Rb, immHL); -# OBSOLETE _IALU1,011,pp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:JOINpp imm long -# OBSOLETE "join%s<pp> r<RA>, r<RB>, <imm>" -# OBSOLETE do_join_pp(_SD, pp, Ra, Rb, immHL); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // JSR -# OBSOLETE -# OBSOLETE _BRA,00011,00,6.**,6.**,6.RC:BRA:short:mu:JSR -# OBSOLETE "jsr r<RC>" -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE return pcaddr; -# OBSOLETE _BRA,00011,10,_IMM18:BRA:short:mu:JSR imm -# OBSOLETE "jsr <pcdisp>" -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE return pcaddr; -# OBSOLETE _BRA,00011,10,6.**,6.**,_IMM32:BRA:long:mu:JSR imm long -# OBSOLETE "jsr <pcdisp>" -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE return pcaddr; -# OBSOLETE -# OBSOLETE -# OBSOLETE // JSRTNZ -# OBSOLETE -# OBSOLETE _BRA,00111,01,6.RA,6.**,6.RC:BRA:short:mu:JSRTNZ -# OBSOLETE "jsrtnz r<RC>" -# OBSOLETE if (val_Ra != 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = pcaddr; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE _BRA,00111,11,6.RA,_IMM12:BRA:short:mu:JSRTNZ imm -# OBSOLETE "jsrtnz <pcdisp>" -# OBSOLETE if (val_Ra != 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = pcaddr; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE _BRA,00111,11,6.RA,6.**,_IMM32:BRA:long:mu:JSRTNZ imm long -# OBSOLETE "jsrtnz <pcdisp>" -# OBSOLETE if (val_Ra != 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = pcaddr; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // JSRTZR -# OBSOLETE -# OBSOLETE _BRA,00111,00,6.RA,6.**,6.RC:BRA:short:mu:JSRTZR -# OBSOLETE "jsrtzr r<RC>" -# OBSOLETE if (val_Ra == 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = pcaddr; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE _BRA,00111,10,6.RA,_IMM12:BRA:short:mu:JSRTZR imm -# OBSOLETE "jsrtzr <pcdisp>" -# OBSOLETE if (val_Ra == 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = pcaddr; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE _BRA,00111,10,6.RA,6.**,_IMM32:BRA:long:mu:JSRTZR imm long -# OBSOLETE "jsrtzr <pcdisp>" -# OBSOLETE if (val_Ra == 0) { -# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP)) -# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8); -# OBSOLETE nia = pcaddr; -# OBSOLETE if (TRACE_CALL_P) -# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL; -# OBSOLETE } -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // Post increment -# OBSOLETE -# OBSOLETE void::function::do_incr:int x, unsigned32 *rb, int delta -# OBSOLETE unsigned32 next_rb; -# OBSOLETE if (x == 1) -# OBSOLETE next_rb = *rb + delta; -# OBSOLETE else if (x == 3) -# OBSOLETE next_rb = *rb - delta; -# OBSOLETE else -# OBSOLETE next_rb = *rb; /* value not used */ -# OBSOLETE /* HW erratum: check value after incrementing */ -# OBSOLETE if (next_rb == MOD_E -# OBSOLETE && (x == 1 || x == 3) -# OBSOLETE && (PSW_VAL(PSW_MD))) { -# OBSOLETE WRITE32_QUEUE (rb, MOD_S); -# OBSOLETE } -# OBSOLETE else if (x == 1 || x == 3) -# OBSOLETE WRITE32_QUEUE (rb, next_rb); -# OBSOLETE -# OBSOLETE // LD2H -# OBSOLETE -# OBSOLETE int::function::make_even_reg:int reg, const char *name -# OBSOLETE if (reg & 1) -# OBSOLETE sim_engine_abort (SD, CPU, cia, -# OBSOLETE "0x%lx:%s odd register (r%d) used in multi-word load/mulx2h", -# OBSOLETE (long) cia, name, reg); -# OBSOLETE return reg; -# OBSOLETE -# OBSOLETE void::function::do_ld2h:int ra, unsigned32 rb, unsigned32 src -# OBSOLETE signed32 mem; -# OBSOLETE ra = make_even_reg(_SD, ra, "LD2H"); -# OBSOLETE mem = MEM(signed, rb + src, 4); -# OBSOLETE if (ra != 0) -# OBSOLETE { -# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], SEXT32(EXTRACTED32(mem, 0, 15), 16)); -# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], SEXT32(EXTRACTED32(mem, 16, 31), 16)); -# OBSOLETE } -# OBSOLETE -# OBSOLETE ::%s::XX:int XX -# OBSOLETE switch (XX) -# OBSOLETE { -# OBSOLETE case 0: return ""; -# OBSOLETE case 1: return "+"; -# OBSOLETE case 3: return "-"; -# OBSOLETE default: return "?"; -# OBSOLETE } -# OBSOLETE -# OBSOLETE _IMEM,00011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD2H -# OBSOLETE "ld2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "ld2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_ld2h(_SD, RA, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); -# OBSOLETE _IMEM,00011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD2H long -# OBSOLETE "ld2h r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_ld2h(_SD, RA, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // LD2W -# OBSOLETE -# OBSOLETE void::function::do_ld2w:int ra, unsigned32 rb, unsigned32 src -# OBSOLETE unsigned64 mem; -# OBSOLETE ra = make_even_reg(_SD, ra, "LD2W"); -# OBSOLETE mem = MEM(unsigned, rb + src, 8); -# OBSOLETE if (ra != 0) -# OBSOLETE { -# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], EXTRACTED64 (mem, 0, 31)); -# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], EXTRACTED64 (mem, 32, 63)); -# OBSOLETE } -# OBSOLETE -# OBSOLETE _IMEM,00110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:L2W -# OBSOLETE "ld2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "ld2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_ld2w(_SD, RA, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 8); -# OBSOLETE _IMEM,00110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:L2W long -# OBSOLETE "ld2w r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_ld2w(_SD, RA, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // LD4BH -# OBSOLETE -# OBSOLETE void::function::do_ld4bh:unsigned32 ra, unsigned32 rb, unsigned32 src -# OBSOLETE unsigned16 l1, l2, h1, h2; -# OBSOLETE unsigned32 mem; -# OBSOLETE ra = make_even_reg(_SD, ra, "LD4BH"); -# OBSOLETE mem = MEM(unsigned, rb + src, 4); -# OBSOLETE h1 = SEXT16(EXTRACTED32(mem, 0, 7), 8); -# OBSOLETE l1 = SEXT16(EXTRACTED32(mem, 8, 15), 8); -# OBSOLETE h2 = SEXT16(EXTRACTED32(mem, 16, 23), 8); -# OBSOLETE l2 = SEXT16(EXTRACTED32(mem, 24, 31), 8); -# OBSOLETE if (ra != 0) -# OBSOLETE { -# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1); -# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2); -# OBSOLETE } -# OBSOLETE -# OBSOLETE _IMEM,00101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BH -# OBSOLETE "ld4bh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "ld4bh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_ld4bh(_SD, RA, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); -# OBSOLETE _IMEM,00101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BH long -# OBSOLETE "ld4bh r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_ld4bh(_SD, RA, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // LD4BHU -# OBSOLETE -# OBSOLETE void::function::do_ld4bhu:unsigned32 ra, unsigned32 rb, unsigned32 src -# OBSOLETE unsigned16 l1, l2, h1, h2; -# OBSOLETE unsigned32 mem; -# OBSOLETE ra = make_even_reg(_SD, ra, "LD4BH"); -# OBSOLETE mem = MEM(signed, rb + src, 4); -# OBSOLETE h1 = EXTRACTED32(mem, 0, 7); -# OBSOLETE l1 = EXTRACTED32(mem, 8, 15); -# OBSOLETE h2 = EXTRACTED32(mem, 16, 23); -# OBSOLETE l2 = EXTRACTED32(mem, 24, 31); -# OBSOLETE if (ra != 0) -# OBSOLETE { -# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1); -# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2); -# OBSOLETE } -# OBSOLETE -# OBSOLETE _IMEM,01101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BHU -# OBSOLETE "ld4hbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "ld4hbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_ld4bhu(_SD, RA, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); -# OBSOLETE _IMEM,01101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BHU long -# OBSOLETE "ld4hbu r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_ld4bhu(_SD, RA, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // LDB -# OBSOLETE -# OBSOLETE void::function::do_ldb:unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 1)); -# OBSOLETE -# OBSOLETE _IMEM,00000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDB -# OBSOLETE "ldb r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "ldb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_ldb(_SD, Ra, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 1); -# OBSOLETE _IMEM,00000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDB long -# OBSOLETE "ldb r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_ldb(_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // LDBU -# OBSOLETE -# OBSOLETE void::function::do_ldbu:unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 1)); -# OBSOLETE -# OBSOLETE _IMEM,01001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDBU -# OBSOLETE "ldbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "ldbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_ldbu(_SD, Ra, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 1); -# OBSOLETE _IMEM,01001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDBU long -# OBSOLETE "ldbu r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_ldbu(_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // LDH -# OBSOLETE -# OBSOLETE void::function::do_ldh:unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 2)); -# OBSOLETE -# OBSOLETE _IMEM,00010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDH -# OBSOLETE "ldh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "ldh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_ldh(_SD, Ra, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2); -# OBSOLETE _IMEM,00010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDH long -# OBSOLETE "ldh r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_ldh(_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // LDHH -# OBSOLETE -# OBSOLETE void::function::do_ldhh:unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 2) << 16); -# OBSOLETE -# OBSOLETE _IMEM,00001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHH -# OBSOLETE "ldhh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "ldhh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_ldhh(_SD, Ra, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2); -# OBSOLETE _IMEM,00001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHH long -# OBSOLETE "ldhh r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_ldhh(_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // LDHU -# OBSOLETE -# OBSOLETE void::function::do_ldhu:unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 2)); -# OBSOLETE -# OBSOLETE _IMEM,01010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHU -# OBSOLETE "ldhu r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "ldhu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_ldhu(_SD, Ra, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2); -# OBSOLETE _IMEM,01010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHU long -# OBSOLETE "ldhu r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_ldhu(_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // LDW -# OBSOLETE -# OBSOLETE void::function::do_ldw:unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 4)); -# OBSOLETE -# OBSOLETE _IMEM,00100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDW -# OBSOLETE "ldw r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "ldw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_ldw(_SD, Ra, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); -# OBSOLETE _IMEM,00100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDW long -# OBSOLETE "ldw r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_ldw(_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MACa -# OBSOLETE -# OBSOLETE void::function::do_mac:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src -# OBSOLETE unsigned64 accum = *aa; -# OBSOLETE accum += (signed64) (rb) * (signed64) (src); -# OBSOLETE WRITE64_QUEUE (aa, accum); -# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63)); -# OBSOLETE -# OBSOLETE _IALU2,10100,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACa -# OBSOLETE "mac<AA> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_mac(_SD, Aa, Ra, Rb, Rc); -# OBSOLETE _IALU2,10100,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACa imm -# OBSOLETE "mac<AA> r<RA>, r<RB>, <imm>" -# OBSOLETE do_mac(_SD, Aa, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MACSa -# OBSOLETE -# OBSOLETE void::function::do_macs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src -# OBSOLETE unsigned64 accum = *aa; -# OBSOLETE accum += ((signed64) (rb) * (signed64) (src)) << 1; -# OBSOLETE WRITE64_QUEUE (aa, accum); -# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31)); -# OBSOLETE -# OBSOLETE _IALU2,10101,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACSa -# OBSOLETE "macs<AA> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_macs(_SD, Aa, Ra, Rb, Rc); -# OBSOLETE _IALU2,10101,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACSa imm -# OBSOLETE "macs<AA> r<RA>, r<RB>, <imm>" -# OBSOLETE do_macs(_SD, Aa, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MODDEC | MODINC -# OBSOLETE -# OBSOLETE _IMEM,00111,11,6.**,6.RB,_IMM6:IMEM:short:mu:MODDEC -# OBSOLETE "moddec r<RB>, <imm>" -# OBSOLETE do_incr(_SD, 3/*0b11*/, &GPR[RB], imm_5); -# OBSOLETE _IMEM,00111,01,6.**,6.RB,_IMM6:IMEM:short:mu:MODINC -# OBSOLETE "modinc r<RB>, <imm>" -# OBSOLETE do_incr(_SD, 1/*0b01*/, &GPR[RB], imm_5); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MSUBa -# OBSOLETE -# OBSOLETE void::function::do_msub:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src -# OBSOLETE unsigned64 accum = *aa; -# OBSOLETE accum -= (signed64) (rb) * (signed64) (src); -# OBSOLETE WRITE64_QUEUE (aa, accum); -# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63)); -# OBSOLETE -# OBSOLETE _IALU2,10110,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBa -# OBSOLETE "msub<AA> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_msub(_SD, Aa, Ra, Rb, Rc); -# OBSOLETE _IALU2,10110,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBa imm -# OBSOLETE "msub<AA> r<RA>, r<RB>, <imm>" -# OBSOLETE do_msub(_SD, Aa, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MSUBSa -# OBSOLETE -# OBSOLETE void::function::do_msubs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src -# OBSOLETE unsigned64 accum = *aa; -# OBSOLETE accum -= ((signed64) (rb) * (signed64) (src)) << 1; -# OBSOLETE WRITE64_QUEUE (aa, accum); -# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31)); -# OBSOLETE -# OBSOLETE _IALU2,10111,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBSa -# OBSOLETE "msubs<AA> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_msubs(_SD, Aa, Ra, Rb, Rc); -# OBSOLETE _IALU2,10111,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBSa imm -# OBSOLETE "msubs<AA> r<RA>, r<RB>, <imm>" -# OBSOLETE do_msubs(_SD, Aa, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MUL -# OBSOLETE -# OBSOLETE void::function::do_mul:unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE WRITE32_QUEUE (ra, rb * src); -# OBSOLETE -# OBSOLETE _IALU2,10000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL -# OBSOLETE "mul r<RA>, r<RB>, r<RC>" -# OBSOLETE do_mul(_SD, Ra, Rb, Rc); -# OBSOLETE _IALU2,10000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL imm -# OBSOLETE "mul r<RA>, r<RB>, <imm>" -# OBSOLETE do_mul(_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MUL2H -# OBSOLETE -# OBSOLETE void::function::do_mul2h:unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE unsigned16 high = VH2_4(rb) * VH2_4(src); -# OBSOLETE unsigned16 low = VL2_4(rb) * VL2_4(src); -# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low); -# OBSOLETE -# OBSOLETE _IALU2,00000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL2H -# OBSOLETE "mul2h r<RA>, r<RB>, r<RC>" -# OBSOLETE do_mul2h(_SD, Ra, Rb, Rc); -# OBSOLETE _IALU2,00000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL2H imm -# OBSOLETE "mul2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_mul2h(_SD, Ra, Rb, immHL); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MULX -# OBSOLETE -# OBSOLETE void::function::do_mulx:unsigned64 *aa, signed32 rb, signed32 src -# OBSOLETE WRITE64_QUEUE (aa, (signed64) (rb) * (signed64) (src)); -# OBSOLETE -# OBSOLETE _IALU2,11000,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULX -# OBSOLETE "mulx a<AA>, r<RB>, r<RC>" -# OBSOLETE do_mulx(_SD, Aa, Rb, Rc); -# OBSOLETE _IALU2,11000,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULX imm -# OBSOLETE "mulx a<AA>, r<RB>, <imm>" -# OBSOLETE do_mulx(_SD, Aa, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE // MULX2H -# OBSOLETE -# OBSOLETE void::function::do_mulx2h:int ra, signed32 rb, signed32 src, int high -# OBSOLETE signed32 result = rb * src; -# OBSOLETE if (!high) -# OBSOLETE { -# OBSOLETE ra = make_even_reg(_SD, ra, "MULX2H"); -# OBSOLETE if (ra != 0) -# OBSOLETE WRITE32_QUEUE (&GPR[ra+1], result); -# OBSOLETE } -# OBSOLETE else if (ra != 0) -# OBSOLETE { -# OBSOLETE WRITE32_QUEUE (&GPR[ra+0], result); -# OBSOLETE } -# OBSOLETE -# OBSOLETE _IALU2,00001,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULX2H -# OBSOLETE "mul2h r<RA>, r<RB>, r<RC>" -# OBSOLETE do_mulx2h(_SD, RA, RbH, RcH, 1); -# OBSOLETE do_mulx2h(_SD, RA, RbL, RcL, 0); -# OBSOLETE _IALU2,00001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULX2H imm -# OBSOLETE "mul2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_mulx2h(_SD, RA, RbH, imm, 1); -# OBSOLETE do_mulx2h(_SD, RA, RbL, imm, 0); -# OBSOLETE -# OBSOLETE // MULHXpp -# OBSOLETE -# OBSOLETE void::function::do_mulhx:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE signed32 value = 0; -# OBSOLETE switch (pp) { -# OBSOLETE case 0: /* LL */ -# OBSOLETE value = SEXT32(VL2_4(rb), 16) * SEXT32(VL2_4(src), 16); -# OBSOLETE break; -# OBSOLETE case 1: /* LH */ -# OBSOLETE value = SEXT32(VL2_4(rb), 16) * SEXT32(VH2_4(src), 16); -# OBSOLETE break; -# OBSOLETE case 2: /* HL */ -# OBSOLETE value = SEXT32(VH2_4(rb), 16) * SEXT32(VL2_4(src), 16); -# OBSOLETE break; -# OBSOLETE case 3: /* HH */ -# OBSOLETE value = SEXT32(VH2_4(rb), 16) * SEXT32(VH2_4(src), 16); -# OBSOLETE break; -# OBSOLETE default: -# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_mulhx - internal error - bad switch"); -# OBSOLETE } -# OBSOLETE WRITE32_QUEUE (ra, value); -# OBSOLETE -# OBSOLETE _IALU2,001,pp,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULHXpp -# OBSOLETE "mulhx%s<pp> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_mulhx(_SD, pp, Ra, Rb, Rc); -# OBSOLETE _IALU2,001,pp,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULHXpp imm -# OBSOLETE "mulhx%s<pp> r<RA>, r<RB>, <imm>" -# OBSOLETE do_mulhx(_SD, pp, Ra, Rb, immHL); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MULXS -# OBSOLETE -# OBSOLETE void::function::do_mulxs:unsigned64 *aa, signed32 rb, signed32 src -# OBSOLETE WRITE64_QUEUE (aa, ((signed64) (rb) * (signed64) (src)) << 1); -# OBSOLETE -# OBSOLETE _IALU2,11001,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULXS -# OBSOLETE "mulxs a<AA>, r<RB>, r<RC>" -# OBSOLETE do_mulxs(_SD, Aa, Rb, Rc); -# OBSOLETE _IALU2,11001,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULXS imm -# OBSOLETE "mulxs a<AA>, r<RB>, <imm>" -# OBSOLETE do_mulxs(_SD, Aa, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MVFACC -# OBSOLETE -# OBSOLETE void::function::do_mvfacc:unsigned32 *ra, unsigned64 ab, unsigned32 src -# OBSOLETE while (src > 63) src -= 64; -# OBSOLETE WRITE32_QUEUE (ra, ((signed64)ab) >> src); -# OBSOLETE -# OBSOLETE _IALU2,11111,00,6.RA,5.*,1.AB,6.RC:IALU2:short:iu:MVFACC -# OBSOLETE "mvfacc r<RA>, a<AB>, r<RC>" -# OBSOLETE do_mvfacc(_SD, Ra, *Ab, Rc); -# OBSOLETE _IALU2,11111,10,6.RA,5.*,1.AB,_IMM6:IALU2:short:iu:MVFACC imm -# OBSOLETE "mvfacc r<RA>, a<AB>, <imm>" -# OBSOLETE do_mvfacc(_SD, Ra, *Ab, imm_6u); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MVFSYS -# OBSOLETE -# OBSOLETE _BRA,11110,00,6.RA,6.CR,6.ID:BRA:short:mu:MVFSYS -# OBSOLETE "mvfsys r<RA>, cr<CR>" -# OBSOLETE switch (ID) { -# OBSOLETE case 0: -# OBSOLETE if (CR >= NR_CONTROL_REGISTERS) -# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR"); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (Ra, (CPU)->regs.control[CR]); -# OBSOLETE break; -# OBSOLETE case 1: -# OBSOLETE WRITE32_QUEUE (Ra, PSWL); -# OBSOLETE break; -# OBSOLETE case 2: -# OBSOLETE WRITE32_QUEUE (Ra, EXTRACTED32(PSWH, 16, 31)); -# OBSOLETE break; -# OBSOLETE case 3: -# OBSOLETE WRITE32_QUEUE (Ra, PSW_FLAG_VAL(CR)); -# OBSOLETE break; -# OBSOLETE default: -# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID"); -# OBSOLETE } -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MVTACC -# OBSOLETE -# OBSOLETE _IALU2,01111,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MVTACC -# OBSOLETE "mvtacc a<AA>, r<RB>, r<RC>" -# OBSOLETE WRITE64_QUEUE (Aa, INSERTED64(RbU, 0, 31) | (RcU)); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // MVTSYS -# OBSOLETE -# OBSOLETE _BRA,01110,00,6.CR,6.RB,6.ID:BRA:short:mu:MVTSYS -# OBSOLETE "mvtsys cr<CR>, r<RB>" -# OBSOLETE switch (ID) { -# OBSOLETE case 0: /* control register */ -# OBSOLETE if (CR >= NR_CONTROL_REGISTERS) -# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR"); -# OBSOLETE else -# OBSOLETE { -# OBSOLETE unsigned32 value = Rb; -# OBSOLETE CPU->mvtsys_left_p = 1; -# OBSOLETE if (CR == processor_status_word_cr) -# OBSOLETE { -# OBSOLETE unsigned32 ds = PSW & BIT32 (PSW_DS); /* preserve ds */ -# OBSOLETE value = ds | (value & PSW_VALID); -# OBSOLETE } -# OBSOLETE else if (CR == backup_processor_status_word_cr -# OBSOLETE || CR == debug_backup_processor_status_word_cr) -# OBSOLETE value &= DPSW_VALID; -# OBSOLETE else if (CR == eit_vector_base_cr) -# OBSOLETE value &= EIT_VALID; -# OBSOLETE WRITE32_QUEUE (&(CPU)->regs.control[CR], value); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 1: /* PSWL */ -# OBSOLETE WRITE32_QUEUE_MASK (&PSW, EXTRACTED32(Rb, 16, 31), -# OBSOLETE PSW_VALID & 0x0000ffff); -# OBSOLETE break; -# OBSOLETE case 2: /* PSWH */ -# OBSOLETE { -# OBSOLETE unsigned32 ds = PSW & BIT32 (PSW_DS); /* preserve ds */ -# OBSOLETE WRITE32_QUEUE_MASK (&PSW, (EXTRACTED32(Rb, 16, 31) << 16) | ds, -# OBSOLETE (PSW_VALID | ds) & 0xffff0000); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 3: /* FLAG */ -# OBSOLETE PSW_FLAG_SET_QUEUE(CR, Rb & 1); -# OBSOLETE break; -# OBSOLETE default: -# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID"); -# OBSOLETE } -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // NOP -# OBSOLETE -# OBSOLETE _BRA,01111,00,6.**,6.**,6.**:BRA:short:iu,mu:NOP -# OBSOLETE "nop" -# OBSOLETE /* NOP */; -# OBSOLETE -# OBSOLETE -# OBSOLETE // NOT -# OBSOLETE -# OBSOLETE _LOGIC,11001,00,6.RA,6.RB,6.*:LOGIC:short:iu,mu:NOT -# OBSOLETE "not r<RA>, r<RB>" -# OBSOLETE WRITE32_QUEUE (Ra, ~Rb); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // NOTFG -# OBSOLETE -# OBSOLETE _LOGIC,01001,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:NOTFG -# OBSOLETE "notfg f<FA>, f<FB>" -# OBSOLETE PSW_FLAG_SET_QUEUE(FA, !PSW_FLAG_VAL(FB)); -# OBSOLETE -# OBSOLETE -# OBSOLETE // OR -# OBSOLETE -# OBSOLETE _LOGIC,11010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:OR -# OBSOLETE "or r<RA>, r<RB>, r<RC>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb | Rc); -# OBSOLETE _LOGIC,11010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:OR imm -# OBSOLETE "or r<RA>, r<RB>, <imm>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb | imm); -# OBSOLETE _LOGIC,11010,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:OR imm long -# OBSOLETE "or r<RA>, r<RB>, <imm>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb | imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ORFG -# OBSOLETE -# OBSOLETE _LOGIC,01010,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:ORFG -# OBSOLETE "orfg f<FA>, f<FB>, f<FC>" -# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | PSW_FLAG_VAL(FC)); -# OBSOLETE _LOGIC,01010,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:ORFG imm -# OBSOLETE "orfg f<FA>, f<FB>, <imm>" -# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | (imm_6 & 1)); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // REIT -# OBSOLETE -# OBSOLETE _BRA,01000,00,6.**,6.**,6.**:BRA:short:mu:REIT -# OBSOLETE "reit" -# OBSOLETE WRITE32_QUEUE (&PSW, bPSW); -# OBSOLETE nia = bPC; -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // REPEAT -# OBSOLETE -# OBSOLETE void::function::do_repeat:unsigned32 count, address_word pcaddr -# OBSOLETE address_word rpt_s = cia + 8; -# OBSOLETE address_word rpt_e = cia + pcaddr; -# OBSOLETE -# OBSOLETE if (count == 0) -# OBSOLETE sim_engine_abort (SD, CPU, cia, "REPEAT with ra=0 and REPEATI with imm = 0 is forbidden."); -# OBSOLETE if (count > 1) -# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1); -# OBSOLETE if (rpt_e < rpt_s + 0x10) -# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx: REPEAT or REPEATI loop is too small\n", (long) cia); -# OBSOLETE WRITE32_QUEUE (&RPT_C, count - 1); -# OBSOLETE WRITE32_QUEUE (&RPT_S, rpt_s); -# OBSOLETE WRITE32_QUEUE (&RPT_E, rpt_e); -# OBSOLETE -# OBSOLETE _BRA,11000,00,6.RA,6.**,6.RC:BRA:short:mu:REPEAT -# OBSOLETE "repeat r<RA>, r<RC>" -# OBSOLETE do_repeat(_SD, val_Ra, pcaddr); -# OBSOLETE _BRA,11000,10,6.RA,_IMM12:BRA:short:mu:REPEAT imm -# OBSOLETE "repeat r<RA>, <pcaddr>" -# OBSOLETE do_repeat(_SD, val_Ra, pcaddr); -# OBSOLETE _BRA,11000,10,6.RA,6.**,_IMM32:BRA:long:mu:REPEAT imm long -# OBSOLETE "repeat r<RA>, <pcaddr>" -# OBSOLETE do_repeat(_SD, val_Ra, pcaddr); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // REPEATI -# OBSOLETE -# OBSOLETE _BRA,11010,00,6.IMM_6,6.**,6.RC:BRA:short:mu:REPEATI -# OBSOLETE "repeati <IMM_6>, r<RC>" -# OBSOLETE do_repeat(_SD, IMM_6, pcaddr); -# OBSOLETE _BRA,11010,10,6.IMM_6,_IMM12:BRA:short:mu:REPEATI imm -# OBSOLETE "repeati <IMM_6>, <pcaddr>" -# OBSOLETE do_repeat(_SD, IMM_6, pcaddr); -# OBSOLETE _BRA,11010,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:REPEATI imm long -# OBSOLETE "repeati <IMM_6>, <pcaddr>" -# OBSOLETE do_repeat(_SD, IMM_6, pcaddr); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // RTD -# OBSOLETE -# OBSOLETE _BRA,01010,00,6.*,6.*,6.*:BRA:short:mu:RTD -# OBSOLETE "rtd" -# OBSOLETE WRITE32_QUEUE (&PSW, DPSW); -# OBSOLETE nia = DPC; -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ROT -# OBSOLETE -# OBSOLETE _LOGIC,10100,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT -# OBSOLETE "rot r<RA>, r<RB>, r<RC>" -# OBSOLETE WRITE32_QUEUE (Ra, ROT32(Rb, Rc & 0x1f)); -# OBSOLETE _LOGIC,10100,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT imm -# OBSOLETE "rot r<RA>, r<RB>, <imm>" -# OBSOLETE WRITE32_QUEUE (Ra, ROT32(Rb, imm & 0x1f)); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ROT2H -# OBSOLETE -# OBSOLETE void::function::do_rot2h:unsigned32 *ra, unsigned32 rb, signed32 src -# OBSOLETE unsigned16 high = ROTR16(VH2_4(rb), VH2_4(src) & 0xf); -# OBSOLETE unsigned16 low = ROTR16(VL2_4(rb), VL2_4(src) & 0xf); -# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low); -# OBSOLETE -# OBSOLETE _LOGIC,10101,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT2H -# OBSOLETE "rot2h r<RA>, r<RB>, r<RC>" -# OBSOLETE do_rot2h(_SD, Ra, Rb, Rc); -# OBSOLETE _LOGIC,10101,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT2H imm -# OBSOLETE "rot2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_rot2h(_SD, Ra, Rb, immHL); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SAT -# OBSOLETE -# OBSOLETE void::function::do_sat:signed32 *ra, signed32 rb, signed32 src -# OBSOLETE int bits = LSMASKED32(src, 4, 0); /* 5 */ -# OBSOLETE signed32 sat = LSMASK32(bits, 0) >> 2; -# OBSOLETE signed32 nsat = ~sat; -# OBSOLETE signed32 value; -# OBSOLETE if (bits != src) -# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", (long) cia); -# OBSOLETE if (bits == 0) -# OBSOLETE value = rb; -# OBSOLETE else if (rb >= sat) -# OBSOLETE value = sat; -# OBSOLETE else if (rb <= nsat) -# OBSOLETE value = nsat; -# OBSOLETE else -# OBSOLETE value = rb; -# OBSOLETE WRITE32_QUEUE (ra, value); -# OBSOLETE -# OBSOLETE _IALU2,01000,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT -# OBSOLETE "sat r<RA>, r<RB>, r<RC>" -# OBSOLETE do_sat(_SD, Ra, Rb, Rc); -# OBSOLETE _IALU2,01000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT imm -# OBSOLETE "sat r<RA>, r<RB>, <imm>" -# OBSOLETE do_sat(_SD, Ra, Rb, imm_5); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SAT2H -# OBSOLETE -# OBSOLETE void::function::do_sath:signed32 *ra, signed32 rb, signed32 src, int high, int updates_f4 -# OBSOLETE int bits = LSMASKED32(src, 4, 0); /* 5 */ -# OBSOLETE signed32 sat = LSMASK32(bits, 0) >> 2; -# OBSOLETE signed32 nsat = ~sat; -# OBSOLETE signed32 value; -# OBSOLETE if (bits != src) -# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", (long) cia); -# OBSOLETE if (bits == 0) -# OBSOLETE value = rb; -# OBSOLETE else if (rb >= sat) -# OBSOLETE value = sat; -# OBSOLETE else if (rb <= nsat) -# OBSOLETE value = nsat; -# OBSOLETE else -# OBSOLETE value = rb; -# OBSOLETE if (high) -# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); -# OBSOLETE if (updates_f4) -# OBSOLETE { -# OBSOLETE /* if MU instruction was a MVTSYS (lkr), unqueue register writes now */ -# OBSOLETE if(STATE_CPU (sd, 0)->mvtsys_left_p) -# OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); -# OBSOLETE PSW_FLAG_SET_QUEUE(PSW_S_FLAG, PSW_FLAG_VAL(PSW_S_FLAG) ^ (value & 1)); -# OBSOLETE } -# OBSOLETE -# OBSOLETE _IALU2,01001,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT2H -# OBSOLETE "sat2h r<RA>, r<RB>, r<RC>" -# OBSOLETE do_sath(_SD, Ra, RbH, RcH, 1, 0); -# OBSOLETE do_sath(_SD, Ra, RbL, RcL, 0, 0); -# OBSOLETE _IALU2,01001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT2H imm -# OBSOLETE "sat2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_sath(_SD, Ra, RbH, imm_5, 1, 0); -# OBSOLETE do_sath(_SD, Ra, RbL, imm_5, 0, 0); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SATHp -# OBSOLETE -# OBSOLETE ::%s::p:int p -# OBSOLETE switch (p) -# OBSOLETE { -# OBSOLETE case 0: return "l"; -# OBSOLETE case 1: return "h"; -# OBSOLETE default: return "?"; -# OBSOLETE } -# OBSOLETE -# OBSOLETE _IALU2,1110,p,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATHP -# OBSOLETE "sath%s<p> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_sath(_SD, Ra, Rb, Rc, p, 1); -# OBSOLETE _IALU2,1110,p,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATHP imm -# OBSOLETE "sath%s<p> r<RA>, r<RB>, <imm>" -# OBSOLETE do_sath(_SD, Ra, Rb, imm_5, p, 1); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SATZ -# OBSOLETE -# OBSOLETE void::function::do_satz:signed32 *ra, signed32 rb, signed32 src -# OBSOLETE if (rb < 0) -# OBSOLETE WRITE32_QUEUE (ra, 0); -# OBSOLETE else -# OBSOLETE do_sat (_SD, ra, rb, src); -# OBSOLETE -# OBSOLETE _IALU2,01010,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ -# OBSOLETE "satz r<RA>, r<RB>, r<RC>" -# OBSOLETE do_satz(_SD, Ra, Rb, Rc); -# OBSOLETE _IALU2,01010,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ imm -# OBSOLETE "satz r<RA>, r<RB>, <imm>" -# OBSOLETE do_satz(_SD, Ra, Rb, imm_5); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SATZ2H -# OBSOLETE -# OBSOLETE void::function::do_satzh:signed32 *ra, signed16 rb, signed32 src, int high -# OBSOLETE int bits = LSMASKED32(src, 3, 0); /*4*/ -# OBSOLETE signed16 sat = LSMASK16(bits, 0) >> 2; -# OBSOLETE signed16 nsat = 0; -# OBSOLETE signed16 value; -# OBSOLETE if (bits != src) -# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx:SATZ2H bit overflow\n", (long) cia); -# OBSOLETE if (bits == 0 && rb > sat) -# OBSOLETE value = rb; -# OBSOLETE else if (rb > sat) -# OBSOLETE value = sat; -# OBSOLETE else if (rb < nsat) -# OBSOLETE value = nsat; -# OBSOLETE else -# OBSOLETE value = rb; -# OBSOLETE if (high) -# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); -# OBSOLETE -# OBSOLETE -# OBSOLETE _IALU2,01011,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ2H -# OBSOLETE "satz2h r<RA>, r<RB>, r<RC>" -# OBSOLETE do_satzh(_SD, Ra, RbH, RcH, 1); -# OBSOLETE do_satzh(_SD, Ra, RbL, RcL, 0); -# OBSOLETE _IALU2,01011,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ2H imm -# OBSOLETE "satz2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_satzh(_SD, Ra, RbH, imm, 1); -# OBSOLETE do_satzh(_SD, Ra, RbL, imm, 0); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SRA -# OBSOLETE -# OBSOLETE void::function::do_sra:unsigned32 *ra, unsigned32 rb, signed32 src -# OBSOLETE unsigned32 value; -# OBSOLETE while (src > 31) src -= 32; -# OBSOLETE while (src < -32) src += 32; -# OBSOLETE if (src >= 0) -# OBSOLETE value = (signed32)rb >> src; -# OBSOLETE else if (src == -32) -# OBSOLETE value = 0; -# OBSOLETE else -# OBSOLETE value = rb << -src; -# OBSOLETE WRITE32_QUEUE (ra, value); -# OBSOLETE -# OBSOLETE _LOGIC,10000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA -# OBSOLETE "sra r<RA>, r<RB>, r<RC>" -# OBSOLETE do_sra(_SD, Ra, Rb, Rc); -# OBSOLETE _LOGIC,10000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA imm -# OBSOLETE "sra r<RA>, r<RB>, <imm>" -# OBSOLETE do_sra(_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SRAHp -# OBSOLETE -# OBSOLETE void::function::do_srah:unsigned32 *ra, unsigned32 rb, int src, int high -# OBSOLETE unsigned32 value; -# OBSOLETE while (src > 31) src -= 32; -# OBSOLETE while (src < -32) src += 32; -# OBSOLETE if (src >= 0) -# OBSOLETE value = (signed32)rb >> src; -# OBSOLETE else if (src == -32) -# OBSOLETE value = 0; -# OBSOLETE else -# OBSOLETE value = rb << -src; -# OBSOLETE if (high) -# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); -# OBSOLETE -# OBSOLETE _LOGIC,0010,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRAHP -# OBSOLETE "srah%s<p> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_srah(_SD, Ra, Rb, Rc, p); -# OBSOLETE _LOGIC,0010,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRAHP imm -# OBSOLETE "srah%s<p> r<RA>, r<RB>, <imm>" -# OBSOLETE do_srah(_SD, Ra, Rb, imm, p); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SRA2H -# OBSOLETE -# OBSOLETE _LOGIC,10001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA2H -# OBSOLETE "sra2h r<RA>, r<RB>, r<RC>" -# OBSOLETE signed32 srcH = RcH; -# OBSOLETE signed32 srcL = RcL; -# OBSOLETE while (srcH > 15) srcH -= 16; -# OBSOLETE while (srcH < -16) srcH += 16; -# OBSOLETE while (srcL > 15) srcL -= 16; -# OBSOLETE while (srcL < -16) srcL += 16; -# OBSOLETE do_srah(_SD, Ra, RbH, srcH, 1); -# OBSOLETE do_srah(_SD, Ra, RbL, srcL, 0); -# OBSOLETE _LOGIC,10001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA2H imm -# OBSOLETE "sra2h r<RA>, r<RB>, <imm>" -# OBSOLETE signed32 src = imm; -# OBSOLETE while (src > 15) src -= 16; -# OBSOLETE while (src < -16) src += 16; -# OBSOLETE do_srah(_SD, Ra, RbH, src, 1); -# OBSOLETE do_srah(_SD, Ra, RbL, src, 0); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SRC -# OBSOLETE -# OBSOLETE void::function::do_src:unsigned32 *ra, unsigned32 rb, int src -# OBSOLETE unsigned32 value; -# OBSOLETE unsigned64 operand; -# OBSOLETE unsigned64 shifted; -# OBSOLETE while (src > 31) src -= 32; -# OBSOLETE while (src < -32) src += 32; -# OBSOLETE if (src >= 0) -# OBSOLETE { -# OBSOLETE operand = (INSERTED64(rb, 0, 31) | INSERTED64(*ra, 32, 63)); -# OBSOLETE shifted = operand >> src; -# OBSOLETE value = EXTRACTED64(shifted, 32, 63); -# OBSOLETE } -# OBSOLETE else -# OBSOLETE { -# OBSOLETE operand = (INSERTED64(*ra, 0, 31) | INSERTED64(rb, 32, 63)); -# OBSOLETE shifted = operand << -src; -# OBSOLETE value = EXTRACTED64(shifted, 0, 31); -# OBSOLETE } -# OBSOLETE WRITE32_QUEUE (ra, value); -# OBSOLETE -# OBSOLETE _LOGIC,10110,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRC -# OBSOLETE "src r<RA>, r<RB>, r<RC>" -# OBSOLETE do_src(_SD, Ra, Rb, Rc); -# OBSOLETE _LOGIC,10110,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRC imm -# OBSOLETE "src r<RA>, r<RB>, <imm>" -# OBSOLETE do_src(_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SRL -# OBSOLETE -# OBSOLETE void::function::do_srl:unsigned32 *ra, unsigned32 rb, int src -# OBSOLETE unsigned32 value; -# OBSOLETE while (src > 31) src -= 32; -# OBSOLETE while (src < -32) src += 32; -# OBSOLETE if (src >= 0) -# OBSOLETE value = (unsigned32)rb >> src; -# OBSOLETE else if (src == -32) -# OBSOLETE value = 0; -# OBSOLETE else -# OBSOLETE value = (unsigned32)rb << -src; -# OBSOLETE WRITE32_QUEUE (ra, value); -# OBSOLETE -# OBSOLETE _LOGIC,10010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL -# OBSOLETE "srl r<RA>, r<RB>, r<RC>" -# OBSOLETE do_srl(_SD, Ra, Rb, Rc); -# OBSOLETE _LOGIC,10010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL imm -# OBSOLETE "srl r<RA>, r<RB>, <imm>" -# OBSOLETE do_srl(_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SRLHp -# OBSOLETE -# OBSOLETE void::function::do_srlh:unsigned32 *ra, unsigned32 rb, int src, int high -# OBSOLETE unsigned32 value; -# OBSOLETE while (src > 31) src -= 32; -# OBSOLETE while (src < -32) src += 32; -# OBSOLETE if (src >= 0) -# OBSOLETE value = rb >> src; -# OBSOLETE else if (src == -32) -# OBSOLETE value = 0; -# OBSOLETE else -# OBSOLETE value = rb << -src; -# OBSOLETE if (high) -# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000); -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff); -# OBSOLETE -# OBSOLETE _LOGIC,0011,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRLHP -# OBSOLETE "srlh%s<p> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_srlh(_SD, Ra, Rb, Rc, p); -# OBSOLETE _LOGIC,0011,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRLHP imm -# OBSOLETE "srlh%s<p> r<RA>, r<RB>, <imm>" -# OBSOLETE do_srlh(_SD, Ra, Rb, imm, p); -# OBSOLETE -# OBSOLETE -# OBSOLETE // SRL2H -# OBSOLETE -# OBSOLETE _LOGIC,10011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL2H -# OBSOLETE "srl2h r<RA>, r<RB>, r<RC>" -# OBSOLETE signed32 srcH = RcH; -# OBSOLETE signed32 srcL = RcL; -# OBSOLETE while (srcH > 15) srcH -= 16; -# OBSOLETE while (srcH < -16) srcH += 16; -# OBSOLETE while (srcL > 15) srcL -= 16; -# OBSOLETE while (srcL < -16) srcL += 16; -# OBSOLETE do_srlh(_SD, Ra, RbHU, srcH, 1); -# OBSOLETE do_srlh(_SD, Ra, RbLU, srcL, 0); -# OBSOLETE _LOGIC,10011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL2H imm -# OBSOLETE "srl2h r<RA>, r<RB>, <imm>" -# OBSOLETE signed32 src = imm; -# OBSOLETE while (src > 15) src -= 16; -# OBSOLETE while (src < -16) src += 16; -# OBSOLETE do_srlh(_SD, Ra, RbHU, src, 1); -# OBSOLETE do_srlh(_SD, Ra, RbLU, src, 0); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ST2H -# OBSOLETE -# OBSOLETE void::function::get_even_reg:int *reg, unsigned32 *r0, const char *name -# OBSOLETE if (*reg & 1) -# OBSOLETE sim_engine_abort (SD, CPU, cia, -# OBSOLETE "0x%lx:%s odd register (r%d) used in multi-word store", -# OBSOLETE (long) cia, name, *reg); -# OBSOLETE if (*reg == 0) -# OBSOLETE *r0 = 0; -# OBSOLETE else -# OBSOLETE *r0 = GPR[*reg]; -# OBSOLETE -# OBSOLETE void::function::do_st2h:int ra, unsigned32 rb, unsigned32 src -# OBSOLETE unsigned32 val_ra; -# OBSOLETE unsigned32 mem; -# OBSOLETE get_even_reg(_SD, &ra, &val_ra, "ST2H"); -# OBSOLETE mem = INSERTED32(val_ra, 0, 15) | -# OBSOLETE INSERTED32(GPR[ra + 1], 16, 31); -# OBSOLETE STORE(rb + src, 4, mem); -# OBSOLETE -# OBSOLETE _IMEM,10011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2H -# OBSOLETE "st2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "st2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_st2h(_SD, RA, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); -# OBSOLETE _IMEM,10011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2H long -# OBSOLETE "st2h r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_st2h(_SD, RA, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ST2W -# OBSOLETE -# OBSOLETE void::function::do_st2w:int ra, unsigned32 rb, unsigned32 src -# OBSOLETE unsigned32 val_ra; -# OBSOLETE unsigned64 mem; -# OBSOLETE get_even_reg(_SD, &ra, &val_ra, "ST2W"); -# OBSOLETE mem = INSERTED64(val_ra, 0, 31) | INSERTED64(GPR[ra + 1], 32, 63); -# OBSOLETE STORE(rb + src, 8, mem); -# OBSOLETE -# OBSOLETE _IMEM,10110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2W -# OBSOLETE "st2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "st2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_st2w(_SD, RA, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 8); -# OBSOLETE _IMEM,10110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2W long -# OBSOLETE "st2w r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_st2w(_SD, RA, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // ST4HB -# OBSOLETE -# OBSOLETE void::function::do_st4hb:int ra, unsigned32 rb, unsigned32 src -# OBSOLETE unsigned32 val_ra; -# OBSOLETE unsigned32 mem; -# OBSOLETE get_even_reg(_SD, &ra, &val_ra, "ST4HB"); -# OBSOLETE mem = INSERTED32(EXTRACTED32(val_ra, 8, 15), 0, 7) | -# OBSOLETE INSERTED32(EXTRACTED32(val_ra, 24, 31), 8, 15) | -# OBSOLETE INSERTED32(EXTRACTED32(GPR[ra + 1], 8, 15), 16, 23) | -# OBSOLETE INSERTED32(EXTRACTED32(GPR[ra + 1], 24, 31), 24, 31); -# OBSOLETE STORE(rb + src, 4, mem); -# OBSOLETE -# OBSOLETE _IMEM,10101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST4HB -# OBSOLETE "st4hb r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "st4hb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_st4hb(_SD, RA, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); -# OBSOLETE _IMEM,10101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST4HB long -# OBSOLETE "st4hb r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_st4hb(_SD, RA, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // STB -# OBSOLETE -# OBSOLETE void::function::do_stb:unsigned32 ra, unsigned32 rb, unsigned32 src -# OBSOLETE STORE(rb + src, 1, EXTRACTED32(ra, 24, 31)); -# OBSOLETE -# OBSOLETE _IMEM,10000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STB -# OBSOLETE "stb r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "stb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_stb(_SD, val_Ra, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 1); -# OBSOLETE _IMEM,10000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STB long -# OBSOLETE "stb r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_stb(_SD, val_Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // STH -# OBSOLETE -# OBSOLETE void::function::do_sth:unsigned32 ra, unsigned32 rb, unsigned32 src -# OBSOLETE STORE(rb + src, 2, EXTRACTED32(ra, 16, 31)); -# OBSOLETE -# OBSOLETE _IMEM,10010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STH -# OBSOLETE "sth r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "sth r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_sth(_SD, val_Ra, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2); -# OBSOLETE _IMEM,10010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STH long -# OBSOLETE "sth r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_sth(_SD, val_Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // STHH -# OBSOLETE -# OBSOLETE void::function::do_sthh:unsigned32 ra, unsigned32 rb, unsigned32 src -# OBSOLETE STORE(rb + src, 2, EXTRACTED32(ra, 0, 15)); -# OBSOLETE -# OBSOLETE _IMEM,10001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STHH -# OBSOLETE "sthh r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "sthh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_sthh(_SD, val_Ra, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2); -# OBSOLETE _IMEM,10001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STHH long -# OBSOLETE "sthh r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_sthh(_SD, val_Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // STW -# OBSOLETE -# OBSOLETE void::function::do_stw:unsigned32 ra, unsigned32 rb, unsigned32 src -# OBSOLETE STORE(rb + src, 4, ra); -# OBSOLETE -# OBSOLETE _IMEM,10100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STW -# OBSOLETE "stw r<RA>, @(r<RB>, <SRC_6>)":XX == 0 -# OBSOLETE "stw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)" -# OBSOLETE do_stw(_SD, val_Ra, Rb, src); -# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4); -# OBSOLETE _IMEM,10100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STW long -# OBSOLETE "stw r<RA>, @(r<RB>, <imm>)" -# OBSOLETE do_stw(_SD, val_Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SUB -# OBSOLETE -# OBSOLETE void::function::do_sub:unsigned32 *ra, unsigned32 rb, unsigned32 imm -# OBSOLETE ALU_BEGIN(rb); -# OBSOLETE ALU_SUBB(imm); -# OBSOLETE ALU_END(ra); -# OBSOLETE -# OBSOLETE _IALU1,00010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB -# OBSOLETE "sub r<RA>, r<RB>, r<RC>" -# OBSOLETE do_sub (_SD, Ra, Rb, Rc); -# OBSOLETE _IALU1,00010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB imm -# OBSOLETE "sub r<RA>, r<RB>, <imm>" -# OBSOLETE do_sub (_SD, Ra, Rb, imm); -# OBSOLETE _IALU1,00010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB imm long -# OBSOLETE "sub r<RA>, r<RB>, <imm>" -# OBSOLETE do_sub (_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SUB2H -# OBSOLETE -# OBSOLETE void::function::do_sub2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm -# OBSOLETE unsigned16 high = VH2_4(rb) - VH2_4(imm); -# OBSOLETE unsigned16 low = VL2_4(rb) - VL2_4(imm); -# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low); -# OBSOLETE -# OBSOLETE _IALU1,00011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB2H -# OBSOLETE "sub2h r<RA>, r<RB>, r<RC>" -# OBSOLETE do_sub2h (_SD, Ra, Rb, Rc); -# OBSOLETE _IALU1,00011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB2H imm -# OBSOLETE "sub2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_sub2h (_SD, Ra, Rb, immHL); -# OBSOLETE _IALU1,00011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB2H imm long -# OBSOLETE "sub2h r<RA>, r<RB>, <imm>" -# OBSOLETE do_sub2h (_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SUBB -# OBSOLETE -# OBSOLETE void::function::do_subb:unsigned32 *ra, unsigned32 rb, unsigned32 imm -# OBSOLETE ALU_BEGIN(rb); -# OBSOLETE ALU_SUBB_B(imm, ALU_CARRY); -# OBSOLETE ALU_END(ra); -# OBSOLETE -# OBSOLETE _IALU1,00101,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBB -# OBSOLETE "subb r<RA>, r<RB>, r<RC>" -# OBSOLETE do_subb (_SD, Ra, Rb, Rc); -# OBSOLETE _IALU1,00101,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBB imm -# OBSOLETE "subb r<RA>, r<RB>, <imm>" -# OBSOLETE do_subb (_SD, Ra, Rb, imm); -# OBSOLETE _IALU1,00101,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBB imm long -# OBSOLETE "subb r<RA>, r<RB>, <imm>" -# OBSOLETE do_subb (_SD, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // SUBHppp -# OBSOLETE -# OBSOLETE void::function::do_subh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src -# OBSOLETE switch (ppp) { -# OBSOLETE case 0x0: /* LLL */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VL2_4(rb)); -# OBSOLETE ALU16_SUBB(VL2_4(src)); -# OBSOLETE ALU16_END(ra, 0); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x1: /* LLH */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VL2_4(rb)); -# OBSOLETE ALU16_SUBB(VH2_4(src)); -# OBSOLETE ALU16_END(ra, 0); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x2: /* LHL */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VH2_4(rb)); -# OBSOLETE ALU16_SUBB(VL2_4(src)); -# OBSOLETE ALU16_END(ra, 0); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x3: /* LHH */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VH2_4(rb)); -# OBSOLETE ALU16_SUBB(VH2_4(src)); -# OBSOLETE ALU16_END(ra, 0); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x4: /* HLL */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VL2_4(rb)); -# OBSOLETE ALU16_SUBB(VL2_4(src)); -# OBSOLETE ALU16_END(ra, 1); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x5: /* HLH */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VL2_4(rb)); -# OBSOLETE ALU16_SUBB(VH2_4(src)); -# OBSOLETE ALU16_END(ra, 1); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x6: /* HHL */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VH2_4(rb)); -# OBSOLETE ALU16_SUBB(VL2_4(src)); -# OBSOLETE ALU16_END(ra, 1); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE case 0x7: /* HHH */ -# OBSOLETE { -# OBSOLETE ALU16_BEGIN(VH2_4(rb)); -# OBSOLETE ALU16_SUBB(VH2_4(src)); -# OBSOLETE ALU16_END(ra, 1); -# OBSOLETE } -# OBSOLETE break; -# OBSOLETE default: -# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_subh_ppp - internal error - bad switch"); -# OBSOLETE } -# OBSOLETE -# OBSOLETE _IALU1,11,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBHppp -# OBSOLETE "subh%s<ppp> r<RA>, r<RB>, r<RC>" -# OBSOLETE do_subh_ppp(_SD, ppp, Ra, Rb, Rc); -# OBSOLETE _IALU1,11,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBHppp imm -# OBSOLETE "subh%s<ppp> r<RA>, r<RB>, <imm>" -# OBSOLETE do_subh_ppp(_SD, ppp, Ra, Rb, immHL); -# OBSOLETE _IALU1,11,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBHppp imm long -# OBSOLETE "subh%s<ppp> r<RA>, r<RB>, <imm>" -# OBSOLETE do_subh_ppp(_SD, ppp, Ra, Rb, imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // TRAP -# OBSOLETE -# OBSOLETE address_word::function::do_trap:address_word trap_vector, address_word nia -# OBSOLETE /* Steal trap 31 for doing system calls */ -# OBSOLETE /* System calls are defined in libgloss/d30v/syscall.h. */ -# OBSOLETE if (trap_vector == EIT_VB + 0x20 + (31 << 3)) -# OBSOLETE { -# OBSOLETE enum { PARM1 = 2, PARM2, PARM3, PARM4, FUNC }; -# OBSOLETE if (GPR[FUNC] == 1) /* exit */ -# OBSOLETE { -# OBSOLETE sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, cia, sim_exited, -# OBSOLETE GPR[PARM1]); -# OBSOLETE return -1; /* dummy */ -# OBSOLETE } -# OBSOLETE else -# OBSOLETE { -# OBSOLETE CB_SYSCALL syscall; -# OBSOLETE -# OBSOLETE CB_SYSCALL_INIT (&syscall); -# OBSOLETE syscall.arg1 = GPR[PARM1]; -# OBSOLETE syscall.arg2 = GPR[PARM2]; -# OBSOLETE syscall.arg3 = GPR[PARM3]; -# OBSOLETE syscall.arg4 = GPR[PARM4]; -# OBSOLETE syscall.func = GPR[FUNC]; -# OBSOLETE syscall.p1 = (PTR) SD; -# OBSOLETE syscall.read_mem = d30v_read_mem; -# OBSOLETE syscall.write_mem = d30v_write_mem; -# OBSOLETE -# OBSOLETE WRITE32_QUEUE (&GPR[PARM1], -# OBSOLETE ((cb_syscall (STATE_CALLBACK (SD), &syscall) -# OBSOLETE == CB_RC_OK) -# OBSOLETE ? syscall.result -# OBSOLETE : -syscall.errcode)); -# OBSOLETE return nia; -# OBSOLETE } -# OBSOLETE } -# OBSOLETE else if (TRACE_TRAP_P) -# OBSOLETE { -# OBSOLETE int reg, i; -# OBSOLETE sim_io_eprintf (sd, "\nTrap %ld:\n", (long) ((trap_vector - (EIT_VB + 0x20)) >> 3)); -# OBSOLETE for (reg = 0; reg < NR_GENERAL_PURPOSE_REGISTERS; reg += 8) -# OBSOLETE { -# OBSOLETE sim_io_eprintf (sd, "r%.2d - r%.2d: ", reg, reg+7); -# OBSOLETE for (i = 0; i < 8; i++) -# OBSOLETE sim_io_eprintf (sd, " 0x%.8lx", (long) GPR[reg+i]); -# OBSOLETE sim_io_eprintf (sd, "\n"); -# OBSOLETE } -# OBSOLETE -# OBSOLETE for (reg = 0; reg < 16; reg += 8) -# OBSOLETE { -# OBSOLETE sim_io_eprintf (sd, "cr%.2d - cr%.2d:", reg, reg+7); -# OBSOLETE for (i = 0; i < 8; i++) -# OBSOLETE sim_io_eprintf (sd, " 0x%.8lx", (long) CREG[reg+i]); -# OBSOLETE sim_io_eprintf (sd, "\n"); -# OBSOLETE } -# OBSOLETE -# OBSOLETE sim_io_eprintf (sd, "a0 - a1: "); -# OBSOLETE for (reg = 0; reg < NR_ACCUMULATORS; reg++) -# OBSOLETE sim_io_eprintf (sd, " 0x%.8lx 0x%.8lx", -# OBSOLETE (long)EXTRACTED64(ACC[reg], 0, 31), -# OBSOLETE (long)EXTRACTED64(ACC[reg], 32, 63)); -# OBSOLETE sim_io_eprintf (sd, "\n"); -# OBSOLETE -# OBSOLETE sim_io_eprintf (sd, "f0 - f7: "); -# OBSOLETE sim_io_eprintf (sd, " (f0) %d", (int) PSW_VAL(PSW_F0)); -# OBSOLETE sim_io_eprintf (sd, " (f1) %d", (int) PSW_VAL(PSW_F1)); -# OBSOLETE sim_io_eprintf (sd, " (f2) %d", (int) PSW_VAL(PSW_F2)); -# OBSOLETE sim_io_eprintf (sd, " (f3) %d", (int) PSW_VAL(PSW_F3)); -# OBSOLETE sim_io_eprintf (sd, " (s) %d", (int) PSW_VAL(PSW_S)); -# OBSOLETE sim_io_eprintf (sd, " (v) %d", (int) PSW_VAL(PSW_V)); -# OBSOLETE sim_io_eprintf (sd, " (va) %d", (int) PSW_VAL(PSW_VA)); -# OBSOLETE sim_io_eprintf (sd, " (c) %d\n", (int) PSW_VAL(PSW_C)); -# OBSOLETE -# OBSOLETE sim_io_eprintf (sd, "pswh: "); -# OBSOLETE sim_io_eprintf (sd, " (sm) %d", (int) PSW_VAL(PSW_SM)); -# OBSOLETE sim_io_eprintf (sd, " (ea) %d", (int) PSW_VAL(PSW_EA)); -# OBSOLETE sim_io_eprintf (sd, " (ie) %d", (int) PSW_VAL(PSW_IE)); -# OBSOLETE sim_io_eprintf (sd, " (rp) %d", (int) PSW_VAL(PSW_RP)); -# OBSOLETE sim_io_eprintf (sd, " (md) %d", (int) PSW_VAL(PSW_MD)); -# OBSOLETE -# OBSOLETE if (PSW_VAL(PSW_DB)) -# OBSOLETE sim_io_eprintf (sd, " (db) %d", (int) PSW_VAL(PSW_DB)); -# OBSOLETE -# OBSOLETE if (PSW_VAL(PSW_DS)) -# OBSOLETE sim_io_eprintf (sd, " (ds) %d", (int) PSW_VAL(PSW_DS)); -# OBSOLETE -# OBSOLETE sim_io_eprintf (sd, "\n"); -# OBSOLETE return nia; -# OBSOLETE } -# OBSOLETE else -# OBSOLETE { -# OBSOLETE if(PSW_VAL(PSW_RP) && RPT_E == cia) -# OBSOLETE { -# OBSOLETE WRITE32_QUEUE (&bPC, RPT_S); -# OBSOLETE if (RPT_C == 0) -# OBSOLETE PSW_SET (PSW_RP, 0); -# OBSOLETE } -# OBSOLETE else -# OBSOLETE WRITE32_QUEUE (&bPC, cia + 8); -# OBSOLETE DID_TRAP = 1; -# OBSOLETE return trap_vector; -# OBSOLETE } -# OBSOLETE -# OBSOLETE _BRA,01001,00,6.**,6.**,6.RC:BRA:short:mu:TRAP -# OBSOLETE "trap r<RC>" -# OBSOLETE nia = do_trap (_SD, EIT_VB + 0x20 + MASKED32(Rc, 24, 28), nia); -# OBSOLETE _BRA,01001,10,6.**,6.**,_IMM6:BRA:short:mu:TRAP imm -# OBSOLETE "trap <imm>" -# OBSOLETE nia = do_trap (_SD, EIT_VB + 0x20 + (imm_5 << 3), nia); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // XOR -# OBSOLETE -# OBSOLETE _LOGIC,11011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:XOR -# OBSOLETE "xor r<RA>, r<RB>, r<RC>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ Rc); -# OBSOLETE _LOGIC,11011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:XOR imm -# OBSOLETE "xor r<RA>, r<RB>, <imm>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ imm); -# OBSOLETE _LOGIC,11011,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:XOR imm long -# OBSOLETE "xor r<RA>, r<RB>, <imm>" -# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ imm); -# OBSOLETE -# OBSOLETE -# OBSOLETE -# OBSOLETE // XORFG -# OBSOLETE -# OBSOLETE _LOGIC,01011,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:XORFG -# OBSOLETE "xorfg f<FA>, f<FB>, f<FC>" -# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ PSW_FLAG_VAL(FC)); -# OBSOLETE _LOGIC,01011,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:XORFG imm -# OBSOLETE "xorfg f<FA>, f<FB>, <imm_6>" -# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ (imm_6 & 1)); diff --git a/sim/d30v/dc-short b/sim/d30v/dc-short deleted file mode 100644 index 95887ec..0000000 --- a/sim/d30v/dc-short +++ /dev/null @@ -1,22 +0,0 @@ -# OBSOLETE // -# OBSOLETE // Mitsubishi Electric Corp. D30V Simulator. -# OBSOLETE // Copyright (C) 1997, Free Software Foundation, Inc. -# OBSOLETE // Contributed by Cygnus Solutions Inc. -# OBSOLETE // -# OBSOLETE // This file is part of GDB, the GNU debugger. -# OBSOLETE // -# OBSOLETE // This program is free software; you can redistribute it and/or modify -# OBSOLETE // it under the terms of the GNU General Public License as published by -# OBSOLETE // the Free Software Foundation; either version 2 of the License, or -# OBSOLETE // (at your option) any later version. -# OBSOLETE // -# OBSOLETE // This program is distributed in the hope that it will be useful, -# OBSOLETE // but WITHOUT ANY WARRANTY; without even the implied warranty of -# OBSOLETE // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# OBSOLETE // GNU General Public License for more details. -# OBSOLETE // -# OBSOLETE // You should have received a copy of the GNU General Public License -# OBSOLETE // along with this program; if not, write to the Free Software -# OBSOLETE // Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# OBSOLETE // -# OBSOLETE switch: 4: 13: 4: 13 diff --git a/sim/d30v/engine.c b/sim/d30v/engine.c deleted file mode 100644 index 0f4a025..0000000 --- a/sim/d30v/engine.c +++ /dev/null @@ -1,496 +0,0 @@ -/* OBSOLETE /* This file is part of the program psim. */ -/* OBSOLETE */ -/* OBSOLETE Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> */ -/* OBSOLETE Copyright (C) 1996, 1997, Free Software Foundation */ -/* OBSOLETE */ -/* OBSOLETE This program is free software; you can redistribute it and/or modify */ -/* OBSOLETE it under the terms of the GNU General Public License as published by */ -/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */ -/* OBSOLETE (at your option) any later version. */ -/* OBSOLETE */ -/* OBSOLETE This program is distributed in the hope that it will be useful, */ -/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ -/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ -/* OBSOLETE GNU General Public License for more details. */ -/* OBSOLETE */ -/* OBSOLETE You should have received a copy of the GNU General Public License */ -/* OBSOLETE along with this program; if not, write to the Free Software */ -/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* OBSOLETE */ -/* OBSOLETE */ */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE #ifndef ENGINE_C */ -/* OBSOLETE #define ENGINE_C */ -/* OBSOLETE */ -/* OBSOLETE #include "sim-main.h" */ -/* OBSOLETE */ -/* OBSOLETE #include <stdio.h> */ -/* OBSOLETE #include <ctype.h> */ -/* OBSOLETE */ -/* OBSOLETE #ifdef HAVE_STDLIB_H */ -/* OBSOLETE #include <stdlib.h> */ -/* OBSOLETE #endif */ -/* OBSOLETE */ -/* OBSOLETE #ifdef HAVE_STRING_H */ -/* OBSOLETE #include <string.h> */ -/* OBSOLETE #else */ -/* OBSOLETE #ifdef HAVE_STRINGS_H */ -/* OBSOLETE #include <strings.h> */ -/* OBSOLETE #endif */ -/* OBSOLETE #endif */ -/* OBSOLETE */ -/* OBSOLETE static void */ -/* OBSOLETE do_stack_swap (SIM_DESC sd) */ -/* OBSOLETE { */ -/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */ -/* OBSOLETE unsigned new_sp = (PSW_VAL(PSW_SM) != 0); */ -/* OBSOLETE if (cpu->regs.current_sp != new_sp) */ -/* OBSOLETE { */ -/* OBSOLETE cpu->regs.sp[cpu->regs.current_sp] = SP; */ -/* OBSOLETE cpu->regs.current_sp = new_sp; */ -/* OBSOLETE SP = cpu->regs.sp[cpu->regs.current_sp]; */ -/* OBSOLETE } */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE #if WITH_TRACE */ -/* OBSOLETE /* Implement ALU tracing of 32-bit registers. */ */ -/* OBSOLETE static void */ -/* OBSOLETE trace_alu32 (SIM_DESC sd, */ -/* OBSOLETE sim_cpu *cpu, */ -/* OBSOLETE address_word cia, */ -/* OBSOLETE unsigned32 *ptr) */ -/* OBSOLETE { */ -/* OBSOLETE unsigned32 value = *ptr; */ -/* OBSOLETE */ -/* OBSOLETE if (ptr >= &GPR[0] && ptr <= &GPR[NR_GENERAL_PURPOSE_REGISTERS]) */ -/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */ -/* OBSOLETE "Set register r%-2d = 0x%.8lx (%ld)", */ -/* OBSOLETE ptr - &GPR[0], (long)value, (long)value); */ -/* OBSOLETE */ -/* OBSOLETE else if (ptr == &PSW || ptr == &bPSW || ptr == &DPSW) */ -/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */ -/* OBSOLETE "Set register %s = 0x%.8lx%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", */ -/* OBSOLETE (ptr == &PSW) ? "psw" : ((ptr == &bPSW) ? "bpsw" : "dpsw"), */ -/* OBSOLETE (long)value, */ -/* OBSOLETE (value & (0x80000000 >> PSW_SM)) ? ", sm" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_EA)) ? ", ea" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_DB)) ? ", db" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_DS)) ? ", ds" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_IE)) ? ", ie" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_RP)) ? ", rp" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_MD)) ? ", md" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_F0)) ? ", f0" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_F1)) ? ", f1" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_F2)) ? ", f2" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_F3)) ? ", f3" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_S)) ? ", s" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_V)) ? ", v" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_VA)) ? ", va" : "", */ -/* OBSOLETE (value & (0x80000000 >> PSW_C)) ? ", c" : ""); */ -/* OBSOLETE */ -/* OBSOLETE else if (ptr >= &CREG[0] && ptr <= &CREG[NR_CONTROL_REGISTERS]) */ -/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */ -/* OBSOLETE "Set register cr%d = 0x%.8lx (%ld)", */ -/* OBSOLETE ptr - &CREG[0], (long)value, (long)value); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* Implement ALU tracing of 32-bit registers. */ */ -/* OBSOLETE static void */ -/* OBSOLETE trace_alu64 (SIM_DESC sd, */ -/* OBSOLETE sim_cpu *cpu, */ -/* OBSOLETE address_word cia, */ -/* OBSOLETE unsigned64 *ptr) */ -/* OBSOLETE { */ -/* OBSOLETE unsigned64 value = *ptr; */ -/* OBSOLETE */ -/* OBSOLETE if (ptr >= &ACC[0] && ptr <= &ACC[NR_ACCUMULATORS]) */ -/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */ -/* OBSOLETE "Set register a%-2d = 0x%.8lx 0x%.8lx", */ -/* OBSOLETE ptr - &ACC[0], */ -/* OBSOLETE (unsigned long)(unsigned32)(value >> 32), */ -/* OBSOLETE (unsigned long)(unsigned32)value); */ -/* OBSOLETE */ -/* OBSOLETE } */ -/* OBSOLETE #endif */ -/* OBSOLETE */ -/* OBSOLETE /* Process all of the queued up writes in order now */ */ -/* OBSOLETE void */ -/* OBSOLETE unqueue_writes (SIM_DESC sd, */ -/* OBSOLETE sim_cpu *cpu, */ -/* OBSOLETE address_word cia) */ -/* OBSOLETE { */ -/* OBSOLETE int i, num; */ -/* OBSOLETE int did_psw = 0; */ -/* OBSOLETE unsigned32 *psw_addr = &PSW; */ -/* OBSOLETE */ -/* OBSOLETE num = WRITE32_NUM; */ -/* OBSOLETE for (i = 0; i < num; i++) */ -/* OBSOLETE { */ -/* OBSOLETE unsigned32 mask = WRITE32_MASK (i); */ -/* OBSOLETE unsigned32 *ptr = WRITE32_PTR (i); */ -/* OBSOLETE unsigned32 value = (*ptr & ~mask) | (WRITE32_VALUE (i) & mask); */ -/* OBSOLETE int j; */ -/* OBSOLETE */ -/* OBSOLETE if (ptr == psw_addr) */ -/* OBSOLETE { */ -/* OBSOLETE /* If MU instruction was not a MVTSYS, resolve PSW */ -/* OBSOLETE contention in favour of IU. */ */ -/* OBSOLETE if(! STATE_CPU (sd, 0)->mvtsys_left_p) */ -/* OBSOLETE { */ -/* OBSOLETE /* Detect contention in parallel writes to the same PSW flags. */ -/* OBSOLETE The hardware allows the updates from IU to prevail over */ -/* OBSOLETE those from MU. */ */ -/* OBSOLETE */ -/* OBSOLETE unsigned32 flag_bits = */ -/* OBSOLETE BIT32 (PSW_F0) | BIT32 (PSW_F1) | */ -/* OBSOLETE BIT32 (PSW_F2) | BIT32 (PSW_F3) | */ -/* OBSOLETE BIT32 (PSW_S) | BIT32 (PSW_V) | */ -/* OBSOLETE BIT32 (PSW_VA) | BIT32 (PSW_C); */ -/* OBSOLETE unsigned32 my_flag_bits = mask & flag_bits; */ -/* OBSOLETE */ -/* OBSOLETE for (j = i + 1; j < num; j++) */ -/* OBSOLETE if (WRITE32_PTR (j) == psw_addr && /* write to PSW */ */ -/* OBSOLETE WRITE32_MASK (j) & my_flag_bits) /* some of the same flags */ */ -/* OBSOLETE { */ -/* OBSOLETE /* Recompute local mask & value, to suppress this */ -/* OBSOLETE earlier write to the same flag bits. */ */ -/* OBSOLETE */ -/* OBSOLETE unsigned32 new_mask = mask & ~(WRITE32_MASK (j) & my_flag_bits); */ -/* OBSOLETE */ -/* OBSOLETE /* There is a special case for the VA (accumulated */ -/* OBSOLETE overflow) flag, in that it is only included in the */ -/* OBSOLETE second instruction's mask if the overflow */ -/* OBSOLETE occurred. Yet the hardware still suppresses the */ -/* OBSOLETE first instruction's update to VA. So we kludge */ -/* OBSOLETE this by inferring PSW_V -> PSW_VA for the second */ -/* OBSOLETE instruction. */ */ -/* OBSOLETE */ -/* OBSOLETE if (WRITE32_MASK (j) & BIT32 (PSW_V)) */ -/* OBSOLETE { */ -/* OBSOLETE new_mask &= ~BIT32 (PSW_VA); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE value = (*ptr & ~new_mask) | (WRITE32_VALUE (i) & new_mask); */ -/* OBSOLETE } */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE did_psw = 1; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE *ptr = value; */ -/* OBSOLETE */ -/* OBSOLETE #if WITH_TRACE */ -/* OBSOLETE if (TRACE_ALU_P (cpu)) */ -/* OBSOLETE trace_alu32 (sd, cpu, cia, ptr); */ -/* OBSOLETE #endif */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE num = WRITE64_NUM; */ -/* OBSOLETE for (i = 0; i < num; i++) */ -/* OBSOLETE { */ -/* OBSOLETE unsigned64 *ptr = WRITE64_PTR (i); */ -/* OBSOLETE *ptr = WRITE64_VALUE (i); */ -/* OBSOLETE */ -/* OBSOLETE #if WITH_TRACE */ -/* OBSOLETE if (TRACE_ALU_P (cpu)) */ -/* OBSOLETE trace_alu64 (sd, cpu, cia, ptr); */ -/* OBSOLETE #endif */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE WRITE32_NUM = 0; */ -/* OBSOLETE WRITE64_NUM = 0; */ -/* OBSOLETE */ -/* OBSOLETE if (DID_TRAP == 1) /* ordinary trap */ */ -/* OBSOLETE { */ -/* OBSOLETE bPSW = PSW; */ -/* OBSOLETE PSW &= (BIT32 (PSW_DB) | BIT32 (PSW_SM)); */ -/* OBSOLETE did_psw = 1; */ -/* OBSOLETE } */ -/* OBSOLETE else if (DID_TRAP == 2) /* debug trap */ */ -/* OBSOLETE { */ -/* OBSOLETE DPSW = PSW; */ -/* OBSOLETE PSW &= BIT32 (PSW_DS); */ -/* OBSOLETE PSW |= BIT32 (PSW_DS); */ -/* OBSOLETE did_psw = 1; */ -/* OBSOLETE } */ -/* OBSOLETE DID_TRAP = 0; */ -/* OBSOLETE */ -/* OBSOLETE if (did_psw) */ -/* OBSOLETE do_stack_swap (sd); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE /* SIMULATE INSTRUCTIONS, various different ways of achieving the same */ -/* OBSOLETE thing */ */ -/* OBSOLETE */ -/* OBSOLETE static address_word */ -/* OBSOLETE do_long (SIM_DESC sd, */ -/* OBSOLETE l_instruction_word instruction, */ -/* OBSOLETE address_word cia) */ -/* OBSOLETE { */ -/* OBSOLETE address_word nia = l_idecode_issue(sd, */ -/* OBSOLETE instruction, */ -/* OBSOLETE cia); */ -/* OBSOLETE */ -/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */ -/* OBSOLETE return nia; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE static address_word */ -/* OBSOLETE do_2_short (SIM_DESC sd, */ -/* OBSOLETE s_instruction_word insn1, */ -/* OBSOLETE s_instruction_word insn2, */ -/* OBSOLETE cpu_units unit, */ -/* OBSOLETE address_word cia) */ -/* OBSOLETE { */ -/* OBSOLETE address_word nia; */ -/* OBSOLETE */ -/* OBSOLETE /* run the first instruction */ */ -/* OBSOLETE STATE_CPU (sd, 0)->unit = unit; */ -/* OBSOLETE STATE_CPU (sd, 0)->left_kills_right_p = 0; */ -/* OBSOLETE STATE_CPU (sd, 0)->mvtsys_left_p = 0; */ -/* OBSOLETE nia = s_idecode_issue(sd, */ -/* OBSOLETE insn1, */ -/* OBSOLETE cia); */ -/* OBSOLETE */ -/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */ -/* OBSOLETE */ -/* OBSOLETE /* Only do the second instruction if the PC has not changed */ */ -/* OBSOLETE if ((nia == INVALID_INSTRUCTION_ADDRESS) && */ -/* OBSOLETE (! STATE_CPU (sd, 0)->left_kills_right_p)) { */ -/* OBSOLETE STATE_CPU (sd, 0)->unit = any_unit; */ -/* OBSOLETE nia = s_idecode_issue (sd, */ -/* OBSOLETE insn2, */ -/* OBSOLETE cia); */ -/* OBSOLETE */ -/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE STATE_CPU (sd, 0)->left_kills_right_p = 0; */ -/* OBSOLETE STATE_CPU (sd, 0)->mvtsys_left_p = 0; */ -/* OBSOLETE return nia; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE static address_word */ -/* OBSOLETE do_parallel (SIM_DESC sd, */ -/* OBSOLETE s_instruction_word left_insn, */ -/* OBSOLETE s_instruction_word right_insn, */ -/* OBSOLETE address_word cia) */ -/* OBSOLETE { */ -/* OBSOLETE address_word nia_left; */ -/* OBSOLETE address_word nia_right; */ -/* OBSOLETE address_word nia; */ -/* OBSOLETE */ -/* OBSOLETE /* run the first instruction */ */ -/* OBSOLETE STATE_CPU (sd, 0)->unit = memory_unit; */ -/* OBSOLETE STATE_CPU (sd, 0)->left_kills_right_p = 0; */ -/* OBSOLETE STATE_CPU (sd, 0)->mvtsys_left_p = 0; */ -/* OBSOLETE nia_left = s_idecode_issue(sd, */ -/* OBSOLETE left_insn, */ -/* OBSOLETE cia); */ -/* OBSOLETE */ -/* OBSOLETE /* run the second instruction */ */ -/* OBSOLETE STATE_CPU (sd, 0)->unit = integer_unit; */ -/* OBSOLETE nia_right = s_idecode_issue(sd, */ -/* OBSOLETE right_insn, */ -/* OBSOLETE cia); */ -/* OBSOLETE */ -/* OBSOLETE /* merge the PC's */ */ -/* OBSOLETE if (nia_left == INVALID_INSTRUCTION_ADDRESS) { */ -/* OBSOLETE if (nia_right == INVALID_INSTRUCTION_ADDRESS) */ -/* OBSOLETE nia = INVALID_INSTRUCTION_ADDRESS; */ -/* OBSOLETE else */ -/* OBSOLETE nia = nia_right; */ -/* OBSOLETE } */ -/* OBSOLETE else { */ -/* OBSOLETE if (nia_right == INVALID_INSTRUCTION_ADDRESS) */ -/* OBSOLETE nia = nia_left; */ -/* OBSOLETE else { */ -/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, "parallel jumps"); */ -/* OBSOLETE nia = INVALID_INSTRUCTION_ADDRESS; */ -/* OBSOLETE } */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia); */ -/* OBSOLETE return nia; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE typedef enum { */ -/* OBSOLETE p_insn = 0, */ -/* OBSOLETE long_insn = 3, */ -/* OBSOLETE l_r_insn = 1, */ -/* OBSOLETE r_l_insn = 2, */ -/* OBSOLETE } instruction_types; */ -/* OBSOLETE */ -/* OBSOLETE STATIC_INLINE instruction_types */ -/* OBSOLETE instruction_type(l_instruction_word insn) */ -/* OBSOLETE { */ -/* OBSOLETE int fm0 = MASKED64(insn, 0, 0) != 0; */ -/* OBSOLETE int fm1 = MASKED64(insn, 32, 32) != 0; */ -/* OBSOLETE return ((fm0 << 1) | fm1); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE void */ -/* OBSOLETE sim_engine_run (SIM_DESC sd, */ -/* OBSOLETE int last_cpu_nr, */ -/* OBSOLETE int nr_cpus, */ -/* OBSOLETE int siggnal) */ -/* OBSOLETE { */ -/* OBSOLETE while (1) */ -/* OBSOLETE { */ -/* OBSOLETE address_word cia = PC; */ -/* OBSOLETE address_word nia; */ -/* OBSOLETE l_instruction_word insn = IMEM(cia); */ -/* OBSOLETE int rp_was_set; */ -/* OBSOLETE int rpt_c_was_nonzero; */ -/* OBSOLETE */ -/* OBSOLETE /* Before executing the instruction, we need to test whether or */ -/* OBSOLETE not RPT_C is greater than zero, and save that state for use */ -/* OBSOLETE after executing the instruction. In particular, we need to */ -/* OBSOLETE not care whether the instruction changes RPT_C itself. */ */ -/* OBSOLETE */ -/* OBSOLETE rpt_c_was_nonzero = (RPT_C > 0); */ -/* OBSOLETE */ -/* OBSOLETE /* Before executing the instruction, we need to check to see if */ -/* OBSOLETE we have to decrement RPT_C, the repeat count register. Do this */ -/* OBSOLETE if PC == RPT_E, but only if we are in an active repeat block. */ */ -/* OBSOLETE */ -/* OBSOLETE if (PC == RPT_E && */ -/* OBSOLETE (RPT_C > 0 || PSW_VAL (PSW_RP) != 0)) */ -/* OBSOLETE { */ -/* OBSOLETE RPT_C --; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* Now execute the instruction at PC */ */ -/* OBSOLETE */ -/* OBSOLETE switch (instruction_type (insn)) */ -/* OBSOLETE { */ -/* OBSOLETE case long_insn: */ -/* OBSOLETE nia = do_long (sd, insn, cia); */ -/* OBSOLETE break; */ -/* OBSOLETE case r_l_insn: */ -/* OBSOLETE /* L <- R */ */ -/* OBSOLETE nia = do_2_short (sd, insn, insn >> 32, integer_unit, cia); */ -/* OBSOLETE break; */ -/* OBSOLETE case l_r_insn: */ -/* OBSOLETE /* L -> R */ */ -/* OBSOLETE nia = do_2_short (sd, insn >> 32, insn, memory_unit, cia); */ -/* OBSOLETE break; */ -/* OBSOLETE case p_insn: */ -/* OBSOLETE nia = do_parallel (sd, insn >> 32, insn, cia); */ -/* OBSOLETE break; */ -/* OBSOLETE default: */ -/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */ -/* OBSOLETE "internal error - engine_run_until_stop - bad switch"); */ -/* OBSOLETE nia = -1; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE if (TRACE_ACTION) */ -/* OBSOLETE { */ -/* OBSOLETE if (TRACE_ACTION & TRACE_ACTION_CALL) */ -/* OBSOLETE call_occurred (sd, STATE_CPU (sd, 0), cia, nia); */ -/* OBSOLETE */ -/* OBSOLETE if (TRACE_ACTION & TRACE_ACTION_RETURN) */ -/* OBSOLETE return_occurred (sd, STATE_CPU (sd, 0), cia, nia); */ -/* OBSOLETE */ -/* OBSOLETE TRACE_ACTION = 0; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* Check now to see if we need to reset the RP bit in the PSW. */ -/* OBSOLETE There are three conditions for this, the RP bit is already */ -/* OBSOLETE set (just a speed optimization), the instruction we just */ -/* OBSOLETE executed is the last instruction in the loop, and the repeat */ -/* OBSOLETE count is currently zero. */ */ -/* OBSOLETE */ -/* OBSOLETE rp_was_set = PSW_VAL (PSW_RP); */ -/* OBSOLETE if (rp_was_set && (PC == RPT_E) && RPT_C == 0) */ -/* OBSOLETE { */ -/* OBSOLETE PSW_SET (PSW_RP, 0); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* Now update the PC. If we just executed a jump instruction, */ -/* OBSOLETE that takes precedence over everything else. Next comes */ -/* OBSOLETE branching back to RPT_S as a result of a loop. Finally, the */ -/* OBSOLETE default is to simply advance to the next inline */ -/* OBSOLETE instruction. */ */ -/* OBSOLETE */ -/* OBSOLETE if (nia != INVALID_INSTRUCTION_ADDRESS) */ -/* OBSOLETE { */ -/* OBSOLETE PC = nia; */ -/* OBSOLETE } */ -/* OBSOLETE else if (rp_was_set && rpt_c_was_nonzero && (PC == RPT_E)) */ -/* OBSOLETE { */ -/* OBSOLETE PC = RPT_S; */ -/* OBSOLETE } */ -/* OBSOLETE else */ -/* OBSOLETE { */ -/* OBSOLETE PC = cia + 8; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* Check for DDBT (debugger debug trap) condition. Do this after */ -/* OBSOLETE the repeat block checks so the excursion to the trap handler does */ -/* OBSOLETE not alter looping state. */ */ -/* OBSOLETE */ -/* OBSOLETE if (cia == IBA && PSW_VAL (PSW_DB)) */ -/* OBSOLETE { */ -/* OBSOLETE DPC = PC; */ -/* OBSOLETE PSW_SET (PSW_EA, 1); */ -/* OBSOLETE DPSW = PSW; */ -/* OBSOLETE /* clear all bits in PSW except SM */ */ -/* OBSOLETE PSW &= BIT32 (PSW_SM); */ -/* OBSOLETE /* add DS bit */ */ -/* OBSOLETE PSW |= BIT32 (PSW_DS); */ -/* OBSOLETE /* dispatch to DDBT handler */ */ -/* OBSOLETE PC = 0xfffff128; /* debugger_debug_trap_address */ */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* process any events */ */ -/* OBSOLETE /* FIXME - should L->R or L<-R insns count as two cycles? */ */ -/* OBSOLETE if (sim_events_tick (sd)) */ -/* OBSOLETE { */ -/* OBSOLETE sim_events_process (sd); */ -/* OBSOLETE } */ -/* OBSOLETE } */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE /* d30v external interrupt handler. */ -/* OBSOLETE */ -/* OBSOLETE Note: This should be replaced by a proper interrupt delivery */ -/* OBSOLETE mechanism. This interrupt mechanism discards later interrupts if */ -/* OBSOLETE an earlier interrupt hasn't been delivered. */ -/* OBSOLETE */ -/* OBSOLETE Note: This interrupt mechanism does not reset its self when the */ -/* OBSOLETE simulator is re-opened. */ */ -/* OBSOLETE */ -/* OBSOLETE void */ -/* OBSOLETE d30v_interrupt_event (SIM_DESC sd, */ -/* OBSOLETE void *data) */ -/* OBSOLETE { */ -/* OBSOLETE if (PSW_VAL (PSW_IE)) */ -/* OBSOLETE /* interrupts not masked */ */ -/* OBSOLETE { */ -/* OBSOLETE /* scrub any pending interrupt */ */ -/* OBSOLETE if (sd->pending_interrupt != NULL) */ -/* OBSOLETE sim_events_deschedule (sd, sd->pending_interrupt); */ -/* OBSOLETE /* deliver */ */ -/* OBSOLETE bPSW = PSW; */ -/* OBSOLETE bPC = PC; */ -/* OBSOLETE PSW = 0; */ -/* OBSOLETE PC = 0xfffff138; /* external interrupt */ */ -/* OBSOLETE do_stack_swap (sd); */ -/* OBSOLETE } */ -/* OBSOLETE else if (sd->pending_interrupt == NULL) */ -/* OBSOLETE /* interrupts masked and no interrupt pending */ */ -/* OBSOLETE { */ -/* OBSOLETE sd->pending_interrupt = sim_events_schedule (sd, 1, */ -/* OBSOLETE d30v_interrupt_event, */ -/* OBSOLETE data); */ -/* OBSOLETE } */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE #endif */ diff --git a/sim/d30v/ic-d30v b/sim/d30v/ic-d30v deleted file mode 100644 index bdf7ea2..0000000 --- a/sim/d30v/ic-d30v +++ /dev/null @@ -1,80 +0,0 @@ -# OBSOLETE # Instruction cache rules -# OBSOLETE # -# OBSOLETE # This file is part of the program psim. -# OBSOLETE # -# OBSOLETE # Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au> -# OBSOLETE # -# OBSOLETE # This program is free software; you can redistribute it and/or modify -# OBSOLETE # it under the terms of the GNU General Public License as published by -# OBSOLETE # the Free Software Foundation; either version 2 of the License, or -# OBSOLETE # (at your option) any later version. -# OBSOLETE # -# OBSOLETE # This program is distributed in the hope that it will be useful, -# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of -# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# OBSOLETE # GNU General Public License for more details. -# OBSOLETE # -# OBSOLETE # You should have received a copy of the GNU General Public License -# OBSOLETE # along with this program; if not, write to the Free Software -# OBSOLETE # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# OBSOLETE # -# OBSOLETE compute:RA:RA:: -# OBSOLETE compute:RA:Ra:signed32 *:(&GPR[RA]) -# OBSOLETE compute:RA:RaH:signed16 *:AH2_4(Ra) -# OBSOLETE compute:RA:RaL:signed16 *:AL2_4(Ra) -# OBSOLETE compute:RA:val_Ra:signed32:(RA == 0 ? 0 : GPR[RA]) -# OBSOLETE # -# OBSOLETE compute:RB:RB:: -# OBSOLETE compute:RB:Rb:signed32:(RB == 0 ? 0 : GPR[RB]) -# OBSOLETE compute:RB:RbU:unsigned32:(RB == 0 ? 0 : GPR[RB]) -# OBSOLETE compute:RB:RbH:signed16:VH2_4(Rb) -# OBSOLETE compute:RB:RbL:signed16:VL2_4(Rb) -# OBSOLETE compute:RB:RbHU:unsigned16:VH2_4(Rb) -# OBSOLETE compute:RB:RbLU:unsigned16:VL2_4(Rb) -# OBSOLETE # -# OBSOLETE compute:RC:RC:: -# OBSOLETE compute:RC:Rc:signed32:(RC == 0 ? 0 : GPR[RC]) -# OBSOLETE compute:RC:RcU:unsigned32:(RC == 0 ? 0 : GPR[RC]) -# OBSOLETE compute:RC:RcH:signed16:VH2_4(Rc) -# OBSOLETE compute:RC:RcL:signed16:VL2_4(Rc) -# OBSOLETE # -# OBSOLETE # -# OBSOLETE compute:IMM_6S:IMM_6S:: -# OBSOLETE compute:IMM_6S:imm:signed32:SEXT32(IMM_6S, 32 - 6) -# OBSOLETE # NB - for short imm[HL] are the same value -# OBSOLETE compute:IMM_6S:immHL:signed32:((imm << 16) | MASKED32(imm, 16, 31)) -# OBSOLETE compute:IMM_6S:immH:signed32:imm -# OBSOLETE compute:IMM_6S:immL:signed32:imm -# OBSOLETE compute:IMM_6S:imm_6:signed32:IMM_6S -# OBSOLETE compute:IMM_6S:imm_5:signed32:LSMASKED32(IMM_6S, 4, 0) -# OBSOLETE compute:IMM_6S:imm_6u:unsigned32:(IMM_6S & 0x3f) -# OBSOLETE # -# OBSOLETE compute:RC:pcdisp:signed32:(Rc & ~0x7) -# OBSOLETE compute:RC:pcaddr:signed32:pcdisp -# OBSOLETE # -# OBSOLETE compute:IMM_18S:IMM_18S:: -# OBSOLETE compute:IMM_18S:pcdisp:signed32:(SEXT32(IMM_18S, 32 - 18) << 3) -# OBSOLETE compute:IMM_18S:pcaddr:signed32:pcdisp -# OBSOLETE compute:IMM_12S:IMM_12S:: -# OBSOLETE compute:IMM_12S:pcdisp:signed32:(SEXT32(IMM_12S, 32 - 12) << 3) -# OBSOLETE compute:IMM_12S:pcaddr:signed32:pcdisp -# OBSOLETE # -# OBSOLETE compute:IMM_8L:IMM_8L:: -# OBSOLETE compute:IMM_18L:IMM_18L:: -# OBSOLETE compute:IMM_6L:IMM_6L:: -# OBSOLETE compute:IMM_6L:imm:signed32:((((IMM_6L << 8) | IMM_8L) << 18) | IMM_18L) -# OBSOLETE compute:IMM_6L:immHL:signed32:imm -# OBSOLETE compute:IMM_6L:immH:signed32:EXTRACTED32(imm, 0, 15) -# OBSOLETE compute:IMM_6L:immL:signed32:EXTRACTED32(imm, 16, 31) -# OBSOLETE compute:IMM_6L:pcdisp:signed32:(imm & ~0x7) -# OBSOLETE compute:IMM_6L:pcaddr:signed32:pcdisp -# OBSOLETE # -# OBSOLETE # -# OBSOLETE compute:SRC_6:SRC_6:: -# OBSOLETE compute:SRC_6:src:unsigned32:(XX == 2 ? SEXT32(SRC_6, 32 - 6) : GPR[SRC_6]) -# OBSOLETE # -# OBSOLETE # -# OBSOLETE compute:AA:AA:: -# OBSOLETE compute:AA:Aa:unsigned64*:((CPU)->regs.accumulator + AA) -# OBSOLETE compute:AB:AB:: -# OBSOLETE compute:AB:Ab:unsigned64*:((CPU)->regs.accumulator + AB) diff --git a/sim/d30v/sim-calls.c b/sim/d30v/sim-calls.c deleted file mode 100644 index 9384376..0000000 --- a/sim/d30v/sim-calls.c +++ /dev/null @@ -1,364 +0,0 @@ -/* OBSOLETE /* This file is part of the program psim. */ -/* OBSOLETE */ -/* OBSOLETE Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au> */ -/* OBSOLETE Copyright (C) 1997, Free Software Foundation */ -/* OBSOLETE */ -/* OBSOLETE This program is free software; you can redistribute it and/or modify */ -/* OBSOLETE it under the terms of the GNU General Public License as published by */ -/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */ -/* OBSOLETE (at your option) any later version. */ -/* OBSOLETE */ -/* OBSOLETE This program is distributed in the hope that it will be useful, */ -/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ -/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ -/* OBSOLETE GNU General Public License for more details. */ -/* OBSOLETE */ -/* OBSOLETE You should have received a copy of the GNU General Public License */ -/* OBSOLETE along with this program; if not, write to the Free Software */ -/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* OBSOLETE */ -/* OBSOLETE */ */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE #include <stdarg.h> */ -/* OBSOLETE #include <ctype.h> */ -/* OBSOLETE */ -/* OBSOLETE #include "sim-main.h" */ -/* OBSOLETE #include "sim-options.h" */ -/* OBSOLETE */ -/* OBSOLETE #include "bfd.h" */ -/* OBSOLETE #include "sim-utils.h" */ -/* OBSOLETE */ -/* OBSOLETE #ifdef HAVE_STDLIB_H */ -/* OBSOLETE #include <stdlib.h> */ -/* OBSOLETE #endif */ -/* OBSOLETE */ -/* OBSOLETE static unsigned long extmem_size = 1024*1024*8; /* 8 meg is the maximum listed in the arch. manual */ */ -/* OBSOLETE */ -/* OBSOLETE static const char * get_insn_name (sim_cpu *, int); */ -/* OBSOLETE */ -/* OBSOLETE #define SIM_ADDR unsigned */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE #define OPTION_TRACE_CALL 200 */ -/* OBSOLETE #define OPTION_TRACE_TRAPDUMP 201 */ -/* OBSOLETE #define OPTION_EXTMEM_SIZE 202 */ -/* OBSOLETE */ -/* OBSOLETE static SIM_RC */ -/* OBSOLETE d30v_option_handler (SIM_DESC sd, */ -/* OBSOLETE sim_cpu *cpu, */ -/* OBSOLETE int opt, */ -/* OBSOLETE char *arg, */ -/* OBSOLETE int command_p) */ -/* OBSOLETE { */ -/* OBSOLETE char *suffix; */ -/* OBSOLETE */ -/* OBSOLETE switch (opt) */ -/* OBSOLETE { */ -/* OBSOLETE default: */ -/* OBSOLETE break; */ -/* OBSOLETE */ -/* OBSOLETE case OPTION_TRACE_CALL: */ -/* OBSOLETE if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0) */ -/* OBSOLETE TRACE_CALL_P = 1; */ -/* OBSOLETE else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0) */ -/* OBSOLETE TRACE_CALL_P = 0; */ -/* OBSOLETE else */ -/* OBSOLETE { */ -/* OBSOLETE sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg); */ -/* OBSOLETE return SIM_RC_FAIL; */ -/* OBSOLETE } */ -/* OBSOLETE return SIM_RC_OK; */ -/* OBSOLETE */ -/* OBSOLETE case OPTION_TRACE_TRAPDUMP: */ -/* OBSOLETE if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0) */ -/* OBSOLETE TRACE_TRAP_P = 1; */ -/* OBSOLETE else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0) */ -/* OBSOLETE TRACE_TRAP_P = 0; */ -/* OBSOLETE else */ -/* OBSOLETE { */ -/* OBSOLETE sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg); */ -/* OBSOLETE return SIM_RC_FAIL; */ -/* OBSOLETE } */ -/* OBSOLETE return SIM_RC_OK; */ -/* OBSOLETE */ -/* OBSOLETE case OPTION_EXTMEM_SIZE: */ -/* OBSOLETE if (arg == NULL || !isdigit (*arg)) */ -/* OBSOLETE { */ -/* OBSOLETE sim_io_eprintf (sd, "Invalid memory size `%s'", arg); */ -/* OBSOLETE return SIM_RC_FAIL; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE suffix = arg; */ -/* OBSOLETE extmem_size = strtol (arg, &suffix, 0); */ -/* OBSOLETE if (*suffix == 'm' || *suffix == 'M') */ -/* OBSOLETE extmem_size <<= 20; */ -/* OBSOLETE else if (*suffix == 'k' || *suffix == 'K') */ -/* OBSOLETE extmem_size <<= 10; */ -/* OBSOLETE sim_do_commandf (sd, "memory delete 0x80000000"); */ -/* OBSOLETE sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size); */ -/* OBSOLETE */ -/* OBSOLETE return SIM_RC_OK; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE sim_io_eprintf (sd, "Unknown option (%d)\n", opt); */ -/* OBSOLETE return SIM_RC_FAIL; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE static const OPTION d30v_options[] = */ -/* OBSOLETE { */ -/* OBSOLETE { {"trace-call", optional_argument, NULL, OPTION_TRACE_CALL}, */ -/* OBSOLETE '\0', "on|off", "Enable tracing of calls and returns, checking saved registers", */ -/* OBSOLETE d30v_option_handler }, */ -/* OBSOLETE { {"trace-trapdump", optional_argument, NULL, OPTION_TRACE_TRAPDUMP}, */ -/* OBSOLETE '\0', "on|off", */ -/* OBSOLETE #if TRAPDUMP */ -/* OBSOLETE "Traps 0..30 dump out all of the registers (defaults on)", */ -/* OBSOLETE #else */ -/* OBSOLETE "Traps 0..30 dump out all of the registers", */ -/* OBSOLETE #endif */ -/* OBSOLETE d30v_option_handler }, */ -/* OBSOLETE { {"extmem-size", required_argument, NULL, OPTION_EXTMEM_SIZE}, */ -/* OBSOLETE '\0', "size", "Change size of external memory, default 8 meg", */ -/* OBSOLETE d30v_option_handler }, */ -/* OBSOLETE { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL } */ -/* OBSOLETE }; */ -/* OBSOLETE */ -/* OBSOLETE /* Return name of an insn, used by insn profiling. */ */ -/* OBSOLETE */ -/* OBSOLETE static const char * */ -/* OBSOLETE get_insn_name (sim_cpu *cpu, int i) */ -/* OBSOLETE { */ -/* OBSOLETE return itable[i].name; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* Structures used by the simulator, for gdb just have static structures */ */ -/* OBSOLETE */ -/* OBSOLETE SIM_DESC */ -/* OBSOLETE sim_open (SIM_OPEN_KIND kind, */ -/* OBSOLETE host_callback *callback, */ -/* OBSOLETE struct _bfd *abfd, */ -/* OBSOLETE char **argv) */ -/* OBSOLETE { */ -/* OBSOLETE SIM_DESC sd = sim_state_alloc (kind, callback); */ -/* OBSOLETE */ -/* OBSOLETE /* FIXME: watchpoints code shouldn't need this */ */ -/* OBSOLETE STATE_WATCHPOINTS (sd)->pc = &(PC); */ -/* OBSOLETE STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); */ -/* OBSOLETE STATE_WATCHPOINTS (sd)->interrupt_handler = d30v_interrupt_event; */ -/* OBSOLETE */ -/* OBSOLETE /* Initialize the mechanism for doing insn profiling. */ */ -/* OBSOLETE CPU_INSN_NAME (STATE_CPU (sd, 0)) = get_insn_name; */ -/* OBSOLETE CPU_MAX_INSNS (STATE_CPU (sd, 0)) = nr_itable_entries; */ -/* OBSOLETE */ -/* OBSOLETE #ifdef TRAPDUMP */ -/* OBSOLETE TRACE_TRAP_P = TRAPDUMP; */ -/* OBSOLETE #endif */ -/* OBSOLETE */ -/* OBSOLETE if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) */ -/* OBSOLETE return 0; */ -/* OBSOLETE sim_add_option_table (sd, NULL, d30v_options); */ -/* OBSOLETE */ -/* OBSOLETE /* Memory and EEPROM */ */ -/* OBSOLETE /* internal instruction RAM - fixed */ */ -/* OBSOLETE sim_do_commandf (sd, "memory region 0,0x10000"); */ -/* OBSOLETE /* internal data RAM - fixed */ */ -/* OBSOLETE sim_do_commandf (sd, "memory region 0x20000000,0x8000"); */ -/* OBSOLETE /* control register dummy area */ */ -/* OBSOLETE sim_do_commandf (sd, "memory region 0x40000000,0x10000"); */ -/* OBSOLETE /* external RAM */ */ -/* OBSOLETE sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size); */ -/* OBSOLETE /* EIT RAM */ */ -/* OBSOLETE sim_do_commandf (sd, "memory region 0xfffff000,0x1000"); */ -/* OBSOLETE */ -/* OBSOLETE /* getopt will print the error message so we just have to exit if this fails. */ -/* OBSOLETE FIXME: Hmmm... in the case of gdb we need getopt to call */ -/* OBSOLETE print_filtered. */ */ -/* OBSOLETE if (sim_parse_args (sd, argv) != SIM_RC_OK) */ -/* OBSOLETE { */ -/* OBSOLETE /* Uninstall the modules to avoid memory leaks, */ -/* OBSOLETE file descriptor leaks, etc. */ */ -/* OBSOLETE sim_module_uninstall (sd); */ -/* OBSOLETE return 0; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* check for/establish the a reference program image */ */ -/* OBSOLETE if (sim_analyze_program (sd, */ -/* OBSOLETE (STATE_PROG_ARGV (sd) != NULL */ -/* OBSOLETE ? *STATE_PROG_ARGV (sd) */ -/* OBSOLETE : NULL), */ -/* OBSOLETE abfd) != SIM_RC_OK) */ -/* OBSOLETE { */ -/* OBSOLETE sim_module_uninstall (sd); */ -/* OBSOLETE return 0; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* establish any remaining configuration options */ */ -/* OBSOLETE if (sim_config (sd) != SIM_RC_OK) */ -/* OBSOLETE { */ -/* OBSOLETE sim_module_uninstall (sd); */ -/* OBSOLETE return 0; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE if (sim_post_argv_init (sd) != SIM_RC_OK) */ -/* OBSOLETE { */ -/* OBSOLETE /* Uninstall the modules to avoid memory leaks, */ -/* OBSOLETE file descriptor leaks, etc. */ */ -/* OBSOLETE sim_module_uninstall (sd); */ -/* OBSOLETE return 0; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE return sd; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE void */ -/* OBSOLETE sim_close (SIM_DESC sd, int quitting) */ -/* OBSOLETE { */ -/* OBSOLETE /* Uninstall the modules to avoid memory leaks, */ -/* OBSOLETE file descriptor leaks, etc. */ */ -/* OBSOLETE sim_module_uninstall (sd); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE SIM_RC */ -/* OBSOLETE sim_create_inferior (SIM_DESC sd, */ -/* OBSOLETE struct _bfd *abfd, */ -/* OBSOLETE char **argv, */ -/* OBSOLETE char **envp) */ -/* OBSOLETE { */ -/* OBSOLETE /* clear all registers */ */ -/* OBSOLETE memset (&STATE_CPU (sd, 0)->regs, 0, sizeof (STATE_CPU (sd, 0)->regs)); */ -/* OBSOLETE EIT_VB = EIT_VB_DEFAULT; */ -/* OBSOLETE STATE_CPU (sd, 0)->unit = any_unit; */ -/* OBSOLETE sim_module_init (sd); */ -/* OBSOLETE if (abfd != NULL) */ -/* OBSOLETE PC = bfd_get_start_address (abfd); */ -/* OBSOLETE else */ -/* OBSOLETE PC = 0xfffff000; /* reset value */ */ -/* OBSOLETE return SIM_RC_OK; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE void */ -/* OBSOLETE sim_do_command (SIM_DESC sd, char *cmd) */ -/* OBSOLETE { */ -/* OBSOLETE if (sim_args_command (sd, cmd) != SIM_RC_OK) */ -/* OBSOLETE sim_io_printf (sd, "Unknown command `%s'\n", cmd); */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE /* The following register definitions were ripped off from */ -/* OBSOLETE gdb/config/tm-d30v.h. If any of those defs changes, this table needs to */ -/* OBSOLETE be updated. */ */ -/* OBSOLETE */ -/* OBSOLETE #define NUM_REGS 86 */ -/* OBSOLETE */ -/* OBSOLETE #define R0_REGNUM 0 */ -/* OBSOLETE #define FP_REGNUM 11 */ -/* OBSOLETE #define LR_REGNUM 62 */ -/* OBSOLETE #define SP_REGNUM 63 */ -/* OBSOLETE #define SPI_REGNUM 64 /* Interrupt stack pointer */ */ -/* OBSOLETE #define SPU_REGNUM 65 /* User stack pointer */ */ -/* OBSOLETE #define CREGS_START 66 */ -/* OBSOLETE */ -/* OBSOLETE #define PSW_REGNUM (CREGS_START + 0) /* psw, bpsw, or dpsw??? */ */ -/* OBSOLETE #define PSW_SM 0x80000000 /* Stack mode: 0 == interrupt (SPI), */ -/* OBSOLETE 1 == user (SPU) */ */ -/* OBSOLETE #define BPSW_REGNUM (CREGS_START + 1) /* Backup PSW (on interrupt) */ */ -/* OBSOLETE #define PC_REGNUM (CREGS_START + 2) /* pc, bpc, or dpc??? */ */ -/* OBSOLETE #define BPC_REGNUM (CREGS_START + 3) /* Backup PC (on interrupt) */ */ -/* OBSOLETE #define DPSW_REGNUM (CREGS_START + 4) /* Backup PSW (on debug trap) */ */ -/* OBSOLETE #define DPC_REGNUM (CREGS_START + 5) /* Backup PC (on debug trap) */ */ -/* OBSOLETE #define RPT_C_REGNUM (CREGS_START + 7) /* Loop count */ */ -/* OBSOLETE #define RPT_S_REGNUM (CREGS_START + 8) /* Loop start address*/ */ -/* OBSOLETE #define RPT_E_REGNUM (CREGS_START + 9) /* Loop end address */ */ -/* OBSOLETE #define MOD_S_REGNUM (CREGS_START + 10) */ -/* OBSOLETE #define MOD_E_REGNUM (CREGS_START + 11) */ -/* OBSOLETE #define IBA_REGNUM (CREGS_START + 14) /* Instruction break address */ */ -/* OBSOLETE #define EIT_VB_REGNUM (CREGS_START + 15) /* Vector base address */ */ -/* OBSOLETE #define INT_S_REGNUM (CREGS_START + 16) /* Interrupt status */ */ -/* OBSOLETE #define INT_M_REGNUM (CREGS_START + 17) /* Interrupt mask */ */ -/* OBSOLETE #define A0_REGNUM 84 */ -/* OBSOLETE #define A1_REGNUM 85 */ -/* OBSOLETE */ -/* OBSOLETE int */ -/* OBSOLETE sim_fetch_register (sd, regno, buf, length) */ -/* OBSOLETE SIM_DESC sd; */ -/* OBSOLETE int regno; */ -/* OBSOLETE unsigned char *buf; */ -/* OBSOLETE int length; */ -/* OBSOLETE { */ -/* OBSOLETE if (regno < A0_REGNUM) */ -/* OBSOLETE { */ -/* OBSOLETE unsigned32 reg; */ -/* OBSOLETE */ -/* OBSOLETE if (regno <= R0_REGNUM + 63) */ -/* OBSOLETE reg = sd->cpu[0].regs.general_purpose[regno]; */ -/* OBSOLETE else if (regno <= SPU_REGNUM) */ -/* OBSOLETE reg = sd->cpu[0].regs.sp[regno - SPI_REGNUM]; */ -/* OBSOLETE else */ -/* OBSOLETE reg = sd->cpu[0].regs.control[regno - CREGS_START]; */ -/* OBSOLETE */ -/* OBSOLETE buf[0] = reg >> 24; */ -/* OBSOLETE buf[1] = reg >> 16; */ -/* OBSOLETE buf[2] = reg >> 8; */ -/* OBSOLETE buf[3] = reg; */ -/* OBSOLETE } */ -/* OBSOLETE else if (regno < NUM_REGS) */ -/* OBSOLETE { */ -/* OBSOLETE unsigned32 reg; */ -/* OBSOLETE */ -/* OBSOLETE reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM] >> 32; */ -/* OBSOLETE */ -/* OBSOLETE buf[0] = reg >> 24; */ -/* OBSOLETE buf[1] = reg >> 16; */ -/* OBSOLETE buf[2] = reg >> 8; */ -/* OBSOLETE buf[3] = reg; */ -/* OBSOLETE */ -/* OBSOLETE reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM]; */ -/* OBSOLETE */ -/* OBSOLETE buf[4] = reg >> 24; */ -/* OBSOLETE buf[5] = reg >> 16; */ -/* OBSOLETE buf[6] = reg >> 8; */ -/* OBSOLETE buf[7] = reg; */ -/* OBSOLETE } */ -/* OBSOLETE else */ -/* OBSOLETE abort (); */ -/* OBSOLETE return -1; */ -/* OBSOLETE } */ -/* OBSOLETE */ -/* OBSOLETE int */ -/* OBSOLETE sim_store_register (sd, regno, buf, length) */ -/* OBSOLETE SIM_DESC sd; */ -/* OBSOLETE int regno; */ -/* OBSOLETE unsigned char *buf; */ -/* OBSOLETE int length; */ -/* OBSOLETE { */ -/* OBSOLETE if (regno < A0_REGNUM) */ -/* OBSOLETE { */ -/* OBSOLETE unsigned32 reg; */ -/* OBSOLETE */ -/* OBSOLETE reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; */ -/* OBSOLETE */ -/* OBSOLETE if (regno <= R0_REGNUM + 63) */ -/* OBSOLETE sd->cpu[0].regs.general_purpose[regno] = reg; */ -/* OBSOLETE else if (regno <= SPU_REGNUM) */ -/* OBSOLETE sd->cpu[0].regs.sp[regno - SPI_REGNUM] = reg; */ -/* OBSOLETE else */ -/* OBSOLETE sd->cpu[0].regs.control[regno - CREGS_START] = reg; */ -/* OBSOLETE } */ -/* OBSOLETE else if (regno < NUM_REGS) */ -/* OBSOLETE { */ -/* OBSOLETE unsigned32 reg; */ -/* OBSOLETE */ -/* OBSOLETE reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; */ -/* OBSOLETE */ -/* OBSOLETE sd->cpu[0].regs.accumulator[regno - A0_REGNUM] = (unsigned64)reg << 32; */ -/* OBSOLETE */ -/* OBSOLETE reg = (buf[4] << 24) | (buf[5] << 16) | (buf[6] << 8) | buf[7]; */ -/* OBSOLETE */ -/* OBSOLETE sd->cpu[0].regs.accumulator[regno - A0_REGNUM] |= reg; */ -/* OBSOLETE } */ -/* OBSOLETE else */ -/* OBSOLETE abort (); */ -/* OBSOLETE return -1; */ -/* OBSOLETE } */ diff --git a/sim/d30v/sim-main.h b/sim/d30v/sim-main.h deleted file mode 100644 index d1764da..0000000 --- a/sim/d30v/sim-main.h +++ /dev/null @@ -1,82 +0,0 @@ -/* OBSOLETE /* This file is part of the program psim. */ -/* OBSOLETE */ -/* OBSOLETE Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> */ -/* OBSOLETE Copyright (C) 1997, 1998, Free Software Foundation */ -/* OBSOLETE */ -/* OBSOLETE This program is free software; you can redistribute it and/or modify */ -/* OBSOLETE it under the terms of the GNU General Public License as published by */ -/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */ -/* OBSOLETE (at your option) any later version. */ -/* OBSOLETE */ -/* OBSOLETE This program is distributed in the hope that it will be useful, */ -/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ -/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ -/* OBSOLETE GNU General Public License for more details. */ -/* OBSOLETE */ -/* OBSOLETE You should have received a copy of the GNU General Public License */ -/* OBSOLETE along with this program; if not, write to the Free Software */ -/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* OBSOLETE */ -/* OBSOLETE */ */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE #ifndef _SIM_MAIN_H_ */ -/* OBSOLETE #define _SIM_MAIN_H_ */ -/* OBSOLETE */ -/* OBSOLETE /* This simulator suports watchpoints */ */ -/* OBSOLETE #define WITH_WATCHPOINTS 1 */ -/* OBSOLETE */ -/* OBSOLETE #include "sim-basics.h" */ -/* OBSOLETE #include "sim-signal.h" */ -/* OBSOLETE */ -/* OBSOLETE /* needed */ */ -/* OBSOLETE typedef address_word sim_cia; */ -/* OBSOLETE #define INVALID_INSTRUCTION_ADDRESS ((address_word) 0 - 1) */ -/* OBSOLETE */ -/* OBSOLETE /* This simulator doesn't cache anything so no saving of context is */ -/* OBSOLETE needed during either of a halt or restart */ */ -/* OBSOLETE #define SIM_ENGINE_HALT_HOOK(SD,CPU,CIA) while (0) */ -/* OBSOLETE #define SIM_ENGINE_RESTART_HOOK(SD,CPU,CIA) while (0) */ -/* OBSOLETE */ -/* OBSOLETE #include "sim-base.h" */ -/* OBSOLETE */ -/* OBSOLETE /* These are generated files. */ */ -/* OBSOLETE #include "itable.h" */ -/* OBSOLETE #include "s_idecode.h" */ -/* OBSOLETE #include "l_idecode.h" */ -/* OBSOLETE */ -/* OBSOLETE #include "cpu.h" */ -/* OBSOLETE #include "alu.h" */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE struct sim_state { */ -/* OBSOLETE */ -/* OBSOLETE sim_event *pending_interrupt; */ -/* OBSOLETE */ -/* OBSOLETE /* the processors proper */ */ -/* OBSOLETE sim_cpu cpu[MAX_NR_PROCESSORS]; */ -/* OBSOLETE #if (WITH_SMP) */ -/* OBSOLETE #define STATE_CPU(sd, n) (&(sd)->cpu[n]) */ -/* OBSOLETE #else */ -/* OBSOLETE #define STATE_CPU(sd, n) (&(sd)->cpu[0]) */ -/* OBSOLETE #endif */ -/* OBSOLETE */ -/* OBSOLETE /* The base class. */ */ -/* OBSOLETE sim_state_base base; */ -/* OBSOLETE */ -/* OBSOLETE }; */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE /* deliver an interrupt */ */ -/* OBSOLETE sim_event_handler d30v_interrupt_event; */ -/* OBSOLETE */ -/* OBSOLETE */ -/* OBSOLETE #ifdef HAVE_STRING_H */ -/* OBSOLETE #include <string.h> */ -/* OBSOLETE #else */ -/* OBSOLETE #ifdef HAVE_STRINGS_H */ -/* OBSOLETE #include <strings.h> */ -/* OBSOLETE #endif */ -/* OBSOLETE #endif */ -/* OBSOLETE */ -/* OBSOLETE #endif /* _SIM_MAIN_H_ */ */ diff --git a/sim/d30v/tconfig.in b/sim/d30v/tconfig.in deleted file mode 100644 index 4efbb91..0000000 --- a/sim/d30v/tconfig.in +++ /dev/null @@ -1,8 +0,0 @@ -/* D30V target configuration file. -*- C -*- */ - -/* Define this to enable the intrinsic breakpoint mechanism. */ -#define SIM_HAVE_BREAKPOINTS - -/* See sim-hload.c. We properly handle LMA. */ -#define SIM_HANDLES_LMA 1 - |