diff options
Diffstat (limited to 'sim/d10v')
| -rw-r--r-- | sim/d10v/.Sanitize | 42 | ||||
| -rw-r--r-- | sim/d10v/ChangeLog | 967 | ||||
| -rw-r--r-- | sim/d10v/Makefile.in | 49 | ||||
| -rw-r--r-- | sim/d10v/acconfig.h | 15 | ||||
| -rw-r--r-- | sim/d10v/config.in | 4 | ||||
| -rwxr-xr-x | sim/d10v/configure | 3712 | ||||
| -rw-r--r-- | sim/d10v/configure.in | 13 | ||||
| -rw-r--r-- | sim/d10v/d10v_sim.h | 244 | ||||
| -rw-r--r-- | sim/d10v/endian.c | 63 | ||||
| -rw-r--r-- | sim/d10v/gencode.c | 146 | ||||
| -rw-r--r-- | sim/d10v/interp.c | 1069 | ||||
| -rw-r--r-- | sim/d10v/simops.c | 3252 |
12 files changed, 0 insertions, 9576 deletions
diff --git a/sim/d10v/.Sanitize b/sim/d10v/.Sanitize deleted file mode 100644 index 409f451..0000000 --- a/sim/d10v/.Sanitize +++ /dev/null @@ -1,42 +0,0 @@ -# .Sanitize for devo/sim/d10v. - -# Each directory to survive its way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this directory. - -Do-first: - -# All files listed between the "Things-to-keep:" line and the -# "Files-to-sed:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -Things-to-keep: - -ChangeLog -Makefile.in -acconfig.h -config.in -configure -configure.in -d10v_sim.h -endian.c -gencode.c -interp.c -simops.c - -Things-to-lose: - -Do-last: - -# End of file. diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog deleted file mode 100644 index d8923c8..0000000 --- a/sim/d10v/ChangeLog +++ /dev/null @@ -1,967 +0,0 @@ -1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com) - - * simops.c (OP_5605): Sign extend MIN32 and MAX32 before saturation - comparison. - (OP_5607): Ditto. - (OP_2A00): Ditto. - (OP_2800): Ditto. - -1999-01-13 Jason Molenda (jsm@bugshack.cygnus.com) - - * simops.c (OP_1223): Sign extend MIN32 and MAX32 before saturation - comparison. - -Tue Nov 24 17:04:43 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (sys/syscall.h): Include targ-vals.h instead. - (SYS_*): Replace with TARGET_SYS_*. - - * Makefile.in: Add dependency on targ-vals.h. - (NL_TARGET): Define as NL_TARGET_d10v. - -Wed Sep 30 00:06:32 1998 Andrew Cagney <cagney@amy.cygnus.com> - - * interp.c (xfer_mem): Missing break, instruction memory case - flowed into unified memory case. - -Wed Sep 30 10:14:18 1998 Nick Clifton <nickc@cygnus.com> - - * simops.c: If load instruction with auto increment/decrement - addressing is used when the destination register is the same as - the address register, then ignore the auto increment/decrement. - -Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Sun Apr 26 15:20:23 1998 Tom Tromey <tromey@cygnus.com> - - * acconfig.h: New file. - * configure.in: Reverted change of Apr 24; use sinclude again. - -Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Fri Apr 24 11:20:06 1998 Tom Tromey <tromey@cygnus.com> - - * configure.in: Don't call sinclude. - -Fri Apr 24 11:04:46 1998 Andrew Cagney <cagney@chook.cygnus.com> - - * interp.c (struct hash_entry): OPCODE and MASK are unsigned. - - * d10v_sim.h (remote-sim.h, sim-config.h): Include. - -Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Apr 1 12:59:17 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (trace_input_func): Use move_from_cr / CREGS to obtain - up-to-date CR value. - (OP_OP_1000000, add3): Trace inputs before performing add. - (OP_5F00, <*>): Trace input registers before making system call. - (OP_5F00, <kill>): Trace R0, R1 not REGn. - (OP_5F00, <getpid>): Always return 47. - - * d10v_sim.h (SLOT, SLOT_NR, SLOT_PEND_MASK, SLOT_PEND, - SLOT_DISCARD, SLOT_FLUSH): Define. An implementation of write - back slots. - (struct _state): Add struct slot slot to global state variable. - (struct _state): Delete fields SM, EA, DB, DM, IE, RP, MD, FX, ST, - F0, F1, C from global State variable. - (struct _state): Add struct trace to global State variable. - (GPR, SET_GPR): Define. SET_GPR uses SLOT_PEND. - (PSW*, SET_PSW*): Define. SET_PSW* uses SET_CREG. - (CREG, SET_CREG, SET_*): Define. SET_CREG uses func move_to_cr. - (INC_ADDR): Re-implement. Use SET_GPR to update registers. - (JMP): Re-implement. Use SET_* to update registers. - - * interp.c: Use new SET_* et.al. macros to fetch / store - registers. - (get_operands): Squirrel away trace values at start of each - operand decode. - (do_2_short): Flush pending writes before issuing second - instruction. - (sim_resume): Flush pending writes at end of instruction cycle. - (sim_fetch_register, sim_store_register, sim_create_inferior): - After scheduling updates to registers using SET_*, flush updates. - (sim_resume): Re-order handling of RPT/repeat and IBA/hbreak so - that each sets pc using SET_* and last SET_* eventually winds out. - - * simops.c: Use new SET_* et.al. macros to fetch / store - registers. - (move_to_cr): Add MASK argument for selective update of CREG bits. - Re-implement using new SET_* macros. - (trace_output_func, trace_output): Delete. Replace with. - (do_trace_output_flush, trace_output_finish, trace_output_40, - trace_output_32, trace_output_16, trace_output_void, - trace_output_flag): New functions. Handle specific trace cases. - (OP_*): Re-write tracing to use new trace_output_* functions. - (OP_*): Re-write to use new SET_* et.al. macros. - (FUNC, PARM[1-4], RETVAL, RETVAL32): Redo definition. - (RETVAL_HIGH, RETVAL_LOW): Delete, use RETVAL32. - -Wed Apr 1 12:55:18 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure.in (SIM_AC_OPTION_WARNINGS): Add. - configure: Re-generate. - -Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Tue Feb 17 12:38:42 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_store_register, sim_fetch_register): Pass in - length parameter. Return -1. - -Mon Oct 27 14:43:33 1997 Fred Fish <fnf@cygnus.com> - - * (dmem_addr): If address is illegal or in I/O space, signal a bus - error. Allocate unified memory on demand. Fix DMEM address - calculations. - -Mon Feb 16 10:27:53 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (OP_5F20): Implement "dbt". - (OP_5F60): Implement "rtd". - - * d10v_sim.h (DPC_CR): Define enum. - (DBT_VECTOR_START): Define - (DPSW, DPC): Define. - -Fri Feb 13 15:15:58 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (move_to_cr): Sync regs[SP_IDX] with State.sp according - to PSW:SM. - - * d10v_sim.h (struct _state): Add sp, as holding area for SPI/SPU. - (SP_IDX): Define. - -Wed Feb 11 16:53:49 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (OP_5F00): Call error instead of abort for unknown - syscalls. - - * d10v_sim.h (enum): Define DPSW_CR. - - * simops.c (move_to_cr): Mask out hardwired zero bits in DPSW. - -Tue Feb 10 18:28:38 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_write_phys): Delete. - (sim_load): Call sim_load_file with sim_write and LMA. - -Mon Feb 9 12:05:01 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c: Rewrite xfer_mem so that it translates addresses as - - 0x00... - DMAP translated memory, 0x01... IMAP translated memory, - 0x10... - on-chip data, 0x11... - on-chip insn, 0x12... - unified - memory. - (pc_addr): Delete. - (imem_addr): New function - translate IMEM address. - (sim_resume): Use imem_addr to translate insn address, abort if - translation failed. - (sim_create_inferior): Write ARGV to memory using sim_write. Pass - argc/argv using r0/r1 not r2/r3. - (sim_size): Do not initialize IMAP/DMAP here. - (sim_open): Call sim_create_inferior and sim_size to initialize - the system. - (sim_create_inferior): Initialize IMAP/DMAP to hardware reset - defaults. - (init_system): Delete. - (xfer_mem, sim_fetch_register, sim_store_register): Do not call - init_system. - (decode_pc): Check prog_bfd is defined before looking up .text - section. - -Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Sun Jan 25 22:23:01 1998 Michael Meissner <meissner@cygnus.com> - - * interp.c (sim_stop_reason): Exit status is now in r0, not r2. - -Sat Jan 24 19:00:30 1998 Michael Meissner <meissner@cygnus.com> - - * d10v_sim.h (DEBUG_TRAP): New debug flag. - - * simops.c (OP_5F00): If DEBUG_TRAP is on, turn traps 0-14 into - printing the registers. - -Thu Jan 22 17:54:01 1998 Michael Meissner <meissner@cygnus.com> - - * simops.c (op_types): New ABI, args are r0..r3, system call # is - in r4. - (trace_{in,out}put_func): Ditto. - (OP_4900): Ditto. - (OP_24800000): Ditto. - (OP_4D00): Ditto. - (OP_5F00): Ditto. - -Thu Jan 22 14:30:36 1998 Fred Fish <fnf@cygnus.com> - - * interp.c (UMEM_SEGMENTS): New define, set to 128. - (sim_size): Use UMEM_SEGMENTS rather than hardwired constant. - (sim_close): Reset prog_bfd to NULL after closing it. Also - reset prog_bfd_was_opened_p after closing prog_bfd. - (sim_load): Reset prog_bfd_was_opened_p after closing prog_bfd. - (sim_create_inferior): Get start address from abfd not prog_bfd. - (xfer_mem): Do bounds checking on addresses and return zero length - read/write on bad addresses, rather than aborting. Prepare to - be able to handle xfers that cross segment boundaries, but not - yet implemented. Only emit debug message when d10v_debug is - set as well as DEBUG being defined. - -Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Tue Dec 9 10:28:31 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d10v_sim.h (RPT_S): Index cregs with RPT_S_CR not RPT_E_CR. - (BPSW): Ditto for BPSW_CR and not PSW_CR. - - * simops.c (OP_5F40): JMP to BPC instead of assigning PC directly. - -Mon Dec 8 12:58:33 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (OP_5F00): From Martin Hunt <hunt@cygnus.com>. Change - reserved trap from 0 to 15. Add trap emulation code for 0-14. - - * interp.c (sim_resume): From Martin Hunt <hunt@cygnus.com>. Check - IBA for SDBT. - - * d10v_sim.h (AE_VECTOR_START, RIE_VECTOR_START, - SDBT_VECTOR_START, TRAP_VECTOR_START): Define. - - * simops.c (OP_5F00): For "trap", mask out all but SM bit in PSW, - use move_to_cr. - (OP_5F00): For "trap", update BPSW with move_to_cr. - -Fri Dec 5 15:31:17 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d10v_sim.h (enum): Enumerate CR register names. - (enum): Enumerate PSW bit values. - (PSW): Obtain value uing move_from_cr. - (MOD_S, MOD_E, BPSW): Make r-values. - (move_from_cr, move_to_cr): Declare functions. - - * interp.c (sim_fetch_register, sim_store_register): Use - move_from_cr and move_to_cr for CR register transfers. - - * simops.c (move_from_cr, move_to_cr): New functions. - (OP_5F40): Move BPSW to PSW using move_to_cr and move_from_cr. - (OP_5600): For "mvtc", use function move_to_cr. - (OP_5200): For "mvfc", use function move_from_cr. - -Fri Dec 5 13:33:14 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (OP_5600): For "mvtc" MOD_E and MOD_S, ensure that the - LSbit is zero. - -Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Thu Dec 4 16:51:02 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d10v_sim.h (struct _state): Add DM - PSW debug mask. - - * simops.c (OP_5600): For "mvtc", save PSW.DM. - (OP_5200): Ditto for "mvfc". - -Wed Dec 3 17:27:06 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d10v_sim.h (SEXT56): Define. - - * simops.c (OP_4201): For "rac", sign extend 56 bit value before - it is shifted. - - * d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using - SIGNED64 macro. - -Tue Dec 2 15:38:34 1997 Fred Fish <fnf@cygnus.com> - - * interp.c (sim_resume): Call do_2_short with LEFT_FIRST or - RIGHT_FIRST, as appropriate, instead of hardcoded ints that - don't match enum values. - -Tue Dec 2 15:01:08 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (OP_3A00): For "macu", perform multiply stage using 32 - bit rather than 16 bit precision. - (OP_3C00): For "mulxu", store unsigned product in ACC. - (OP_3800): For "msbu", subtract unsigned product from ACC, - (OP_0): For "sub", compute carry by comparing inputs. - -Tue Dec 2 11:04:37 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (OP_1000): For "sub2w", compute carry by comparing - inputs. - -Mon Nov 17 20:57:21 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (OP_1): Use 32 bit unsigned arithmetic for subtract, - carry indicated by value > 0xffff. - -Fri Nov 14 12:51:20 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_resume): Don't set up SIGINT handler using signal, - handled by client. - (sim_resume): Fix race condition of a direct assignment to - stop_simulator, conditionally call sim_stop. - (sim_stop_reason): Check stop_simulator returning SIGINT. Clear - stop_simulator ready for next sim_resume call. - (sim_ctrl_c): Delete function. - -Thu Nov 13 19:29:34 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_resume): For "REP", only check/update the PC when - a branch instruction has not been executed. - -Mon Nov 10 17:50:18 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign - extend bit 44 all constants. - (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro. - -Fri Oct 24 10:26:29 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * d10v_sim.h: Include sim-types.h. - (uint8, in816, uiny16, int32, uint32, int64, uint64): Typedef - using unsigned8 et.al. from sim-types.h. - (SEXT32, SEXT40, SEXT44, SEXT60): Replace GCC specific 0x..LL with - SIGNED64 macro. - -Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_write_phys): New function, write to physical - instead of virtual memory. - - * interp.c (sim_load): Pass lma_p and sim_write_phys to - sim_load_file. - -Mon Oct 13 10:55:07 1997 Fred Fish <cygnus.com> - - * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move - exception generation code to OP_6E01. - (OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception - generation code. - -Sat Oct 11 09:02:08 1997 Fred Fish <fnf@cygnus.com> - - * simops.c (OP_6401): postdecrement on r15 is OK, remove exception. - (OP_6601): Ditto. - -Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Sat Sep 27 12:51:34 1997 Fred Fish <fnf@cygnus.com> - - * interp.c (pc_addr): Discard upper bit(s) of PC in case - IMAP1 selects unified memory. - * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing - for end condition. - -Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Sep 10 22:30:24 1997 Martin M. Hunt <hunt@cygnus.com> - - * interp.c (sim_resume): Increment PC at end of rep - loop. - - * simops.c (OP_4201): Fix rachi instruction. - -Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Tue Aug 26 10:37:49 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_kill): Delete. - (sim_create_inferior): Add ABFD argument. - (sim_load): Move setting of PC from here. - (sim_create_inferior): To here. - (start_address): Delete variable. - -Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Mon Aug 25 15:39:29 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_open): Add ABFD argument. - -Tue May 20 10:14:45 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_open): Add callback argument. - (sim_set_callbacks): Remove SIM_DESC argument. - -Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Tue Apr 22 10:29:23 1997 Doug Evans <dje@canuck.cygnus.com> - - * interp.c (sim_open): Undo patch to add -E support. - -Fri Apr 18 13:39:01 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * interp.c (sim_stop): New function. - -Thu Apr 17 02:42:00 1997 Doug Evans <dje@canuck.cygnus.com> - - * Makefile.in (SIM_OBJS): Add sim-load.o. - * d10v_sim.h (exec_bfd): Rename to prog_bfd. - * interp.c: #include bfd.h. - (myname, sim_kind, start_address): New static locals. - (prog_bfd_was_opened_p, prog_bfd): New static locals. - (decode_pc): Update to use prog_bfd. - (sim_open): Set sim_kind, myname. Ignore -E arg. - (sim_close): Close prog_bfd if simulator opened it. - (sim_create_inferior): Return SIM_RC. Delete arg start_address. - (sim_load): Return SIM_RC. New arg abfd. Set start address from bfd. - Call sim_load_file to load file into simulator. - * simops.c (trace_input_func): exec_bfd renamed to prog_bfd. - -Wed Apr 16 16:12:03 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * simops.c (OP_5F00): Only provide system calls SYS_execv, - SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host. - -Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> - - * interp.c (sim_open): New arg `kind'. - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * configure: Re-generate. - -Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> - - * configure: Regenerate to track ../common/aclocal.m4 changes. - - * simops.c (OP_5F00): Remove old traps 1-3. Make trap 15 the same - as trap 0, which will be deprecated. Only set errno, if an error - in fact was returned. - -Thu Mar 13 12:41:20 1997 Doug Evans <dje@canuck.cygnus.com> - - * interp.c: Delete redundant prototypes of sim_foo fns. - (sim_open): New SIM_DESC result. Argument is now in argv form. - (other sim_*): New SIM_DESC argument. - -Thu Mar 13 10:29:04 1997 Michael Meissner <meissner@cygnus.com> - - * simops.c (trace_{input,output}_func): Call flush_stdout from the - callback functions. - (OP_5F00): Ditto. - (OP_6{4,6,C,A}01): Test for post decrement on the stack pointer. - (OP_{1200,1000000,201,5FE0,1003,17001002}): Fix problems in - setting the carry bit after an add or a subtract. - -Wed Feb 12 16:04:15 1997 Michael Meissner <meissner@cygnus.com> - - * simops.c (OP_{1403,15002A02,3{0,4}0{0,1}}): Only use the bottom - 40 bits of accumulators. Sign/zero extend as appropriate. - -Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> - - * Makefile.in (@COMMON_MAKEFILE_FRAG): Use - COMMON_{PRE,POST}_CONFIG_FRAG instead. - * configure.in: sinclude ../common/aclocal.m4. - * configure: Regenerated. - -Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) - - * configure configure.in Makefile.in: Update to new configure - scheme which is more compatible with WinGDB builds. - * configure.in: Improve comment on how to run autoconf. - * configure: Re-run autoconf to get new ../common/aclocal.m4. - * Makefile.in: Use autoconf substitution to install common - makefile fragment. - -Fri Dec 27 22:54:05 1996 Angela Marie Thomas (angela@cygnus.com) - - * gencode.c: patch to not #include "d10v_sim.h" which - unecessarily includes bfd.h and causes wingdb configure - to fail. - -Mon Dec 16 13:39:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * interp.c (xfer_mem): Change unified memory to 0x0. - -Thu Nov 28 20:42:56 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * simops.c (OP_3E01): Fix tracing information. - (OP_300{0,1}): Do not propigate sign. - -Mon Nov 25 19:47:40 1996 Doug Evans <dje@canuck.cygnus.com> - - * config.in (WORDS_BIGENDIAN): Add. - * configure: Regenerated. - * d10v_sim.h: #include "config.h" - -Sat Nov 23 09:34:50 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * gencode.c (write_opcodes): Eliminate warnings when generated - table.c is compiled. - -Wed Nov 20 19:41:40 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * interp.c (sim_open): Cast result of calloc, and make sure NULL - was not returned. - (dmem_addr): If address is illegal or in I/O space, signal a bus - error. - (pc_addr): Signal bus error, not illegal instruction for bogus - pc. - -Wed Nov 20 01:23:03 1996 Doug Evans <dje@canuck.cygnus.com> - - * Makefile.in: Delete all stuff moved to ../common/Make-common.in. - (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define. - * configure.in: Simplify using macros in ../common/aclocal.m4. - Call AC_CHECK_HEADERS(unistd.h). - * configure: Regenerated. - * config.in: New file. - * interp.c: #include "callback.h". - * simops.c: #include "config.h". #include <unistd.h> if present. - -Fri Nov 8 16:19:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * d10v-sim.h (simops): Add flag is_long. - (State): Add pc_changed. Instructions which update the PC should - use the JMP macro which sets this. - (JMP): New macro. Sets the PC and the pc_changed flag. - - * gencode.c (write_opcodes): Add is_long field. - - * interp.c (lookup_hash): If we blindly apply a short opcode's mask - to a long opcode we could get a false match. Check the opcode size. - (hash): Add a size field to the hash table. - (sim_open): Initialize size field in hash table. - (sim_resume): Change to logic for setting the PC. Used to increment the - PC if it had not been changed. This didn't allow single-instruction loops. - Now checks the flag State.pc_changed. Also now stops when ^C is received. - (dmem_addr): Fix translation of data segments to unified memory. - (sim_ctrl_c): New function. When ^C is received, set stop_simulator flag. - - * simops.c: Changed all branch and jump instructions to use new JMP macro. - (OP_20000000): Corrected trace information to show this is a ldi.l, not - a ldi.s instruction. - -Thu Oct 31 19:13:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * interp.c (sim_fetch_register, sim_store_register): Fix bug where - updating the accumulators was overwriting other parts of the global - State variable. - -Wed Oct 30 17:35:14 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * interp.c (bfd.h) Don't include it here any more. - (text{,_start,_end}): Move here from simops.c and make extern. - (decode_pc): New function to return the PC as an address that the - debugger can use. - (dmem_addr): Print decoded PC in error message. - (pc_addr): Ditto. - - * simops.c (bfd.h) Don't include it here any more. - (text{,_start,_end}): Move to simops.c. - (trace_input_func): Move decoding of PC, and looking up .text - start to decode_pc. - - * d10v_sim.h (bfd.h): Include it here. - (text{,_start,_end}): Add external declarations. - (exec_bfd): Ditto. - (decode_pc): Ditto. - -Tue Oct 29 12:13:52 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * interp.c (sim_size): Now allocates unified memory for imap segments - 0,1,2, and 127. Initializes imap0 and imap1 to 0x1000. Initializes dmap to 0. - (sim_write): Just call xfer_mem(). - (sim_read): Just call xfer_mem(). - (xfer_mem): New function. Does appropriate memory mapping and copies bytes. - (dmem_addr): New function. Reads dmap register and translates data - addresses to local addresses. - (pc_addr): New function. Reads imap register and computes local address - corresponding to contents of the PC. - (sim_resume): Change to use pc_addr(). - (sim_create_inferior): Change reinitialization code. Also reinitializes - imap[01] and dmap. - (sim_fetch_register): Add fake registers 32,33,34 for imap0, imap1, and dmap. - (sim_store_register): Add fake registers 32,33,34 for imap0, imap1, and dmap. - - * simops.c (MEMPTR): Redefine to use dmem_addr(). - (OP_5F00): Replace references to STate.imem with dmem_addr(). - - * d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128]. - (RB,SW,RW,SLW,RLW): Redefine to use dmem_addr(). - (IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define. - -Tue Oct 22 15:22:33 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * d10v_sim.h (_ins_type): Reorganize, so that we can provide - better statistics, like not counting NOPS as parallel - instructions, and printing total cycles. - (ins_type_counters): Make unsigned long. - (left_nops,right_nops): Fold into ins_type_counters. - - * simops.c (trace_input_func): Print new instruction types. - Handle OP_R2R3 as input types. - (OP_{38000000,7000}): Correctly sign extend bytes. - (OP_5E00): Don't count NOPs as parallel instructions. - (OP_460B): Remove unused variable. - (OP_5F00): Ditto. - - * interp.c (ins_type_counters): Make unsigned long. - (left_nops,right_nops): Delete. - (most functions): Add prototypes. - (INLINE): If GCC and optimize define as __inline__. - ({,lookup_}hash,get_operands): Declare as INLINE. - (do_parallel): Count conditional operations. - (add_commas): New function, to add commas every 3 digits. - (sim_size): Call add_commas to print numbers. - (sim_{open,resume}): Delete unused variables. - (sim_info): Provide better statistics. - (sim_read): Add int return type. - -Mon Oct 21 16:16:26 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * interp.c (sim_resume): Change the way single-stepping and exceptions - are handled so single-stepping works again. - -Thu Oct 17 12:24:16 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * endian.c: Optimize simulated loads/stores on x86, AIX, and big - endian hosts. - - * configure.in (--enable-sim-bswap): New switch to enable using - the BSWAP instruction on x86's. - * configure: Regenerate. - - * Makefile.in ({SWAP,CONFIG}_CFLAGS): Add --enable-sim-bswap - support. - -Wed Oct 16 13:50:06 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * endian.c: New file. Move endian functions here from interp.c. - Optimize code, and make it work as either inline functions or as a - separate file. - - * interp.c: Move endian functions from here to endian.c. - - * Makefile.in (INCLUDE): Add endian.c. - (run,libsim.a): Add dependency on endian.o. - (endian.o): Add dependency. - - * d10v_sim.h (read/write support): Always go through the machine - independent endian functions. If compiling with GCC and - optimizing, include endian.c so the endian functions are inlined. - - * simops.c (OP_5F00): Correct tracing of accumulators. - -Tue Oct 15 10:57:50 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * simops.c (OP_5F00): Add support for getpid, kill system calls. - - * interp.c (do_{2_short,parallel}): If an exception is raised, - don't execute the second instruction. - -Sat Oct 12 22:17:43 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * simops.c (OP_{31000000,6601,6201,6200}): Store address in a - temporary in case the register is overriden when loading. - (OP_6200): Output type is OP_DREG for tracing. - -Fri Oct 4 23:46:18 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * d10v_sim.h (struct _state): Add mem_{min,max} fields. - - * interp.c (sim_size): Initialize mem_{min,max} fields. - (sim_write): Update mem_{min,max} fields. - (sim_resume): If PC is not in the minimum/maximum memory range, - abort. - (sim_create_inferior): Preserve mem_{min,max} fields. - -Fri Sep 27 13:11:58 1996 Mark Alexander <marka@cygnus.com> - - * simops.c (OP_5F00): Add support for time() system call. - -Wed Sep 25 16:31:41 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * simops.c (OP_{6E01,6A01,6E1F,6A00}): Print both words being - stored if tracing. - (OP_5F00,trace_{in,out}put_func): Add finer grain tracing for - system calls. - -Mon Sep 23 17:55:30 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * simops.c (op_types): Add OP_{CONSTANT8,R2,R3}. - (trace_input_func): Add support for OP_{CONSTANT8,R2,R3}. - (OP_{4900,24800000,4800,4A00,4B00,4D00,4C00}): Add OP_R2 and OP_R3 - to call/subroutine returns to trace the first two arguments and - the return value. For small jumps, use CONSTANT8, not CONSTANT16. - -Fri Sep 20 15:36:45 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * interp.c (sim_create_inferior): Reinitialize State every time - sim_create_inferior() is called. - -Thu Sep 19 21:38:20 1996 Michael Meissner <meissner@wogglebug.ziplink.net> - - * simops.c (OP_{401,2000000,601,3000000,23000000}): Get sign right - on comparisons. - (OP_401): Fix tracing information. - -Thu Sep 19 10:30:22 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * simops.c (SIZE_{PC,LINE_NUMBER}): New default sizes for output. - (trace_input_func): Use them. - (trace_input_func): Make sure there is a trailing space after the - instruction. - (OP_6200): Fix tracing info. - - * Makefile.in (run): Add dependencies on libbfd.a and - libiberity.a. - -Wed Sep 18 09:13:25 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * d10v_sim.h (DEBUG_INSTRUCTION): New debug value to include line - numbers and function names in debug trace. - (DEBUG): If not defined, set to DEBUG_TRACE, DEBUG_VALUES, and - DEBUG_LINE_NUMBER. - (SIG_D10V_{STOP,EXIT}): Values to represent the stop instruction - and exit system call trap being executed. - - * interp.c (sim_stop_reason): Set exit code correctly for stop - instruction and exit system call trap. - - * configure.in (--enable-sim-cflags): Remove trace case. - (--enable-sim-debug): New switch to set the debug values. - * configure: Regenerate. - - * simops.c (trace_{input,output}_func): Rename from - trace_{input,output}. - (trace_{input,output}): Call trace_{input,output}_func if - d10v_debug is non-zero. - (SIZE_INSTRUCTION): Cut down to 8. - (SIZE_OPERANDS): Cut down to 18. - (SIZE_LOCATION): New value for size of line number, function name - field. - (init_text_p,text{,_start,_end}): New static variables for - printing line number and function name. - (exec_bfd): New external that run.c sets. - (trace_input_func): Print line number and function name if - available and if desired. - (OP_4E09): Don't print out DBT message. - (OP_5FE0): Set exception field to SIG_D10V_STOP. - (OP_5F00): Set exception field to SIG_D10V_EXIT. - -Sat Sep 14 22:18:43 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * interp.c (do_2_short): If the instruction encodes jump->ins, - don't do the second instruction if the jump succeeds. - -Fri Sep 13 22:35:19 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * simops.c (OP_5F00): Use unknown traps to print all GPRs, - accumulators, PC, and F0/F1/C flags. - -Thu Sep 12 12:50:11 1996 Mark Alexander <marka@cygnus.com> - - * simops.c (OP_5F00): Fix problems with system calls. - -Thu Sep 12 12:19:28 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * simops.c (OP_5F00): Correct tracing information for trap. - -Wed Sep 11 18:55:50 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * Makefile.in (CSEARCH): Correctly find opcodes directory. - -Mon Sep 9 13:27:26 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * simops.c (trace_output): Properly align accumulator output. - (OP_3{0,2,4}00): Properly parenthesize test expression. Add error - if shift count is too high. - (OP_4E{00,02,04,20,22,40,42}): Make tests agree with book. - (OP_4E09): Make cpfg properly trace the input flags. - (op_types): Add OP_FLAG_OUTPUT. - (trace_{input,output}): Support OP_FLAG_OUTPUT. - (OP_31000000): This ld2w varient is a 16-bit memory reference, not - an 8-bit memory reference instruction for tracing purposes. - (OP_201): Addi needs to set the carry. - -Fri Sep 6 17:56:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * simops.c (OP_2600, OP_2601): Changed min and max comparisons - to use signed register values. - -Wed Sep 4 11:35:17 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * d10v_sim.h (DEBUG_*): Add bit flags for controlling debug - output. - (_ins_type): New enumeration to specify which container an - instruction is in, and whether it is part of a parallel operation. - (_state): Add ins_type field. - ({,u}int{8,16,32,64}): Use limits.h to size the appropriate types. - (ins_type_counters): Counters for the various instruction types. - ({left,right}_nops): Counters for the number of nops in each - container. - (d10v_debug): New variable to indicate whether debugging is turned - on. - - * simops.c: (all functions): Change all #ifdef DEBUG code so that - the input and output values can be traced, along with the - instruction type. Make the -t option enable tracing. - (all functions): Change printf calls to use the printf_filtered - function in the callback table. - - * interp.c (_leftright): New enumeration to say whether 2 short - instructions are done left first or right first. - (do_{long,2_short,parallel}): Indicate in the machine state which - type of instruction this is. Count each of the types of - instructions executed. - (sim_size): Only print the memory sizes if DEBUG_MEMSIZE debug - flag is set. - (sim_resume): Pass left/right indication to do_2_short. - (all functions): Change printf calls to use the printf_filtered - function in the callback table. - (sim_trace): Turn on debug flag if DEBUG was defined, and call - sim_resume. - (sim_info): Print out statistics on instructions. - (sim_{trace,create_inferior}): Eliminate extraneous output unless - debugging. - (sim_open): If args == -t and DEBUG was defined, set d10v_debug. - Only initialize the hash table the first time sim_open is called. - - * Makefile.in: Make objects depend on d10v_sim.h. - ({,SIM_}CFLAGS): Include configure dependent switches. Setting - CFLAGS does not override host/target defines or SIM_CFLAGS. - (CC_FOR_BUILD,gencode): Use CC_FOR_BUILD to compile gencode. - (run): By default, the math library is not needed to be linked - in. - ({BFD,LIBIBERTY}_LIB): Define as variables so they can be - overridden. - (VPATH): Don't set to anything but @srcdir@ to work with non-GNU - makes. - ({run,callback}.o): Provide explicit paths to their appropriate - source directories. - (gencode{,.o},d10v-opc.o): Split compilation into creating object - and linking. Instead of linking in libopcodes.a, just compile - d10v-opc.o directly to handle canadian cross. - (CSEARCH): Add opcodes directory. - - * configure.in (--enable-sim-cflags): New switch to allow user to - set the defaults. - (CC_FOR_BUILD): Deal with canadian crosses. - * configure: Regenerate. - -Wed Sep 04 04:45:34 1996 Mark Alexander <marka@cygnus.com> - - * simops.c: Include correct syscall.h for d10v, not host's. - Fix #ifdef SYS_stat. - -Tue Sep 3 14:00:04 1996 Michael Meissner <meissner@tiktok.cygnus.com> - - * simops.c (OP_5F00): Wrap all SYS_xxx traps with #ifdef. - Add trap 2 to be printf and trap 3 to be putchar. - -Wed Aug 28 21:42:34 1996 Mark Alexander <marka@cygnus.com> - - * Makefile.in, d10v_sim.h, interp.c, simops.c: Add support - for low-level system calls. - -Wed Aug 28 17:33:19 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * Makefile.in, d10v_sim.h, interp.c: Fix byte-order problems. - -Mon Aug 26 18:30:28 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * d10v_sim.h (SEXT32): Added. - * interp.c: Commented out printfs. - * simops.c: Fixed error in sb and st2w. - -Thu Aug 15 13:30:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * Makefile.in, d10v_sim.h, interp.c, simops.c: Added remaining - DSP instructions. Added modulo addressing. - -Sun Aug 11 12:57:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * Makefile.in, d10v_sim.h, interp.c, simops.c: Snapshot. - -Fri Aug 2 17:44:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * d10v_sim.h, simops.c: Snapshot. - -Thu Aug 1 17:05:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com> - - * ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h, - gencode.c, interp.c, simops.c: Created. - diff --git a/sim/d10v/Makefile.in b/sim/d10v/Makefile.in deleted file mode 100644 index d471190..0000000 --- a/sim/d10v/Makefile.in +++ /dev/null @@ -1,49 +0,0 @@ -# Makefile template for Configure for the D10v sim library. -# Copyright (C) 1996 Free Software Foundation, Inc. -# Written by Cygnus Support. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -SIM_OBJS = interp.o table.o simops.o endian.o -# FIXME: This is for syscall.h. A new mechanism to build it is in progress. -SIM_EXTRA_CFLAGS = -I$(srcdir)/../../newlib/libc/sys/d10v -SIM_EXTRA_CLEAN = clean-extra - -INCLUDE = d10v_sim.h $(srcroot)/include/callback.h endian.c - -@COMMON_MAKEFILE_FRAG@ - -simops.h: gencode - ./gencode -h >$@ - -table.c: gencode simops.h - ./gencode >$@ - -gencode.o: gencode.c $(INCLUDE) - $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gencode.c - -d10v-opc.o: $(srcdir)/../../opcodes/d10v-opc.c - $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/../../opcodes/d10v-opc.c - -gencode: gencode.o d10v-opc.o - $(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode gencode.o d10v-opc.o $(BUILD_LIB) - -clean-extra: - rm -f table.c simops.h gencode - -interp.o: interp.c table.c $(INCLUDE) -simops.o: simops.c $(INCLUDE) -endian.o: endian.c $(INCLUDE) -table.o: table.c diff --git a/sim/d10v/acconfig.h b/sim/d10v/acconfig.h deleted file mode 100644 index f9b87a1..0000000 --- a/sim/d10v/acconfig.h +++ /dev/null @@ -1,15 +0,0 @@ - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have catgets and don't want to use GNU gettext. */ -#undef HAVE_CATGETS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES diff --git a/sim/d10v/config.in b/sim/d10v/config.in deleted file mode 100644 index 167618a..0000000 --- a/sim/d10v/config.in +++ /dev/null @@ -1,4 +0,0 @@ -/* config.in. Generated automatically from configure.in by autoheader. */ - -/* Define if you have the <unistd.h> header file. */ -#undef HAVE_UNISTD_H diff --git a/sim/d10v/configure b/sim/d10v/configure deleted file mode 100755 index afd3b77..0000000 --- a/sim/d10v/configure +++ /dev/null @@ -1,3712 +0,0 @@ -#! /bin/sh - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -sim_inline="-DDEFAULT_INLINE=0" - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -# This file is derived from `gettext.m4'. The difference is that the -# included macros assume Cygnus-style source and build trees. - -# Macro to add for using GNU gettext. -# Ulrich Drepper <drepper@cygnus.com>, 1995. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 3 - - - - - -# Search path for a program which passes the given test. -# Ulrich Drepper <drepper@cygnus.com>, 1996. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 1 - - - -# Check whether LC_MESSAGES is available in <locale.h>. -# Ulrich Drepper <drepper@cygnus.com>, 1995. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 1 - - - - -# Guess values for system-dependent variables and create Makefiles. -# Generated automatically using autoconf version 2.12.1 -# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc. -# -# This configure script is free software; the Free Software Foundation -# gives unlimited permission to copy, distribute and modify it. - -# Defaults: -ac_help= -ac_default_prefix=/usr/local -# Any additions from configure.in: -ac_help="$ac_help - --disable-nls do not use Native Language Support" -ac_help="$ac_help - --with-included-gettext use the GNU gettext library included here" -ac_help="$ac_help - --enable-maintainer-mode Enable developer functionality." -ac_help="$ac_help - --enable-sim-bswap Use Host specific BSWAP instruction." -ac_help="$ac_help - --enable-sim-cflags=opts Extra CFLAGS for use in building simulator" -ac_help="$ac_help - --enable-sim-debug=opts Enable debugging flags" -ac_help="$ac_help - --enable-sim-stdio Specify whether to use stdio for console input/output." -ac_help="$ac_help - --enable-sim-trace=opts Enable tracing flags" -ac_help="$ac_help - --enable-sim-profile=opts Enable profiling flags" -ac_help="$ac_help - --enable-sim-warnings=opts Extra CFLAGS for turning on compiler warnings" - -# Initialize some variables set by options. -# The variables have the same names as the options, with -# dashes changed to underlines. -build=NONE -cache_file=./config.cache -exec_prefix=NONE -host=NONE -no_create= -nonopt=NONE -no_recursion= -prefix=NONE -program_prefix=NONE -program_suffix=NONE -program_transform_name=s,x,x, -silent= -site= -srcdir= -target=NONE -verbose= -x_includes=NONE -x_libraries=NONE -bindir='${exec_prefix}/bin' -sbindir='${exec_prefix}/sbin' -libexecdir='${exec_prefix}/libexec' -datadir='${prefix}/share' -sysconfdir='${prefix}/etc' -sharedstatedir='${prefix}/com' -localstatedir='${prefix}/var' -libdir='${exec_prefix}/lib' -includedir='${prefix}/include' -oldincludedir='/usr/include' -infodir='${prefix}/info' -mandir='${prefix}/man' - -# Initialize some other variables. -subdirs= -MFLAGS= MAKEFLAGS= -SHELL=${CONFIG_SHELL-/bin/sh} -# Maximum number of lines to put in a shell here document. -ac_max_here_lines=12 - -ac_prev= -for ac_option -do - - # If the previous option needs an argument, assign it. - if test -n "$ac_prev"; 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- -#include "sim-types.h" -typedef unsigned8 uint8; -typedef unsigned16 uint16; -typedef signed16 int16; -typedef unsigned32 uint32; -typedef signed32 int32; -typedef unsigned64 uint64; -typedef signed64 int64; - -/* FIXME: D10V defines */ -typedef uint16 reg_t; - -struct simops -{ - long opcode; - int is_long; - long mask; - int format; - int cycles; - int unit; - int exec_type; - void (*func)(); - int numops; - int operands[9]; -}; - -enum _ins_type -{ - INS_UNKNOWN, /* unknown instruction */ - INS_COND_TRUE, /* # times EXExxx executed other instruction */ - INS_COND_FALSE, /* # times EXExxx did not execute other instruction */ - INS_COND_JUMP, /* # times JUMP skipped other instruction */ - INS_CYCLES, /* # cycles */ - INS_LONG, /* long instruction (both containers, ie FM == 11) */ - INS_LEFTRIGHT, /* # times instruction encoded as L -> R (ie, FM == 01) */ - INS_RIGHTLEFT, /* # times instruction encoded as L <- R (ie, FM == 10) */ - INS_PARALLEL, /* # times instruction encoded as L || R (ie, RM == 00) */ - - INS_LEFT, /* normal left instructions */ - INS_LEFT_PARALLEL, /* left side of || */ - INS_LEFT_COND_TEST, /* EXExx test on left side */ - INS_LEFT_COND_EXE, /* execution after EXExxx test on right side succeeded */ - INS_LEFT_NOPS, /* NOP on left side */ - - INS_RIGHT, /* normal right instructions */ - INS_RIGHT_PARALLEL, /* right side of || */ - INS_RIGHT_COND_TEST, /* EXExx test on right side */ - INS_RIGHT_COND_EXE, /* execution after EXExxx test on left side succeeded */ - INS_RIGHT_NOPS, /* NOP on right side */ - - INS_MAX -}; - -extern unsigned long ins_type_counters[ (int)INS_MAX ]; - -enum { - SP_IDX = 15, -}; - -struct _state -{ - reg_t regs[16]; /* general-purpose registers */ - reg_t cregs[16]; /* control registers */ - reg_t sp[2]; /* holding area for SPI(0)/SPU(1) */ - int64 a[2]; /* accumulators */ - uint8 SM; - uint8 EA; - uint8 DB; - uint8 DM; - uint8 IE; - uint8 RP; - uint8 MD; - uint8 FX; - uint8 ST; - uint8 F0; - uint8 F1; - uint8 C; - uint8 exe; - int exception; - int pc_changed; - /* everything below this line is not reset by sim_create_inferior() */ - uint8 *imem; - uint8 *dmem; - uint8 *umem[128]; - enum _ins_type ins_type; -} State; - -extern host_callback *d10v_callback; -extern uint16 OP[4]; -extern struct simops Simops[]; -extern asection *text; -extern bfd_vma text_start; -extern bfd_vma text_end; -extern bfd *prog_bfd; - -enum -{ - PSW_CR = 0, - BPSW_CR = 1, - PC_CR = 2, - BPC_CR = 3, - DPSW_CR = 4, - RPT_C_CR = 7, - RPT_S_CR = 8, - RPT_E_CR = 9, - MOD_S_CR = 10, - MOD_E_CR = 11, - IBA_CR = 14, -}; - -enum -{ - PSW_SM_BIT = 0x8000, - PSW_EA_BIT = 0x2000, - PSW_DB_BIT = 0x1000, - PSW_DM_BIT = 0x0800, - PSW_IE_BIT = 0x0400, - PSW_RP_BIT = 0x0200, - PSW_MD_BIT = 0x0100, - PSW_FX_BIT = 0x0080, - PSW_ST_BIT = 0x0040, - PSW_F0_BIT = 0x0008, - PSW_F1_BIT = 0x0004, - PSW_C_BIT = 0x0001, -}; - -/* See simopsc.:move_to_cr() for registers that can not be read-from - or assigned-to directly */ -#define PC (State.cregs[PC_CR]) -#define PSW (move_from_cr (PSW_CR)) -#define BPSW (0 + State.cregs[BPSW_CR]) -#define BPC (State.cregs[BPC_CR]) -#define RPT_C (State.cregs[RPT_C_CR]) -#define RPT_S (State.cregs[RPT_S_CR]) -#define RPT_E (State.cregs[RPT_E_CR]) -#define MOD_S (0 + State.cregs[MOD_S_CR]) -#define MOD_E (0 + State.cregs[MOD_E_CR]) -#define IBA (State.cregs[IBA_CR]) - -#define SIG_D10V_STOP -1 -#define SIG_D10V_EXIT -2 - -#define SEXT3(x) ((((x)&0x7)^(~3))+4) - -/* sign-extend a 4-bit number */ -#define SEXT4(x) ((((x)&0xf)^(~7))+8) - -/* sign-extend an 8-bit number */ -#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80) - -/* sign-extend a 16-bit number */ -#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000) - -/* sign-extend a 32-bit number */ -#define SEXT32(x) ((((x)&SIGNED64(0xffffffff))^(~SIGNED64(0x7fffffff)))+SIGNED64(0x80000000)) - -/* sign extend a 40 bit number */ -#define SEXT40(x) ((((x)&SIGNED64(0xffffffffff))^(~SIGNED64(0x7fffffffff)))+SIGNED64(0x8000000000)) - -/* sign extend a 44 bit number */ -#define SEXT44(x) ((((x)&SIGNED64(0xfffffffffff))^(~SIGNED64(0x7ffffffffff)))+SIGNED64(0x80000000000)) - -/* sign extend a 56 bit number */ -#define SEXT56(x) ((((x)&SIGNED64(0xffffffffffffff))^(~SIGNED64(0x7fffffffffffff)))+SIGNED64(0x80000000000000)) - -/* sign extend a 60 bit number */ -#define SEXT60(x) ((((x)&SIGNED64(0xfffffffffffffff))^(~SIGNED64(0x7ffffffffffffff)))+SIGNED64(0x800000000000000)) - -#define MAX32 SIGNED64(0x7fffffff) -#define MIN32 SIGNED64(0xff80000000) -#define MASK32 SIGNED64(0xffffffff) -#define MASK40 SIGNED64(0xffffffffff) - -/* The alignment of MOD_E in the following macro depends upon "i" always being a power of 2. */ -#define INC_ADDR(x,i) x = ((State.MD && x == (MOD_E & ~((i)-1))) ? MOD_S : (x)+(i)) - -extern uint8 *dmem_addr PARAMS ((uint32)); -extern uint8 *imem_addr PARAMS ((uint32)); -extern bfd_vma decode_pc PARAMS ((void)); - -#define RB(x) (*(dmem_addr(x))) -#define SB(addr,data) ( RB(addr) = (data & 0xff)) - -#if defined(__GNUC__) && defined(__OPTIMIZE__) && !defined(NO_ENDIAN_INLINE) -#define ENDIAN_INLINE static __inline__ -#include "endian.c" -#undef ENDIAN_INLINE - -#else -extern uint32 get_longword PARAMS ((uint8 *)); -extern uint16 get_word PARAMS ((uint8 *)); -extern int64 get_longlong PARAMS ((uint8 *)); -extern void write_word PARAMS ((uint8 *addr, uint16 data)); -extern void write_longword PARAMS ((uint8 *addr, uint32 data)); -extern void write_longlong PARAMS ((uint8 *addr, int64 data)); -#endif - -#define SW(addr,data) write_word(dmem_addr(addr),data) -#define RW(x) get_word(dmem_addr(x)) -#define SLW(addr,data) write_longword(dmem_addr(addr),data) -#define RLW(x) get_longword(dmem_addr(x)) -#define READ_16(x) get_word(x) -#define WRITE_16(addr,data) write_word(addr,data) -#define READ_64(x) get_longlong(x) -#define WRITE_64(addr,data) write_longlong(addr,data) - -#define IMAP0 RW(0xff00) -#define IMAP1 RW(0xff02) -#define DMAP RW(0xff04) -#define SET_IMAP0(x) SW(0xff00,x) -#define SET_IMAP1(x) SW(0xff02,x) -#define SET_DMAP(x) SW(0xff04,x) - -#define JMP(x) { PC = (x); State.pc_changed = 1; } - -#define AE_VECTOR_START 0xffc3 -#define RIE_VECTOR_START 0xffc2 -#define SDBT_VECTOR_START 0xffd5 -#define TRAP_VECTOR_START 0xffc4 /* vector for trap 0 */ - -extern void move_to_cr PARAMS ((int cr, reg_t val)); -extern reg_t move_from_cr PARAMS ((int cr)); diff --git a/sim/d10v/endian.c b/sim/d10v/endian.c deleted file mode 100644 index 929edc9..0000000 --- a/sim/d10v/endian.c +++ /dev/null @@ -1,63 +0,0 @@ -#ifndef ENDIAN_INLINE -#define NO_ENDIAN_INLINE -#include "d10v_sim.h" -#define ENDIAN_INLINE -#endif - -ENDIAN_INLINE uint32 -get_longword (x) - uint8 *x; -{ - return ((uint32)x[0]<<24) + ((uint32)x[1]<<16) + ((uint32)x[2]<<8) + ((uint32)x[3]); -} - -ENDIAN_INLINE int64 -get_longlong (x) - uint8 *x; -{ - uint32 top = ((uint32)x[0]<<24) + ((uint32)x[1]<<16) + ((uint32)x[2]<<8) + ((uint32)x[3]); - uint32 bottom = ((uint32)x[4]<<24) + ((uint32)x[5]<<16) + ((uint32)x[6]<<8) + ((uint32)x[7]); - return (((int64)top)<<32) | (int64)bottom; -} - -ENDIAN_INLINE uint16 -get_word (x) - uint8 *x; -{ - return ((uint16)x[0]<<8) + x[1]; -} - -ENDIAN_INLINE void -write_word (addr, data) - uint8 *addr; - uint16 data; -{ - addr[0] = (data >> 8) & 0xff; - addr[1] = data & 0xff; -} - -ENDIAN_INLINE void -write_longword (addr, data) - uint8 *addr; - uint32 data; -{ - addr[0] = (data >> 24) & 0xff; - addr[1] = (data >> 16) & 0xff; - addr[2] = (data >> 8) & 0xff; - addr[3] = data & 0xff; -} - -ENDIAN_INLINE void -write_longlong (addr, data) - uint8 *addr; - int64 data; -{ - addr[0] = data >> 56; - addr[1] = (data >> 48) & 0xff; - addr[2] = (data >> 40) & 0xff; - addr[3] = (data >> 32) & 0xff; - addr[4] = (data >> 24) & 0xff; - addr[5] = (data >> 16) & 0xff; - addr[6] = (data >> 8) & 0xff; - addr[7] = data & 0xff; -} diff --git a/sim/d10v/gencode.c b/sim/d10v/gencode.c deleted file mode 100644 index 71e92e8..0000000 --- a/sim/d10v/gencode.c +++ /dev/null @@ -1,146 +0,0 @@ -#include "d10v_sim.h" - -static void write_header PARAMS ((void)); -static void write_opcodes PARAMS ((void)); -static void write_template PARAMS ((void)); - -int -main (argc, argv) - int argc; - char *argv[]; -{ - if ((argc > 1) && (strcmp (argv[1],"-h") == 0)) - write_header(); - else if ((argc > 1) && (strcmp (argv[1],"-t") == 0)) - write_template (); - else - write_opcodes(); - return 0; -} - - -static void -write_header () -{ - struct d10v_opcode *opcode; - - for (opcode = (struct d10v_opcode *)d10v_opcodes; opcode->name; opcode++) - if (opcode->format != OPCODE_FAKE) - printf("void OP_%X PARAMS ((void));\t\t/* %s */\n",opcode->opcode, opcode->name); -} - - -/* write_template creates a file all required functions, ready */ -/* to be filled out */ - -static void -write_template () -{ - struct d10v_opcode *opcode; - int i,j; - - printf ("#include \"d10v_sim.h\"\n"); - printf ("#include \"simops.h\"\n"); - - for (opcode = (struct d10v_opcode *)d10v_opcodes; opcode->name; opcode++) - { - if (opcode->format != OPCODE_FAKE) - { - printf("/* %s */\nvoid\nOP_%X ()\n{\n",opcode->name,opcode->opcode); - - /* count operands */ - j = 0; - for (i=0;i<6;i++) - { - int flags = d10v_operands[opcode->operands[i]].flags; - if ((flags & OPERAND_REG) || (flags & OPERAND_NUM) || (flags & OPERAND_ADDR)) - j++; - } - switch (j) - { - case 0: - printf ("printf(\" %s\\n\");\n",opcode->name); - break; - case 1: - printf ("printf(\" %s\\t%%x\\n\",OP[0]);\n",opcode->name); - break; - case 2: - printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",opcode->name); - break; - case 3: - printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",opcode->name); - break; - default: - fprintf (stderr,"Too many operands: %d\n",j); - } - printf ("}\n\n"); - } - } -} - - -long Opcodes[512]; -static int curop=0; - -check_opcodes( long op) -{ - int i; - - for (i=0;i<curop;i++) - if (Opcodes[i] == op) - fprintf(stderr,"DUPLICATE OPCODES: %x\n",op); -} - - -static void -write_opcodes () -{ - struct d10v_opcode *opcode; - int i, j; - - /* write out opcode table */ - printf ("#include \"d10v_sim.h\"\n"); - printf ("#include \"simops.h\"\n\n"); - printf ("struct simops Simops[] = {\n"); - - for (opcode = (struct d10v_opcode *)d10v_opcodes; opcode->name; opcode++) - { - if (opcode->format != OPCODE_FAKE) - { - printf (" { %ld,%d,%ld,%d,%d,%d,%d,OP_%X,", opcode->opcode, - (opcode->format & LONG_OPCODE) ? 1 : 0, opcode->mask, opcode->format, - opcode->cycles, opcode->unit, opcode->exec_type, opcode->opcode); - - /* REMOVE ME */ - check_opcodes (opcode->opcode); - Opcodes[curop++] = opcode->opcode; - - j = 0; - for (i=0;i<6;i++) - { - int flags = d10v_operands[opcode->operands[i]].flags; - if ((flags & OPERAND_REG) || (flags & OPERAND_NUM) || (flags & OPERAND_ADDR)) - j++; - } - printf ("%d,{",j); - - j = 0; - for (i=0;i<6;i++) - { - int flags = d10v_operands[opcode->operands[i]].flags; - int shift = d10v_operands[opcode->operands[i]].shift; - if ((flags & OPERAND_REG) || (flags & OPERAND_NUM)|| (flags & OPERAND_ADDR)) - { - if (j) - printf (", "); - if ((flags & OPERAND_REG) && (opcode->format == LONG_L)) - shift += 15; - printf ("%d,%d,%d",shift,d10v_operands[opcode->operands[i]].bits,flags); - j = 1; - } - } - printf ("}},\n"); - } - } - printf ("{ 0,0,0,0,0,0,NULL,0,{ }},\n};\n"); -} diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c deleted file mode 100644 index ad6e920..0000000 --- a/sim/d10v/interp.c +++ /dev/null @@ -1,1069 +0,0 @@ -#include <signal.h> -#include "sysdep.h" -#include "bfd.h" -#include "callback.h" -#include "remote-sim.h" - -#include "d10v_sim.h" - -#define IMEM_SIZE 18 /* D10V instruction memory size is 18 bits */ -#define DMEM_SIZE 16 /* Data memory is 64K (but only 32K internal RAM) */ -#define UMEM_SIZE 17 /* Each unified memory segment is 17 bits */ -#define UMEM_SEGMENTS 128 /* Number of segments in unified memory region */ - -enum _leftright { LEFT_FIRST, RIGHT_FIRST }; - -static char *myname; -static SIM_OPEN_KIND sim_kind; -int d10v_debug; -host_callback *d10v_callback; -unsigned long ins_type_counters[ (int)INS_MAX ]; - -uint16 OP[4]; - -static int init_text_p = 0; -/* non-zero if we opened prog_bfd */ -static int prog_bfd_was_opened_p; -bfd *prog_bfd; -asection *text; -bfd_vma text_start; -bfd_vma text_end; - -static long hash PARAMS ((long insn, int format)); -static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size)); -static void get_operands PARAMS ((struct simops *s, uint32 ins)); -static void do_long PARAMS ((uint32 ins)); -static void do_2_short PARAMS ((uint16 ins1, uint16 ins2, enum _leftright leftright)); -static void do_parallel PARAMS ((uint16 ins1, uint16 ins2)); -static char *add_commas PARAMS ((char *buf, int sizeof_buf, unsigned long value)); -extern void sim_set_profile PARAMS ((int n)); -extern void sim_set_profile_size PARAMS ((int n)); - -#ifndef INLINE -#if defined(__GNUC__) && defined(__OPTIMIZE__) -#define INLINE __inline__ -#else -#define INLINE -#endif -#endif - -#define MAX_HASH 63 -struct hash_entry -{ - struct hash_entry *next; - long opcode; - long mask; - int size; - struct simops *ops; -}; - -struct hash_entry hash_table[MAX_HASH+1]; - -INLINE static long -hash(insn, format) - long insn; - int format; -{ - if (format & LONG_OPCODE) - return ((insn & 0x3F000000) >> 24); - else - return((insn & 0x7E00) >> 9); -} - -INLINE static struct hash_entry * -lookup_hash (ins, size) - uint32 ins; - int size; -{ - struct hash_entry *h; - - if (size) - h = &hash_table[(ins & 0x3F000000) >> 24]; - else - h = &hash_table[(ins & 0x7E00) >> 9]; - - while ((ins & h->mask) != h->opcode || h->size != size) - { - if (h->next == NULL) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR looking up hash for %x at PC %x\n",ins, PC); - exit (1); - } - h = h->next; - } - return (h); -} - -INLINE static void -get_operands (struct simops *s, uint32 ins) -{ - int i, shift, bits, flags; - uint32 mask; - for (i=0; i < s->numops; i++) - { - shift = s->operands[3*i]; - bits = s->operands[3*i+1]; - flags = s->operands[3*i+2]; - mask = 0x7FFFFFFF >> (31 - bits); - OP[i] = (ins >> shift) & mask; - } -} - -bfd_vma -decode_pc () -{ - asection *s; - if (!init_text_p && prog_bfd != NULL) - { - init_text_p = 1; - for (s = prog_bfd->sections; s; s = s->next) - if (strcmp (bfd_get_section_name (prog_bfd, s), ".text") == 0) - { - text = s; - text_start = bfd_get_section_vma (prog_bfd, s); - text_end = text_start + bfd_section_size (prog_bfd, s); - break; - } - } - - return (PC << 2) + text_start; -} - -static void -do_long (ins) - uint32 ins; -{ - struct hash_entry *h; -#ifdef DEBUG - if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - (*d10v_callback->printf_filtered) (d10v_callback, "do_long 0x%x\n", ins); -#endif - h = lookup_hash (ins, 1); - get_operands (h->ops, ins); - State.ins_type = INS_LONG; - ins_type_counters[ (int)State.ins_type ]++; - (h->ops->func)(); -} - -static void -do_2_short (ins1, ins2, leftright) - uint16 ins1, ins2; - enum _leftright leftright; -{ - struct hash_entry *h; - reg_t orig_pc = PC; - enum _ins_type first, second; - -#ifdef DEBUG - if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - (*d10v_callback->printf_filtered) (d10v_callback, "do_2_short 0x%x (%s) -> 0x%x\n", - ins1, (leftright) ? "left" : "right", ins2); -#endif - - if (leftright == LEFT_FIRST) - { - first = INS_LEFT; - second = INS_RIGHT; - ins_type_counters[ (int)INS_LEFTRIGHT ]++; - } - else - { - first = INS_RIGHT; - second = INS_LEFT; - ins_type_counters[ (int)INS_RIGHTLEFT ]++; - } - - h = lookup_hash (ins1, 0); - get_operands (h->ops, ins1); - State.ins_type = first; - ins_type_counters[ (int)State.ins_type ]++; - (h->ops->func)(); - - /* If the PC has changed (ie, a jump), don't do the second instruction */ - if (orig_pc == PC && !State.exception) - { - h = lookup_hash (ins2, 0); - get_operands (h->ops, ins2); - State.ins_type = second; - ins_type_counters[ (int)State.ins_type ]++; - ins_type_counters[ (int)INS_CYCLES ]++; - (h->ops->func)(); - } - else if (orig_pc != PC && !State.exception) - ins_type_counters[ (int)INS_COND_JUMP ]++; -} - -static void -do_parallel (ins1, ins2) - uint16 ins1, ins2; -{ - struct hash_entry *h1, *h2; -#ifdef DEBUG - if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - (*d10v_callback->printf_filtered) (d10v_callback, "do_parallel 0x%x || 0x%x\n", ins1, ins2); -#endif - ins_type_counters[ (int)INS_PARALLEL ]++; - h1 = lookup_hash (ins1, 0); - h2 = lookup_hash (ins2, 0); - - if (h1->ops->exec_type == PARONLY) - { - get_operands (h1->ops, ins1); - State.ins_type = INS_LEFT_COND_TEST; - ins_type_counters[ (int)State.ins_type ]++; - (h1->ops->func)(); - if (State.exe) - { - ins_type_counters[ (int)INS_COND_TRUE ]++; - get_operands (h2->ops, ins2); - State.ins_type = INS_RIGHT_COND_EXE; - ins_type_counters[ (int)State.ins_type ]++; - (h2->ops->func)(); - } - else - ins_type_counters[ (int)INS_COND_FALSE ]++; - } - else if (h2->ops->exec_type == PARONLY) - { - get_operands (h2->ops, ins2); - State.ins_type = INS_RIGHT_COND_TEST; - ins_type_counters[ (int)State.ins_type ]++; - (h2->ops->func)(); - if (State.exe) - { - ins_type_counters[ (int)INS_COND_TRUE ]++; - get_operands (h1->ops, ins1); - State.ins_type = INS_LEFT_COND_EXE; - ins_type_counters[ (int)State.ins_type ]++; - (h1->ops->func)(); - } - else - ins_type_counters[ (int)INS_COND_FALSE ]++; - } - else - { - get_operands (h1->ops, ins1); - State.ins_type = INS_LEFT_PARALLEL; - ins_type_counters[ (int)State.ins_type ]++; - (h1->ops->func)(); - if (!State.exception) - { - get_operands (h2->ops, ins2); - State.ins_type = INS_RIGHT_PARALLEL; - ins_type_counters[ (int)State.ins_type ]++; - (h2->ops->func)(); - } - } -} - -static char * -add_commas(buf, sizeof_buf, value) - char *buf; - int sizeof_buf; - unsigned long value; -{ - int comma = 3; - char *endbuf = buf + sizeof_buf - 1; - - *--endbuf = '\0'; - do { - if (comma-- == 0) - { - *--endbuf = ','; - comma = 2; - } - - *--endbuf = (value % 10) + '0'; - } while ((value /= 10) != 0); - - return endbuf; -} - -void -sim_size (power) - int power; - -{ - int i; - - if (State.imem) - { - for (i=0;i<UMEM_SEGMENTS;i++) - { - if (State.umem[i]) - { - free (State.umem[i]); - State.umem[i] = NULL; - } - } - free (State.imem); - free (State.dmem); - } - - State.imem = (uint8 *)calloc(1,1<<IMEM_SIZE); - State.dmem = (uint8 *)calloc(1,1<<DMEM_SIZE); - for (i=1;i<(UMEM_SEGMENTS-1);i++) - State.umem[i] = NULL; - State.umem[0] = (uint8 *)calloc(1,1<<UMEM_SIZE); - State.umem[1] = (uint8 *)calloc(1,1<<UMEM_SIZE); - State.umem[2] = (uint8 *)calloc(1,1<<UMEM_SIZE); - State.umem[UMEM_SEGMENTS-1] = (uint8 *)calloc(1,1<<UMEM_SIZE); - if (!State.imem || !State.dmem || !State.umem[0] || !State.umem[1] || !State.umem[2] || !State.umem[UMEM_SEGMENTS-1] ) - { - (*d10v_callback->printf_filtered) (d10v_callback, "Memory allocation failed.\n"); - exit(1); - } - -#ifdef DEBUG - if ((d10v_debug & DEBUG_MEMSIZE) != 0) - { - char buffer[20]; - (*d10v_callback->printf_filtered) (d10v_callback, - "Allocated %s bytes instruction memory and\n", - add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE))); - - (*d10v_callback->printf_filtered) (d10v_callback, " %s bytes data memory.\n", - add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE))); - } -#endif -} - -/* Transfer data to/from simulated memory. Since a bug in either the - simulated program or in gdb or the simulator itself may cause a - bogus address to be passed in, we need to do some sanity checking - on addresses to make sure they are within bounds. When an address - fails the bounds check, treat it as a zero length read/write rather - than aborting the entire run. */ - -static int -xfer_mem (SIM_ADDR addr, - unsigned char *buffer, - int size, - int write_p) -{ - unsigned char *memory; - int segment = ((addr >> 24) & 0xff); - addr = (addr & 0x00ffffff); - -#ifdef DEBUG - if ((d10v_debug & DEBUG_INSTRUCTION) != 0) - { - if (write_p) - { - (*d10v_callback->printf_filtered) (d10v_callback, "sim_write %d bytes to 0x%02x:%06x\n", size, segment, addr); - } - else - { - (*d10v_callback->printf_filtered) (d10v_callback, "sim_read %d bytes from 0x%2x:%6x\n", size, segment, addr); - } - } -#endif - - /* to access data, we use the following mapping - 0x00xxxxxx: Logical data address segment (DMAP translated memory) - 0x01xxxxxx: Logical instruction address segment (IMAP translated memory) - 0x10xxxxxx: Physical data memory segment (On-chip data memory) - 0x11xxxxxx: Physical instruction memory segment (On-chip insn memory) - 0x12xxxxxx: Phisical unified memory segment (Unified memory) - */ - - switch (segment) - { - case 0x00: /* DMAP translated memory */ - { - int byte; - for (byte = 0; byte < size; byte++) - { - uint8 *mem = dmem_addr (addr + byte); - if (mem == NULL) - return byte; - else if (write_p) - *mem = buffer[byte]; - else - buffer[byte] = *mem; - } - return byte; - } - - case 0x01: /* IMAP translated memory */ - { - int byte; - for (byte = 0; byte < size; byte++) - { - uint8 *mem = imem_addr (addr + byte); - if (mem == NULL) - return byte; - else if (write_p) - *mem = buffer[byte]; - else - buffer[byte] = *mem; - } - return byte; - } - - case 0x10: /* On-chip data memory */ - { - addr &= ((1 << DMEM_SIZE) - 1); - if ((addr + size) > (1 << DMEM_SIZE)) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: data address 0x%x is outside range 0-0x%x.\n", - addr + size - 1, (1 << DMEM_SIZE) - 1); - return (0); - } - memory = State.dmem + addr; - break; - } - - case 0x11: /* On-chip insn memory */ - { - addr &= ((1 << IMEM_SIZE) - 1); - if ((addr + size) > (1 << IMEM_SIZE)) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: instruction address 0x%x is outside range 0-0x%x.\n", - addr + size - 1, (1 << IMEM_SIZE) - 1); - return (0); - } - memory = State.imem + addr; - } - - case 0x12: /* Unified memory */ - { - int startsegment, startoffset; /* Segment and offset within segment where xfer starts */ - int endsegment, endoffset; /* Segment and offset within segment where xfer ends */ - - startsegment = addr >> UMEM_SIZE; - startoffset = addr & ((1 << UMEM_SIZE) - 1); - endsegment = (addr + size) >> UMEM_SIZE; - endoffset = (addr + size) & ((1 << UMEM_SIZE) - 1); - - /* FIXME: We do not currently implement xfers across segments, - so detect this case and fail gracefully. */ - - if ((startsegment != endsegment) && !((endsegment == (startsegment + 1)) && endoffset == 0)) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: Unimplemented support for transfers across unified memory segment boundaries\n"); - return (0); - } - if (!State.umem[startsegment]) - { -#ifdef DEBUG - if ((d10v_debug & DEBUG_MEMSIZE) != 0) - { - (*d10v_callback->printf_filtered) (d10v_callback,"Allocating %s bytes unified memory to region %d\n", - add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE)), startsegment); - } -#endif - State.umem[startsegment] = (uint8 *)calloc(1,1<<UMEM_SIZE); - } - if (!State.umem[startsegment]) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: Memory allocation of 0x%x bytes failed.\n", 1<<UMEM_SIZE); - return (0); - } - memory = State.umem[startsegment] + startoffset; - break; - } - - default: - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: address 0x%lx is not in valid range\n", (long) addr); - (*d10v_callback->printf_filtered) (d10v_callback, "0x00xxxxxx: Logical data address segment (DMAP translated memory)\n"); - (*d10v_callback->printf_filtered) (d10v_callback, "0x01xxxxxx: Logical instruction address segment (IMAP translated memory)\n"); - (*d10v_callback->printf_filtered) (d10v_callback, "0x10xxxxxx: Physical data memory segment (On-chip data memory)\n"); - (*d10v_callback->printf_filtered) (d10v_callback, "0x11xxxxxx: Physical instruction memory segment (On-chip insn memory)\n"); - (*d10v_callback->printf_filtered) (d10v_callback, "0x12xxxxxx: Phisical unified memory segment (Unified memory)\n"); - return (0); - } - } - - if (write_p) - { - memcpy (memory, buffer, size); - } - else - { - memcpy (buffer, memory, size); - } - - return size; -} - - -int -sim_write (sd, addr, buffer, size) - SIM_DESC sd; - SIM_ADDR addr; - unsigned char *buffer; - int size; -{ - /* FIXME: this should be performing a virtual transfer */ - return xfer_mem( addr, buffer, size, 1); -} - -int -sim_read (sd, addr, buffer, size) - SIM_DESC sd; - SIM_ADDR addr; - unsigned char *buffer; - int size; -{ - /* FIXME: this should be performing a virtual transfer */ - return xfer_mem( addr, buffer, size, 0); -} - - -SIM_DESC -sim_open (kind, callback, abfd, argv) - SIM_OPEN_KIND kind; - host_callback *callback; - struct _bfd *abfd; - char **argv; -{ - struct simops *s; - struct hash_entry *h; - static int init_p = 0; - char **p; - - sim_kind = kind; - d10v_callback = callback; - myname = argv[0]; - - for (p = argv + 1; *p; ++p) - { -#ifdef DEBUG - if (strcmp (*p, "-t") == 0) - d10v_debug = DEBUG; - else -#endif - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",*p); - } - - /* put all the opcodes in the hash table */ - if (!init_p++) - { - for (s = Simops; s->func; s++) - { - h = &hash_table[hash(s->opcode,s->format)]; - - /* go to the last entry in the chain */ - while (h->next) - h = h->next; - - if (h->ops) - { - h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry)); - if (!h->next) - perror ("malloc failure"); - - h = h->next; - } - h->ops = s; - h->mask = s->mask; - h->opcode = s->opcode; - h->size = s->is_long; - } - } - - /* reset the processor state */ - if (!State.imem) - sim_size(1); - sim_create_inferior ((SIM_DESC) 1, NULL, NULL, NULL); - - /* Fudge our descriptor. */ - return (SIM_DESC) 1; -} - - -void -sim_close (sd, quitting) - SIM_DESC sd; - int quitting; -{ - if (prog_bfd != NULL && prog_bfd_was_opened_p) - { - bfd_close (prog_bfd); - prog_bfd = NULL; - prog_bfd_was_opened_p = 0; - } -} - -void -sim_set_profile (n) - int n; -{ - (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile %d\n",n); -} - -void -sim_set_profile_size (n) - int n; -{ - (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile_size %d\n",n); -} - - -uint8 * -dmem_addr( addr ) - uint32 addr; -{ - int seg; - - addr &= 0xffff; - - if (addr > 0xbfff) - { - if ( (addr & 0xfff0) != 0xff00) - { - (*d10v_callback->printf_filtered) (d10v_callback, "Data address 0x%lx is in I/O space, pc = 0x%lx.\n", - (long)addr, (long)decode_pc ()); - State.exception = SIGBUS; - } - - return State.dmem + addr; - } - - if (addr > 0x7fff) - { - if (DMAP & 0x1000) - { - /* instruction memory */ - return (DMAP & 0xf) * 0x4000 + State.imem + (addr - 0x8000); - } - else - { - /* unified memory */ - /* this is ugly because we allocate unified memory in 128K segments and */ - /* dmap addresses 16k segments */ - seg = (DMAP & 0x3ff) >> 3; - if (State.umem[seg] == NULL) - { -#ifdef DEBUG - (*d10v_callback->printf_filtered) (d10v_callback,"Allocating %d bytes unified memory to region %d\n", 1<<UMEM_SIZE, seg); -#endif - State.umem[seg] = (uint8 *)calloc(1,1<<UMEM_SIZE); - if (!State.umem[seg]) - { - (*d10v_callback->printf_filtered) (d10v_callback, - "ERROR: alloc failed. unified memory region %d unmapped, pc = 0x%lx\n", - seg, (long)decode_pc ()); - State.exception = SIGBUS; - } - } - return State.umem[seg] + (DMAP & 7) * 0x4000 + (addr - 0x8000); - } - } - return State.dmem + addr; -} - - -uint8 * -imem_addr (uint32 pc) -{ - uint16 imap; - - if (pc & 0x20000) - imap = IMAP1; - else - imap = IMAP0; - - if (imap & 0x1000) - return State.imem + pc; - - if (State.umem[imap & 0xff] == NULL) - return 0; - - /* Discard upper bit(s) of PC in case IMAP1 selects unified memory. */ - pc &= (1 << UMEM_SIZE) - 1; - - return State.umem[imap & 0xff] + pc; -} - - -static int stop_simulator = 0; - -int -sim_stop (sd) - SIM_DESC sd; -{ - stop_simulator = 1; - return 1; -} - - -/* Run (or resume) the program. */ -void -sim_resume (sd, step, siggnal) - SIM_DESC sd; - int step, siggnal; -{ - uint32 inst; - int do_iba; - uint8 *iaddr; - -/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */ - State.exception = 0; - if (step) - sim_stop (sd); - - do - { - iaddr = imem_addr ((uint32)PC << 2); - if (iaddr == NULL) - { - State.exception = SIGBUS; - break; - } - - inst = get_longword( iaddr ); - - State.pc_changed = 0; - ins_type_counters[ (int)INS_CYCLES ]++; - - /* check to see if IBA should be triggered after - this instruction */ - if (State.DB && (PC == IBA)) - do_iba = 1; - else - do_iba = 0; - - switch (inst & 0xC0000000) - { - case 0xC0000000: - /* long instruction */ - do_long (inst & 0x3FFFFFFF); - break; - case 0x80000000: - /* R -> L */ - do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, RIGHT_FIRST); - break; - case 0x40000000: - /* L -> R */ - do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, LEFT_FIRST); - break; - case 0: - do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF); - break; - } - - /* calculate the next PC */ - if (!State.pc_changed) - { - if (State.RP && PC == RPT_E) - { - /* Note: The behavour of a branch instruction at RPT_E - is implementation dependant, this simulator takes the - branch. Branching to RPT_E is valid, the instruction - must be executed before the loop is taken. */ - RPT_C -= 1; - if (RPT_C == 0) - { - State.RP = 0; - PC++; - } - else - PC = RPT_S; - } - else - PC++; - } - - if (do_iba) - { - BPC = PC; - move_to_cr (BPSW_CR, PSW); - move_to_cr (PSW_CR, PSW & PSW_SM_BIT); - PC = SDBT_VECTOR_START; - } - } - while ( !State.exception && !stop_simulator); - - if (step && !State.exception) - State.exception = SIGTRAP; -} - -int -sim_trace (sd) - SIM_DESC sd; -{ -#ifdef DEBUG - d10v_debug = DEBUG; -#endif - sim_resume (sd, 0, 0); - return 1; -} - -void -sim_info (sd, verbose) - SIM_DESC sd; - int verbose; -{ - char buf1[40]; - char buf2[40]; - char buf3[40]; - char buf4[40]; - char buf5[40]; - unsigned long left = ins_type_counters[ (int)INS_LEFT ] + ins_type_counters[ (int)INS_LEFT_COND_EXE ]; - unsigned long left_nops = ins_type_counters[ (int)INS_LEFT_NOPS ]; - unsigned long left_parallel = ins_type_counters[ (int)INS_LEFT_PARALLEL ]; - unsigned long left_cond = ins_type_counters[ (int)INS_LEFT_COND_TEST ]; - unsigned long left_total = left + left_parallel + left_cond + left_nops; - - unsigned long right = ins_type_counters[ (int)INS_RIGHT ] + ins_type_counters[ (int)INS_RIGHT_COND_EXE ]; - unsigned long right_nops = ins_type_counters[ (int)INS_RIGHT_NOPS ]; - unsigned long right_parallel = ins_type_counters[ (int)INS_RIGHT_PARALLEL ]; - unsigned long right_cond = ins_type_counters[ (int)INS_RIGHT_COND_TEST ]; - unsigned long right_total = right + right_parallel + right_cond + right_nops; - - unsigned long unknown = ins_type_counters[ (int)INS_UNKNOWN ]; - unsigned long ins_long = ins_type_counters[ (int)INS_LONG ]; - unsigned long parallel = ins_type_counters[ (int)INS_PARALLEL ]; - unsigned long leftright = ins_type_counters[ (int)INS_LEFTRIGHT ]; - unsigned long rightleft = ins_type_counters[ (int)INS_RIGHTLEFT ]; - unsigned long cond_true = ins_type_counters[ (int)INS_COND_TRUE ]; - unsigned long cond_false = ins_type_counters[ (int)INS_COND_FALSE ]; - unsigned long cond_jump = ins_type_counters[ (int)INS_COND_JUMP ]; - unsigned long cycles = ins_type_counters[ (int)INS_CYCLES ]; - unsigned long total = (unknown + left_total + right_total + ins_long); - - int size = strlen (add_commas (buf1, sizeof (buf1), total)); - int parallel_size = strlen (add_commas (buf1, sizeof (buf1), - (left_parallel > right_parallel) ? left_parallel : right_parallel)); - int cond_size = strlen (add_commas (buf1, sizeof (buf1), (left_cond > right_cond) ? left_cond : right_cond)); - int nop_size = strlen (add_commas (buf1, sizeof (buf1), (left_nops > right_nops) ? left_nops : right_nops)); - int normal_size = strlen (add_commas (buf1, sizeof (buf1), (left > right) ? left : right)); - - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n", - size, add_commas (buf1, sizeof (buf1), left_total), - normal_size, add_commas (buf2, sizeof (buf2), left), - parallel_size, add_commas (buf3, sizeof (buf3), left_parallel), - cond_size, add_commas (buf4, sizeof (buf4), left_cond), - nop_size, add_commas (buf5, sizeof (buf5), left_nops)); - - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n", - size, add_commas (buf1, sizeof (buf1), right_total), - normal_size, add_commas (buf2, sizeof (buf2), right), - parallel_size, add_commas (buf3, sizeof (buf3), right_parallel), - cond_size, add_commas (buf4, sizeof (buf4), right_cond), - nop_size, add_commas (buf5, sizeof (buf5), right_nops)); - - if (ins_long) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s long instruction(s)\n", - size, add_commas (buf1, sizeof (buf1), ins_long)); - - if (parallel) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s parallel instruction(s)\n", - size, add_commas (buf1, sizeof (buf1), parallel)); - - if (leftright) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s instruction(s) encoded L->R\n", - size, add_commas (buf1, sizeof (buf1), leftright)); - - if (rightleft) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s instruction(s) encoded R->L\n", - size, add_commas (buf1, sizeof (buf1), rightleft)); - - if (unknown) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s unknown instruction(s)\n", - size, add_commas (buf1, sizeof (buf1), unknown)); - - if (cond_true) - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s instruction(s) due to EXExxx condition being true\n", - size, add_commas (buf1, sizeof (buf1), cond_true)); - - if (cond_false) - (*d10v_callback->printf_filtered) (d10v_callback, - "skipped %*s instruction(s) due to EXExxx condition being false\n", - size, add_commas (buf1, sizeof (buf1), cond_false)); - - if (cond_jump) - (*d10v_callback->printf_filtered) (d10v_callback, - "skipped %*s instruction(s) due to conditional branch succeeding\n", - size, add_commas (buf1, sizeof (buf1), cond_jump)); - - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s cycle(s)\n", - size, add_commas (buf1, sizeof (buf1), cycles)); - - (*d10v_callback->printf_filtered) (d10v_callback, - "executed %*s total instructions\n", - size, add_commas (buf1, sizeof (buf1), total)); -} - -SIM_RC -sim_create_inferior (sd, abfd, argv, env) - SIM_DESC sd; - struct _bfd *abfd; - char **argv; - char **env; -{ - bfd_vma start_address; - - /* reset all state information */ - memset (&State.regs, 0, (int)&State.imem - (int)&State.regs[0]); - - if (argv) - { - /* a hack to set r0/r1 with argc/argv */ - /* some high memory that won't be overwritten by the stack soon */ - bfd_vma addr = State.regs[0] = 0x7C00; - int p = 20; - int i = 0; - while (argv[i]) - { - int size = strlen (argv[i]) + 1; - SW (addr + 2*i, addr + p); - sim_write (sd, addr + 0, argv[i], size); - p += size; - i++; - } - State.regs[1] = i; - } - - /* set PC */ - if (abfd != NULL) - start_address = bfd_get_start_address (abfd); - else - start_address = 0xffc0 << 2; -#ifdef DEBUG - if (d10v_debug) - (*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%lx\n", (long) start_address); -#endif - PC = start_address >> 2; - - /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board */ - /* resets imap0 and imap1 to 0x1000. */ - if (1) - { - SET_IMAP0 (0x0000); - SET_IMAP1 (0x007f); - SET_DMAP (0x0000); - } - else - { - SET_IMAP0(0x1000); - SET_IMAP1(0x1000); - SET_DMAP(0); - } - - return SIM_RC_OK; -} - - -void -sim_set_callbacks (p) - host_callback *p; -{ - d10v_callback = p; -} - -void -sim_stop_reason (sd, reason, sigrc) - SIM_DESC sd; - enum sim_stop *reason; - int *sigrc; -{ -/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */ - - switch (State.exception) - { - case SIG_D10V_STOP: /* stop instruction */ - *reason = sim_exited; - *sigrc = 0; - break; - - case SIG_D10V_EXIT: /* exit trap */ - *reason = sim_exited; - *sigrc = State.regs[0]; - break; - - default: /* some signal */ - *reason = sim_stopped; - if (stop_simulator && !State.exception) - *sigrc = SIGINT; - else - *sigrc = State.exception; - break; - } - - stop_simulator = 0; -} - -void -sim_fetch_register (sd, rn, memory) - SIM_DESC sd; - int rn; - unsigned char *memory; -{ - if (rn > 34) - WRITE_64 (memory, State.a[rn-35]); - else if (rn == 32) - WRITE_16 (memory, IMAP0); - else if (rn == 33) - WRITE_16 (memory, IMAP1); - else if (rn == 34) - WRITE_16 (memory, DMAP); - else if (rn >= 16) - WRITE_16 (memory, move_from_cr (rn - 16)); - else - WRITE_16 (memory, State.regs[rn]); -} - -void -sim_store_register (sd, rn, memory) - SIM_DESC sd; - int rn; - unsigned char *memory; -{ - if (rn > 34) - State.a[rn-35] = READ_64 (memory) & MASK40; - else if (rn == 34) - SET_DMAP( READ_16(memory) ); - else if (rn == 33) - SET_IMAP1( READ_16(memory) ); - else if (rn == 32) - SET_IMAP0( READ_16(memory) ); - else if (rn >= 16) - move_to_cr (rn - 16, READ_16 (memory)); - else - State.regs[rn]= READ_16 (memory); -} - - -void -sim_do_command (sd, cmd) - SIM_DESC sd; - char *cmd; -{ - (*d10v_callback->printf_filtered) (d10v_callback, "sim_do_command: %s\n",cmd); -} - -SIM_RC -sim_load (sd, prog, abfd, from_tty) - SIM_DESC sd; - char *prog; - bfd *abfd; - int from_tty; -{ - extern bfd *sim_load_file (); /* ??? Don't know where this should live. */ - - if (prog_bfd != NULL && prog_bfd_was_opened_p) - { - bfd_close (prog_bfd); - prog_bfd_was_opened_p = 0; - } - prog_bfd = sim_load_file (sd, myname, d10v_callback, prog, abfd, - sim_kind == SIM_OPEN_DEBUG, - 1/*LMA*/, sim_write); - if (prog_bfd == NULL) - return SIM_RC_FAIL; - prog_bfd_was_opened_p = abfd == NULL; - return SIM_RC_OK; -} diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c deleted file mode 100644 index e0db5ab..0000000 --- a/sim/d10v/simops.c +++ /dev/null @@ -1,3252 +0,0 @@ -#include "config.h" - -#include <signal.h> -#include <errno.h> -#include <sys/types.h> -#include <sys/stat.h> -#ifdef HAVE_UNISTD_H -#include <unistd.h> -#endif - -#include "d10v_sim.h" -#include "simops.h" -#include "targ-vals.h" - -extern char *strrchr (); - -enum op_types { - OP_VOID, - OP_REG, - OP_REG_OUTPUT, - OP_DREG, - OP_DREG_OUTPUT, - OP_ACCUM, - OP_ACCUM_OUTPUT, - OP_ACCUM_REVERSE, - OP_CR, - OP_CR_OUTPUT, - OP_CR_REVERSE, - OP_FLAG, - OP_FLAG_OUTPUT, - OP_CONSTANT16, - OP_CONSTANT8, - OP_CONSTANT3, - OP_CONSTANT4, - OP_MEMREF, - OP_MEMREF2, - OP_POSTDEC, - OP_POSTINC, - OP_PREDEC, - OP_R0, - OP_R1, - OP_R2, -}; - - -enum { - PSW_MASK = (PSW_SM_BIT - | PSW_EA_BIT - | PSW_DB_BIT - | PSW_DM_BIT - | PSW_IE_BIT - | PSW_RP_BIT - | PSW_MD_BIT - | PSW_FX_BIT - | PSW_ST_BIT - | PSW_F0_BIT - | PSW_F1_BIT - | PSW_C_BIT), -}; - -reg_t -move_to_cr (int cr, reg_t mask, reg_t val) -{ - /* A MASK bit is set when the corresponding bit in the CR should - be left alone */ - /* This assumes that (VAL & MASK) == 0 */ - switch (cr) - { - case PSW_CR: - val &= PSW_MASK; - if ((mask & PSW_SM_BIT) == 0) - { - int new_sm = (val & PSW_SM_BIT) != 0; - SET_HELD_SP (PSW_SM, GPR (SP_IDX)); /* save old SP */ - if (PSW_SM != new_sm) - SET_GPR (SP_IDX, HELD_SP (new_sm)); /* restore new SP */ - } - if ((mask & (PSW_ST_BIT | PSW_FX_BIT)) == 0) - { - if (val & PSW_ST_BIT && !(val & PSW_FX_BIT)) - { - (*d10v_callback->printf_filtered) - (d10v_callback, - "ERROR at PC 0x%x: ST can only be set when FX is set.\n", - PC<<2); - State.exception = SIGILL; - } - } - /* keep an up-to-date psw around for tracing */ - State.trace.psw = (State.trace.psw & mask) | val; - break; - case BPSW_CR: - case DPSW_CR: - val &= PSW_MASK; - break; - case MOD_S_CR: - case MOD_E_CR: - val &= ~1; - break; - default: - break; - } - /* only issue an update if the register is being changed */ - if ((State.cregs[cr] & ~mask) != val) - SLOT_PEND_MASK (State.cregs[cr], mask, val); - return val; -} - -#ifdef DEBUG -static void trace_input_func PARAMS ((char *name, - enum op_types in1, - enum op_types in2, - enum op_types in3)); - -#define trace_input(name, in1, in2, in3) do { if (d10v_debug) trace_input_func (name, in1, in2, in3); } while (0) - -#ifndef SIZE_INSTRUCTION -#define SIZE_INSTRUCTION 8 -#endif - -#ifndef SIZE_OPERANDS -#define SIZE_OPERANDS 18 -#endif - -#ifndef SIZE_VALUES -#define SIZE_VALUES 13 -#endif - -#ifndef SIZE_LOCATION -#define SIZE_LOCATION 20 -#endif - -#ifndef SIZE_PC -#define SIZE_PC 6 -#endif - -#ifndef SIZE_LINE_NUMBER -#define SIZE_LINE_NUMBER 4 -#endif - -static void -trace_input_func (name, in1, in2, in3) - char *name; - enum op_types in1; - enum op_types in2; - enum op_types in3; -{ - char *comma; - enum op_types in[3]; - int i; - char buf[1024]; - char *p; - long tmp; - char *type; - const char *filename; - const char *functionname; - unsigned int linenumber; - bfd_vma byte_pc; - - if ((d10v_debug & DEBUG_TRACE) == 0) - return; - - switch (State.ins_type) - { - default: - case INS_UNKNOWN: type = " ?"; break; - case INS_LEFT: type = " L"; break; - case INS_RIGHT: type = " R"; break; - case INS_LEFT_PARALLEL: type = "*L"; break; - case INS_RIGHT_PARALLEL: type = "*R"; break; - case INS_LEFT_COND_TEST: type = "?L"; break; - case INS_RIGHT_COND_TEST: type = "?R"; break; - case INS_LEFT_COND_EXE: type = "&L"; break; - case INS_RIGHT_COND_EXE: type = "&R"; break; - case INS_LONG: type = " B"; break; - } - - if ((d10v_debug & DEBUG_LINE_NUMBER) == 0) - (*d10v_callback->printf_filtered) (d10v_callback, - "0x%.*x %s: %-*s ", - SIZE_PC, (unsigned)PC, - type, - SIZE_INSTRUCTION, name); - - else - { - buf[0] = '\0'; - byte_pc = decode_pc (); - if (text && byte_pc >= text_start && byte_pc < text_end) - { - filename = (const char *)0; - functionname = (const char *)0; - linenumber = 0; - if (bfd_find_nearest_line (prog_bfd, text, (struct symbol_cache_entry **)0, byte_pc - text_start, - &filename, &functionname, &linenumber)) - { - p = buf; - if (linenumber) - { - sprintf (p, "#%-*d ", SIZE_LINE_NUMBER, linenumber); - p += strlen (p); - } - else - { - sprintf (p, "%-*s ", SIZE_LINE_NUMBER+1, "---"); - p += SIZE_LINE_NUMBER+2; - } - - if (functionname) - { - sprintf (p, "%s ", functionname); - p += strlen (p); - } - else if (filename) - { - char *q = strrchr (filename, '/'); - sprintf (p, "%s ", (q) ? q+1 : filename); - p += strlen (p); - } - - if (*p == ' ') - *p = '\0'; - } - } - - (*d10v_callback->printf_filtered) (d10v_callback, - "0x%.*x %s: %-*.*s %-*s ", - SIZE_PC, (unsigned)PC, - type, - SIZE_LOCATION, SIZE_LOCATION, buf, - SIZE_INSTRUCTION, name); - } - - in[0] = in1; - in[1] = in2; - in[2] = in3; - comma = ""; - p = buf; - for (i = 0; i < 3; i++) - { - switch (in[i]) - { - case OP_VOID: - case OP_R0: - case OP_R1: - case OP_R2: - break; - - case OP_REG: - case OP_REG_OUTPUT: - case OP_DREG: - case OP_DREG_OUTPUT: - sprintf (p, "%sr%d", comma, OP[i]); - p += strlen (p); - comma = ","; - break; - - case OP_CR: - case OP_CR_OUTPUT: - case OP_CR_REVERSE: - sprintf (p, "%scr%d", comma, OP[i]); - p += strlen (p); - comma = ","; - break; - - case OP_ACCUM: - case OP_ACCUM_OUTPUT: - case OP_ACCUM_REVERSE: - sprintf (p, "%sa%d", comma, OP[i]); - p += strlen (p); - comma = ","; - break; - - case OP_CONSTANT16: - sprintf (p, "%s%d", comma, OP[i]); - p += strlen (p); - comma = ","; - break; - - case OP_CONSTANT8: - sprintf (p, "%s%d", comma, SEXT8(OP[i])); - p += strlen (p); - comma = ","; - break; - - case OP_CONSTANT4: - sprintf (p, "%s%d", comma, SEXT4(OP[i])); - p += strlen (p); - comma = ","; - break; - - case OP_CONSTANT3: - sprintf (p, "%s%d", comma, SEXT3(OP[i])); - p += strlen (p); - comma = ","; - break; - - case OP_MEMREF: - sprintf (p, "%s@r%d", comma, OP[i]); - p += strlen (p); - comma = ","; - break; - - case OP_MEMREF2: - sprintf (p, "%s@(%d,r%d)", comma, (int16)OP[i], OP[i+1]); - p += strlen (p); - comma = ","; - break; - - case OP_POSTINC: - sprintf (p, "%s@r%d+", comma, OP[i]); - p += strlen (p); - comma = ","; - break; - - case OP_POSTDEC: - sprintf (p, "%s@r%d-", comma, OP[i]); - p += strlen (p); - comma = ","; - break; - - case OP_PREDEC: - sprintf (p, "%s@-r%d", comma, OP[i]); - p += strlen (p); - comma = ","; - break; - - case OP_FLAG: - case OP_FLAG_OUTPUT: - if (OP[i] == 0) - sprintf (p, "%sf0", comma); - - else if (OP[i] == 1) - sprintf (p, "%sf1", comma); - - else - sprintf (p, "%sc", comma); - - p += strlen (p); - comma = ","; - break; - } - } - - if ((d10v_debug & DEBUG_VALUES) == 0) - { - *p++ = '\n'; - *p = '\0'; - (*d10v_callback->printf_filtered) (d10v_callback, "%s", buf); - } - else - { - *p = '\0'; - (*d10v_callback->printf_filtered) (d10v_callback, "%-*s", SIZE_OPERANDS, buf); - - p = buf; - for (i = 0; i < 3; i++) - { - buf[0] = '\0'; - switch (in[i]) - { - case OP_VOID: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s", SIZE_VALUES, ""); - break; - - case OP_REG_OUTPUT: - case OP_DREG_OUTPUT: - case OP_CR_OUTPUT: - case OP_ACCUM_OUTPUT: - case OP_FLAG_OUTPUT: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s", SIZE_VALUES, "---"); - break; - - case OP_REG: - case OP_MEMREF: - case OP_POSTDEC: - case OP_POSTINC: - case OP_PREDEC: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16) GPR (OP[i])); - break; - - case OP_DREG: - tmp = (long)((((uint32) GPR (OP[i])) << 16) | ((uint32) GPR (OP[i] + 1))); - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.8lx", SIZE_VALUES-10, "", tmp); - break; - - case OP_CR: - case OP_CR_REVERSE: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16) CREG (OP[i])); - break; - - case OP_ACCUM: - case OP_ACCUM_REVERSE: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.2x%.8lx", SIZE_VALUES-12, "", - ((int)(ACC (OP[i]) >> 32) & 0xff), - ((unsigned long) ACC (OP[i])) & 0xffffffff); - break; - - case OP_CONSTANT16: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16)OP[i]); - break; - - case OP_CONSTANT4: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16)SEXT4(OP[i])); - break; - - case OP_CONSTANT8: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16)SEXT8(OP[i])); - break; - - case OP_CONSTANT3: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16)SEXT3(OP[i])); - break; - - case OP_FLAG: - if (OP[i] == 0) - (*d10v_callback->printf_filtered) (d10v_callback, "%*sF0 = %d", SIZE_VALUES-6, "", - PSW_F0 != 0); - - else if (OP[i] == 1) - (*d10v_callback->printf_filtered) (d10v_callback, "%*sF1 = %d", SIZE_VALUES-6, "", - PSW_F1 != 0); - - else - (*d10v_callback->printf_filtered) (d10v_callback, "%*sC = %d", SIZE_VALUES-5, "", - PSW_C != 0); - - break; - - case OP_MEMREF2: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16)OP[i]); - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16)GPR (OP[i + 1])); - i++; - break; - - case OP_R0: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16) GPR (0)); - break; - - case OP_R1: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16) GPR (1)); - break; - - case OP_R2: - (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", - (uint16) GPR (2)); - break; - - } - } - } - - (*d10v_callback->flush_stdout) (d10v_callback); -} - -static void -do_trace_output_flush (void) -{ - (*d10v_callback->flush_stdout) (d10v_callback); -} - -static void -do_trace_output_finish (void) -{ - (*d10v_callback->printf_filtered) (d10v_callback, - " F0=%d F1=%d C=%d\n", - (State.trace.psw & PSW_F0_BIT) != 0, - (State.trace.psw & PSW_F1_BIT) != 0, - (State.trace.psw & PSW_C_BIT) != 0); - (*d10v_callback->flush_stdout) (d10v_callback); -} - -static void -trace_output_40 (uint64 val) -{ - if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES)) - { - (*d10v_callback->printf_filtered) (d10v_callback, - " :: %*s0x%.2x%.8lx", - SIZE_VALUES - 12, - "", - ((int)(val >> 32) & 0xff), - ((unsigned long) val) & 0xffffffff); - do_trace_output_finish (); - } -} - -static void -trace_output_32 (uint32 val) -{ - if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES)) - { - (*d10v_callback->printf_filtered) (d10v_callback, - " :: %*s0x%.8x", - SIZE_VALUES - 10, - "", - (int) val); - do_trace_output_finish (); - } -} - -static void -trace_output_16 (uint16 val) -{ - if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES)) - { - (*d10v_callback->printf_filtered) (d10v_callback, - " :: %*s0x%.4x", - SIZE_VALUES - 6, - "", - (int) val); - do_trace_output_finish (); - } -} - -static void -trace_output_void () -{ - if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES)) - { - (*d10v_callback->printf_filtered) (d10v_callback, "\n"); - do_trace_output_flush (); - } -} - -static void -trace_output_flag () -{ - if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES)) - { - (*d10v_callback->printf_filtered) (d10v_callback, - " :: %*s", - SIZE_VALUES, - ""); - do_trace_output_finish (); - } -} - - - - -#else -#define trace_input(NAME, IN1, IN2, IN3) -#define trace_output(RESULT) -#endif - -/* abs */ -void -OP_4607 () -{ - int16 tmp; - trace_input ("abs", OP_REG, OP_VOID, OP_VOID); - SET_PSW_F1 (PSW_F0); - tmp = GPR(OP[0]); - if (tmp < 0) - { - tmp = - tmp; - SET_PSW_F0 (1); - } - else - SET_PSW_F0 (0); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* abs */ -void -OP_5607 () -{ - int64 tmp; - trace_input ("abs", OP_ACCUM, OP_VOID, OP_VOID); - SET_PSW_F1 (PSW_F0); - - tmp = SEXT40 (ACC (OP[0])); - if (tmp < 0 ) - { - tmp = - tmp; - if (PSW_ST) - { - if (tmp > SEXT40(MAX32)) - tmp = MAX32; - else if (tmp < SEXT40(MIN32)) - tmp = MIN32; - else - tmp = (tmp & MASK40); - } - else - tmp = (tmp & MASK40); - SET_PSW_F0 (1); - } - else - { - tmp = (tmp & MASK40); - SET_PSW_F0 (0); - } - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* add */ -void -OP_200 () -{ - uint16 a = GPR (OP[0]); - uint16 b = GPR (OP[1]); - uint16 tmp = (a + b); - trace_input ("add", OP_REG, OP_REG, OP_VOID); - SET_PSW_C (a > tmp); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* add */ -void -OP_1201 () -{ - int64 tmp; - tmp = SEXT40(ACC (OP[0])) + (SEXT16 (GPR (OP[1])) << 16 | GPR (OP[1] + 1)); - - trace_input ("add", OP_ACCUM, OP_REG, OP_VOID); - if (PSW_ST) - { - if ( tmp > MAX32) - tmp = MAX32; - else if ( tmp < MIN32) - tmp = MIN32; - else - tmp = (tmp & MASK40); - } - else - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* add */ -void -OP_1203 () -{ - int64 tmp; - tmp = SEXT40(ACC (OP[0])) + SEXT40(ACC (OP[1])); - - trace_input ("add", OP_ACCUM, OP_ACCUM, OP_VOID); - if (PSW_ST) - { - if (tmp > MAX32) - tmp = MAX32; - else if ( tmp < MIN32) - tmp = MIN32; - else - tmp = (tmp & MASK40); - } - else - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* add2w */ -void -OP_1200 () -{ - uint32 tmp; - uint32 a = (GPR (OP[0])) << 16 | GPR (OP[0] + 1); - uint32 b = (GPR (OP[1])) << 16 | GPR (OP[1] + 1); - trace_input ("add2w", OP_DREG, OP_DREG, OP_VOID); - tmp = a + b; - SET_PSW_C (tmp < a); - SET_GPR (OP[0] + 0, (tmp >> 16)); - SET_GPR (OP[0] + 1, (tmp & 0xFFFF)); - trace_output_32 (tmp); -} - -/* add3 */ -void -OP_1000000 () -{ - uint16 a = GPR (OP[1]); - uint16 b = OP[2]; - uint16 tmp = (a + b); - trace_input ("add3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16); - SET_PSW_C (tmp < a); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* addac3 */ -void -OP_17000200 () -{ - int64 tmp; - tmp = SEXT40(ACC (OP[2])) + SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1)); - - trace_input ("addac3", OP_DREG_OUTPUT, OP_DREG, OP_ACCUM); - SET_GPR (OP[0] + 0, ((tmp >> 16) & 0xffff)); - SET_GPR (OP[0] + 1, (tmp & 0xffff)); - trace_output_32 (tmp); -} - -/* addac3 */ -void -OP_17000202 () -{ - int64 tmp; - tmp = SEXT40(ACC (OP[1])) + SEXT40(ACC (OP[2])); - - trace_input ("addac3", OP_DREG_OUTPUT, OP_ACCUM, OP_ACCUM); - SET_GPR (OP[0] + 0, (tmp >> 16) & 0xffff); - SET_GPR (OP[0] + 1, tmp & 0xffff); - trace_output_32 (tmp); -} - -/* addac3s */ -void -OP_17001200 () -{ - int64 tmp; - SET_PSW_F1 (PSW_F0); - - trace_input ("addac3s", OP_DREG_OUTPUT, OP_DREG, OP_ACCUM); - tmp = SEXT40 (ACC (OP[2])) + SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1)); - if ( tmp > MAX32) - { - tmp = 0x7fffffff; - SET_PSW_F0 (1); - } - else if (tmp < MIN32) - { - tmp = 0x80000000; - SET_PSW_F0 (1); - } - else - { - SET_PSW_F0 (0); - } - SET_GPR (OP[0] + 0, (tmp >> 16) & 0xffff); - SET_GPR (OP[0] + 1, (tmp & 0xffff)); - trace_output_32 (tmp); -} - -/* addac3s */ -void -OP_17001202 () -{ - int64 tmp; - SET_PSW_F1 (PSW_F0); - - trace_input ("addac3s", OP_DREG_OUTPUT, OP_ACCUM, OP_ACCUM); - tmp = SEXT40(ACC (OP[1])) + SEXT40(ACC (OP[2])); - if ( tmp > MAX32) - { - tmp = 0x7fffffff; - SET_PSW_F0 (1); - } - else if (tmp < MIN32) - { - tmp = 0x80000000; - SET_PSW_F0 (1); - } - else - { - SET_PSW_F0 (0); - } - SET_GPR (OP[0] + 0, (tmp >> 16) & 0xffff); - SET_GPR (OP[0] + 1, (tmp & 0xffff)); - trace_output_32 (tmp); -} - -/* addi */ -void -OP_201 () -{ - uint16 a = GPR (OP[0]); - uint16 b; - uint16 tmp; - if (OP[1] == 0) - OP[1] = 16; - b = OP[1]; - tmp = (a + b); - trace_input ("addi", OP_REG, OP_CONSTANT16, OP_VOID); - SET_PSW_C (tmp < a); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* and */ -void -OP_C00 () -{ - uint16 tmp = GPR (OP[0]) & GPR (OP[1]); - trace_input ("and", OP_REG, OP_REG, OP_VOID); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* and3 */ -void -OP_6000000 () -{ - uint16 tmp = GPR (OP[1]) & OP[2]; - trace_input ("and3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* bclri */ -void -OP_C01 () -{ - int16 tmp; - trace_input ("bclri", OP_REG, OP_CONSTANT16, OP_VOID); - tmp = (GPR (OP[0]) &~(0x8000 >> OP[1])); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* bl.s */ -void -OP_4900 () -{ - trace_input ("bl.s", OP_CONSTANT8, OP_R0, OP_R1); - SET_GPR (13, PC + 1); - JMP( PC + SEXT8 (OP[0])); - trace_output_void (); -} - -/* bl.l */ -void -OP_24800000 () -{ - trace_input ("bl.l", OP_CONSTANT16, OP_R0, OP_R1); - SET_GPR (13, (PC + 1)); - JMP (PC + OP[0]); - trace_output_void (); -} - -/* bnoti */ -void -OP_A01 () -{ - int16 tmp; - trace_input ("bnoti", OP_REG, OP_CONSTANT16, OP_VOID); - tmp = (GPR (OP[0]) ^ (0x8000 >> OP[1])); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* bra.s */ -void -OP_4800 () -{ - trace_input ("bra.s", OP_CONSTANT8, OP_VOID, OP_VOID); - JMP (PC + SEXT8 (OP[0])); - trace_output_void (); -} - -/* bra.l */ -void -OP_24000000 () -{ - trace_input ("bra.l", OP_CONSTANT16, OP_VOID, OP_VOID); - JMP (PC + OP[0]); - trace_output_void (); -} - -/* brf0f.s */ -void -OP_4A00 () -{ - trace_input ("brf0f.s", OP_CONSTANT8, OP_VOID, OP_VOID); - if (!PSW_F0) - JMP (PC + SEXT8 (OP[0])); - trace_output_flag (); -} - -/* brf0f.l */ -void -OP_25000000 () -{ - trace_input ("brf0f.l", OP_CONSTANT16, OP_VOID, OP_VOID); - if (!PSW_F0) - JMP (PC + OP[0]); - trace_output_flag (); -} - -/* brf0t.s */ -void -OP_4B00 () -{ - trace_input ("brf0t.s", OP_CONSTANT8, OP_VOID, OP_VOID); - if (PSW_F0) - JMP (PC + SEXT8 (OP[0])); - trace_output_flag (); -} - -/* brf0t.l */ -void -OP_25800000 () -{ - trace_input ("brf0t.l", OP_CONSTANT16, OP_VOID, OP_VOID); - if (PSW_F0) - JMP (PC + OP[0]); - trace_output_flag (); -} - -/* bseti */ -void -OP_801 () -{ - int16 tmp; - trace_input ("bseti", OP_REG, OP_CONSTANT16, OP_VOID); - tmp = (GPR (OP[0]) | (0x8000 >> OP[1])); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* btsti */ -void -OP_E01 () -{ - trace_input ("btsti", OP_REG, OP_CONSTANT16, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 ((GPR (OP[0]) & (0x8000 >> OP[1])) ? 1 : 0); - trace_output_flag (); -} - -/* clrac */ -void -OP_5601 () -{ - trace_input ("clrac", OP_ACCUM_OUTPUT, OP_VOID, OP_VOID); - SET_ACC (OP[0], 0); - trace_output_40 (0); -} - -/* cmp */ -void -OP_600 () -{ - trace_input ("cmp", OP_REG, OP_REG, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 (((int16)(GPR (OP[0])) < (int16)(GPR (OP[1]))) ? 1 : 0); - trace_output_flag (); -} - -/* cmp */ -void -OP_1603 () -{ - trace_input ("cmp", OP_ACCUM, OP_ACCUM, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 ((SEXT40(ACC (OP[0])) < SEXT40(ACC (OP[1]))) ? 1 : 0); - trace_output_flag (); -} - -/* cmpeq */ -void -OP_400 () -{ - trace_input ("cmpeq", OP_REG, OP_REG, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 ((GPR (OP[0]) == GPR (OP[1])) ? 1 : 0); - trace_output_flag (); -} - -/* cmpeq */ -void -OP_1403 () -{ - trace_input ("cmpeq", OP_ACCUM, OP_ACCUM, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 (((ACC (OP[0]) & MASK40) == (ACC (OP[1]) & MASK40)) ? 1 : 0); - trace_output_flag (); -} - -/* cmpeqi.s */ -void -OP_401 () -{ - trace_input ("cmpeqi.s", OP_REG, OP_CONSTANT4, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 ((GPR (OP[0]) == (reg_t) SEXT4 (OP[1])) ? 1 : 0); - trace_output_flag (); -} - -/* cmpeqi.l */ -void -OP_2000000 () -{ - trace_input ("cmpeqi.l", OP_REG, OP_CONSTANT16, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 ((GPR (OP[0]) == (reg_t)OP[1]) ? 1 : 0); - trace_output_flag (); -} - -/* cmpi.s */ -void -OP_601 () -{ - trace_input ("cmpi.s", OP_REG, OP_CONSTANT4, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 (((int16)(GPR (OP[0])) < (int16)SEXT4(OP[1])) ? 1 : 0); - trace_output_flag (); -} - -/* cmpi.l */ -void -OP_3000000 () -{ - trace_input ("cmpi.l", OP_REG, OP_CONSTANT16, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 (((int16)(GPR (OP[0])) < (int16)(OP[1])) ? 1 : 0); - trace_output_flag (); -} - -/* cmpu */ -void -OP_4600 () -{ - trace_input ("cmpu", OP_REG, OP_REG, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 ((GPR (OP[0]) < GPR (OP[1])) ? 1 : 0); - trace_output_flag (); -} - -/* cmpui */ -void -OP_23000000 () -{ - trace_input ("cmpui", OP_REG, OP_CONSTANT16, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 ((GPR (OP[0]) < (reg_t)OP[1]) ? 1 : 0); - trace_output_flag (); -} - -/* cpfg */ -void -OP_4E09 () -{ - uint8 val; - - trace_input ("cpfg", OP_FLAG_OUTPUT, OP_FLAG, OP_VOID); - - if (OP[1] == 0) - val = PSW_F0; - else if (OP[1] == 1) - val = PSW_F1; - else - val = PSW_C; - if (OP[0] == 0) - SET_PSW_F0 (val); - else - SET_PSW_F1 (val); - - trace_output_flag (); -} - -/* dbt */ -void -OP_5F20 () -{ - /* d10v_callback->printf_filtered(d10v_callback, "***** DBT ***** PC=%x\n",PC); */ - - /* GDB uses the instruction pair ``dbt || nop'' as a break-point. - The conditional below is for either of the instruction pairs - ``dbt -> XXX'' or ``dbt <- XXX'' and treats them as as cases - where the dbt instruction should be interpreted. - - The module `sim-break' provides a more effective mechanism for - detecting GDB planted breakpoints. The code below may, - eventually, be changed to use that mechanism. */ - - if (State.ins_type == INS_LEFT - || State.ins_type == INS_RIGHT) - { - trace_input ("dbt", OP_VOID, OP_VOID, OP_VOID); - SET_DPC (PC + 1); - SET_DPSW (PSW); - SET_PSW (PSW_DM_BIT | (PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT))); - JMP (DBT_VECTOR_START); - trace_output_void (); - } - else - { - State.exception = SIGTRAP; - } -} - -/* divs */ -void -OP_14002800 () -{ - uint16 foo, tmp, tmpf; - uint16 hi; - uint16 lo; - - trace_input ("divs", OP_DREG, OP_REG, OP_VOID); - foo = (GPR (OP[0]) << 1) | (GPR (OP[0] + 1) >> 15); - tmp = (int16)foo - (int16)(GPR (OP[1])); - tmpf = (foo >= GPR (OP[1])) ? 1 : 0; - hi = ((tmpf == 1) ? tmp : foo); - lo = ((GPR (OP[0] + 1) << 1) | tmpf); - SET_GPR (OP[0] + 0, hi); - SET_GPR (OP[0] + 1, lo); - trace_output_32 (((uint32) hi << 16) | lo); -} - -/* exef0f */ -void -OP_4E04 () -{ - trace_input ("exef0f", OP_VOID, OP_VOID, OP_VOID); - State.exe = (PSW_F0 == 0); - trace_output_flag (); -} - -/* exef0t */ -void -OP_4E24 () -{ - trace_input ("exef0t", OP_VOID, OP_VOID, OP_VOID); - State.exe = (PSW_F0 != 0); - trace_output_flag (); -} - -/* exef1f */ -void -OP_4E40 () -{ - trace_input ("exef1f", OP_VOID, OP_VOID, OP_VOID); - State.exe = (PSW_F1 == 0); - trace_output_flag (); -} - -/* exef1t */ -void -OP_4E42 () -{ - trace_input ("exef1t", OP_VOID, OP_VOID, OP_VOID); - State.exe = (PSW_F1 != 0); - trace_output_flag (); -} - -/* exefaf */ -void -OP_4E00 () -{ - trace_input ("exefaf", OP_VOID, OP_VOID, OP_VOID); - State.exe = (PSW_F0 == 0) & (PSW_F1 == 0); - trace_output_flag (); -} - -/* exefat */ -void -OP_4E02 () -{ - trace_input ("exefat", OP_VOID, OP_VOID, OP_VOID); - State.exe = (PSW_F0 == 0) & (PSW_F1 != 0); - trace_output_flag (); -} - -/* exetaf */ -void -OP_4E20 () -{ - trace_input ("exetaf", OP_VOID, OP_VOID, OP_VOID); - State.exe = (PSW_F0 != 0) & (PSW_F1 == 0); - trace_output_flag (); -} - -/* exetat */ -void -OP_4E22 () -{ - trace_input ("exetat", OP_VOID, OP_VOID, OP_VOID); - State.exe = (PSW_F0 != 0) & (PSW_F1 != 0); - trace_output_flag (); -} - -/* exp */ -void -OP_15002A00 () -{ - uint32 tmp, foo; - int i; - - trace_input ("exp", OP_REG_OUTPUT, OP_DREG, OP_VOID); - if (((int16)GPR (OP[1])) >= 0) - tmp = (GPR (OP[1]) << 16) | GPR (OP[1] + 1); - else - tmp = ~((GPR (OP[1]) << 16) | GPR (OP[1] + 1)); - - foo = 0x40000000; - for (i=1;i<17;i++) - { - if (tmp & foo) - { - SET_GPR (OP[0], (i - 1)); - trace_output_16 (i - 1); - return; - } - foo >>= 1; - } - SET_GPR (OP[0], 16); - trace_output_16 (16); -} - -/* exp */ -void -OP_15002A02 () -{ - int64 tmp, foo; - int i; - - trace_input ("exp", OP_REG_OUTPUT, OP_ACCUM, OP_VOID); - tmp = SEXT40(ACC (OP[1])); - if (tmp < 0) - tmp = ~tmp & MASK40; - - foo = 0x4000000000LL; - for (i=1;i<25;i++) - { - if (tmp & foo) - { - SET_GPR (OP[0], i - 9); - trace_output_16 (i - 9); - return; - } - foo >>= 1; - } - SET_GPR (OP[0], 16); - trace_output_16 (16); -} - -/* jl */ -void -OP_4D00 () -{ - trace_input ("jl", OP_REG, OP_R0, OP_R1); - SET_GPR (13, PC + 1); - JMP (GPR (OP[0])); - trace_output_void (); -} - -/* jmp */ -void -OP_4C00 () -{ - trace_input ("jmp", OP_REG, - (OP[0] == 13) ? OP_R0 : OP_VOID, - (OP[0] == 13) ? OP_R1 : OP_VOID); - - JMP (GPR (OP[0])); - trace_output_void (); -} - -/* ld */ -void -OP_30000000 () -{ - uint16 tmp; - trace_input ("ld", OP_REG_OUTPUT, OP_MEMREF2, OP_VOID); - tmp = RW (OP[1] + GPR (OP[2])); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* ld */ -void -OP_6401 () -{ - uint16 tmp; - trace_input ("ld", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID); - tmp = RW (GPR (OP[1])); - SET_GPR (OP[0], tmp); - if (OP[0] != OP[1]) - INC_ADDR (OP[1], -2); - trace_output_16 (tmp); -} - -/* ld */ -void -OP_6001 () -{ - uint16 tmp; - trace_input ("ld", OP_REG_OUTPUT, OP_POSTINC, OP_VOID); - tmp = RW (GPR (OP[1])); - SET_GPR (OP[0], tmp); - if (OP[0] != OP[1]) - INC_ADDR (OP[1], 2); - trace_output_16 (tmp); -} - -/* ld */ -void -OP_6000 () -{ - uint16 tmp; - trace_input ("ld", OP_REG_OUTPUT, OP_MEMREF, OP_VOID); - tmp = RW (GPR (OP[1])); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* ld2w */ -void -OP_31000000 () -{ - int32 tmp; - uint16 addr = GPR (OP[2]); - trace_input ("ld2w", OP_REG_OUTPUT, OP_MEMREF2, OP_VOID); - tmp = RLW (OP[1] + addr); - SET_GPR32 (OP[0], tmp); - trace_output_32 (tmp); -} - -/* ld2w */ -void -OP_6601 () -{ - uint16 addr = GPR (OP[1]); - int32 tmp; - trace_input ("ld2w", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID); - tmp = RLW (addr); - SET_GPR32 (OP[0], tmp); - INC_ADDR (OP[1], -4); - trace_output_32 (tmp); -} - -/* ld2w */ -void -OP_6201 () -{ - int32 tmp; - uint16 addr = GPR (OP[1]); - trace_input ("ld2w", OP_REG_OUTPUT, OP_POSTINC, OP_VOID); - tmp = RLW (addr); - SET_GPR32 (OP[0], tmp); - INC_ADDR (OP[1], 4); - trace_output_32 (tmp); -} - -/* ld2w */ -void -OP_6200 () -{ - uint16 addr = GPR (OP[1]); - int32 tmp; - trace_input ("ld2w", OP_REG_OUTPUT, OP_MEMREF, OP_VOID); - tmp = RLW (addr + 0); - SET_GPR32 (OP[0], tmp); - trace_output_32 (tmp); -} - -/* ldb */ -void -OP_38000000 () -{ - int16 tmp; - trace_input ("ldb", OP_REG_OUTPUT, OP_MEMREF2, OP_VOID); - tmp = SEXT8 (RB (OP[1] + GPR (OP[2]))); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* ldb */ -void -OP_7000 () -{ - int16 tmp; - trace_input ("ldb", OP_REG_OUTPUT, OP_MEMREF, OP_VOID); - tmp = SEXT8 (RB (GPR (OP[1]))); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* ldi.s */ -void -OP_4001 () -{ - int16 tmp; - trace_input ("ldi.s", OP_REG_OUTPUT, OP_CONSTANT4, OP_VOID); - tmp = SEXT4 (OP[1]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* ldi.l */ -void -OP_20000000 () -{ - int16 tmp; - trace_input ("ldi.l", OP_REG_OUTPUT, OP_CONSTANT16, OP_VOID); - tmp = OP[1]; - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* ldub */ -void -OP_39000000 () -{ - int16 tmp; - trace_input ("ldub", OP_REG_OUTPUT, OP_MEMREF2, OP_VOID); - tmp = RB (OP[1] + GPR (OP[2])); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* ldub */ -void -OP_7200 () -{ - int16 tmp; - trace_input ("ldub", OP_REG_OUTPUT, OP_MEMREF, OP_VOID); - tmp = RB (GPR (OP[1])); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* mac */ -void -OP_2A00 () -{ - int64 tmp; - - trace_input ("mac", OP_ACCUM, OP_REG, OP_REG); - tmp = SEXT40 ((int16)(GPR (OP[1])) * (int16)(GPR (OP[2]))); - - if (PSW_FX) - tmp = SEXT40( (tmp << 1) & MASK40); - - if (PSW_ST && tmp > SEXT40(MAX32)) - tmp = MAX32; - - tmp += SEXT40 (ACC (OP[0])); - if (PSW_ST) - { - if (tmp > SEXT40(MAX32)) - tmp = MAX32; - else if (tmp < SEXT40(MIN32)) - tmp = MIN32; - else - tmp = (tmp & MASK40); - } - else - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* macsu */ -void -OP_1A00 () -{ - int64 tmp; - - trace_input ("macsu", OP_ACCUM, OP_REG, OP_REG); - tmp = SEXT40 ((int16) GPR (OP[1]) * GPR (OP[2])); - if (PSW_FX) - tmp = SEXT40 ((tmp << 1) & MASK40); - tmp = ((SEXT40 (ACC (OP[0])) + tmp) & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* macu */ -void -OP_3A00 () -{ - uint64 tmp; - uint32 src1; - uint32 src2; - - trace_input ("macu", OP_ACCUM, OP_REG, OP_REG); - src1 = (uint16) GPR (OP[1]); - src2 = (uint16) GPR (OP[2]); - tmp = src1 * src2; - if (PSW_FX) - tmp = (tmp << 1); - tmp = ((ACC (OP[0]) + tmp) & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* max */ -void -OP_2600 () -{ - int16 tmp; - trace_input ("max", OP_REG, OP_REG, OP_VOID); - SET_PSW_F1 (PSW_F0); - if ((int16) GPR (OP[1]) > (int16)GPR (OP[0])) - { - tmp = GPR (OP[1]); - SET_PSW_F0 (1); - } - else - { - tmp = GPR (OP[0]); - SET_PSW_F0 (0); - } - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* max */ -void -OP_3600 () -{ - int64 tmp; - - trace_input ("max", OP_ACCUM, OP_DREG, OP_VOID); - SET_PSW_F1 (PSW_F0); - tmp = SEXT16 (GPR (OP[1])) << 16 | GPR (OP[1] + 1); - if (tmp > SEXT40 (ACC (OP[0]))) - { - tmp = (tmp & MASK40); - SET_PSW_F0 (1); - } - else - { - tmp = ACC (OP[0]); - SET_PSW_F0 (0); - } - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* max */ -void -OP_3602 () -{ - int64 tmp; - trace_input ("max", OP_ACCUM, OP_ACCUM, OP_VOID); - SET_PSW_F1 (PSW_F0); - if (SEXT40 (ACC (OP[1])) > SEXT40 (ACC (OP[0]))) - { - tmp = ACC (OP[1]); - SET_PSW_F0 (1); - } - else - { - tmp = ACC (OP[0]); - SET_PSW_F0 (0); - } - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - - -/* min */ -void -OP_2601 () -{ - int16 tmp; - trace_input ("min", OP_REG, OP_REG, OP_VOID); - SET_PSW_F1 (PSW_F0); - if ((int16)GPR (OP[1]) < (int16)GPR (OP[0])) - { - tmp = GPR (OP[1]); - SET_PSW_F0 (1); - } - else - { - tmp = GPR (OP[0]); - SET_PSW_F0 (0); - } - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* min */ -void -OP_3601 () -{ - int64 tmp; - - trace_input ("min", OP_ACCUM, OP_DREG, OP_VOID); - SET_PSW_F1 (PSW_F0); - tmp = SEXT16 (GPR (OP[1])) << 16 | GPR (OP[1] + 1); - if (tmp < SEXT40(ACC (OP[0]))) - { - tmp = (tmp & MASK40); - SET_PSW_F0 (1); - } - else - { - tmp = ACC (OP[0]); - SET_PSW_F0 (0); - } - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* min */ -void -OP_3603 () -{ - int64 tmp; - trace_input ("min", OP_ACCUM, OP_ACCUM, OP_VOID); - SET_PSW_F1 (PSW_F0); - if (SEXT40(ACC (OP[1])) < SEXT40(ACC (OP[0]))) - { - tmp = ACC (OP[1]); - SET_PSW_F0 (1); - } - else - { - tmp = ACC (OP[0]); - SET_PSW_F0 (0); - } - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* msb */ -void -OP_2800 () -{ - int64 tmp; - - trace_input ("msb", OP_ACCUM, OP_REG, OP_REG); - tmp = SEXT40 ((int16)(GPR (OP[1])) * (int16)(GPR (OP[2]))); - - if (PSW_FX) - tmp = SEXT40 ((tmp << 1) & MASK40); - - if (PSW_ST && tmp > SEXT40(MAX32)) - tmp = MAX32; - - tmp = SEXT40(ACC (OP[0])) - tmp; - if (PSW_ST) - { - if (tmp > SEXT40(MAX32)) - tmp = MAX32; - else if (tmp < SEXT40(MIN32)) - tmp = MIN32; - else - tmp = (tmp & MASK40); - } - else - { - tmp = (tmp & MASK40); - } - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* msbsu */ -void -OP_1800 () -{ - int64 tmp; - - trace_input ("msbsu", OP_ACCUM, OP_REG, OP_REG); - tmp = SEXT40 ((int16)GPR (OP[1]) * GPR (OP[2])); - if (PSW_FX) - tmp = SEXT40( (tmp << 1) & MASK40); - tmp = ((SEXT40 (ACC (OP[0])) - tmp) & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* msbu */ -void -OP_3800 () -{ - uint64 tmp; - uint32 src1; - uint32 src2; - - trace_input ("msbu", OP_ACCUM, OP_REG, OP_REG); - src1 = (uint16) GPR (OP[1]); - src2 = (uint16) GPR (OP[2]); - tmp = src1 * src2; - if (PSW_FX) - tmp = (tmp << 1); - tmp = ((ACC (OP[0]) - tmp) & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* mul */ -void -OP_2E00 () -{ - int16 tmp; - trace_input ("mul", OP_REG, OP_REG, OP_VOID); - tmp = GPR (OP[0]) * GPR (OP[1]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* mulx */ -void -OP_2C00 () -{ - int64 tmp; - - trace_input ("mulx", OP_ACCUM_OUTPUT, OP_REG, OP_REG); - tmp = SEXT40 ((int16)(GPR (OP[1])) * (int16)(GPR (OP[2]))); - - if (PSW_FX) - tmp = SEXT40 ((tmp << 1) & MASK40); - - if (PSW_ST && tmp > MAX32) - tmp = MAX32; - else - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* mulxsu */ -void -OP_1C00 () -{ - int64 tmp; - - trace_input ("mulxsu", OP_ACCUM_OUTPUT, OP_REG, OP_REG); - tmp = SEXT40 ((int16)(GPR (OP[1])) * GPR (OP[2])); - - if (PSW_FX) - tmp <<= 1; - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* mulxu */ -void -OP_3C00 () -{ - uint64 tmp; - uint32 src1; - uint32 src2; - - trace_input ("mulxu", OP_ACCUM_OUTPUT, OP_REG, OP_REG); - src1 = (uint16) GPR (OP[1]); - src2 = (uint16) GPR (OP[2]); - tmp = src1 * src2; - if (PSW_FX) - tmp <<= 1; - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* mv */ -void -OP_4000 () -{ - int16 tmp; - trace_input ("mv", OP_REG_OUTPUT, OP_REG, OP_VOID); - tmp = GPR (OP[1]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* mv2w */ -void -OP_5000 () -{ - int32 tmp; - trace_input ("mv2w", OP_DREG_OUTPUT, OP_DREG, OP_VOID); - tmp = GPR32 (OP[1]); - SET_GPR32 (OP[0], tmp); - trace_output_32 (tmp); -} - -/* mv2wfac */ -void -OP_3E00 () -{ - int32 tmp; - trace_input ("mv2wfac", OP_DREG_OUTPUT, OP_ACCUM, OP_VOID); - tmp = ACC (OP[1]); - SET_GPR32 (OP[0], tmp); - trace_output_32 (tmp); -} - -/* mv2wtac */ -void -OP_3E01 () -{ - int64 tmp; - trace_input ("mv2wtac", OP_DREG, OP_ACCUM_OUTPUT, OP_VOID); - tmp = ((SEXT16 (GPR (OP[0])) << 16 | GPR (OP[0] + 1)) & MASK40); - SET_ACC (OP[1], tmp); - trace_output_40 (tmp); -} - -/* mvac */ -void -OP_3E03 () -{ - int64 tmp; - trace_input ("mvac", OP_ACCUM_OUTPUT, OP_ACCUM, OP_VOID); - tmp = ACC (OP[1]); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* mvb */ -void -OP_5400 () -{ - int16 tmp; - trace_input ("mvb", OP_REG_OUTPUT, OP_REG, OP_VOID); - tmp = SEXT8 (GPR (OP[1]) & 0xff); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* mvf0f */ -void -OP_4400 () -{ - int16 tmp; - trace_input ("mf0f", OP_REG_OUTPUT, OP_REG, OP_VOID); - if (PSW_F0 == 0) - { - tmp = GPR (OP[1]); - SET_GPR (OP[0], tmp); - } - else - tmp = GPR (OP[0]); - trace_output_16 (tmp); -} - -/* mvf0t */ -void -OP_4401 () -{ - int16 tmp; - trace_input ("mf0t", OP_REG_OUTPUT, OP_REG, OP_VOID); - if (PSW_F0) - { - tmp = GPR (OP[1]); - SET_GPR (OP[0], tmp); - } - else - tmp = GPR (OP[0]); - trace_output_16 (tmp); -} - -/* mvfacg */ -void -OP_1E04 () -{ - int16 tmp; - trace_input ("mvfacg", OP_REG_OUTPUT, OP_ACCUM, OP_VOID); - tmp = ((ACC (OP[1]) >> 32) & 0xff); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* mvfachi */ -void -OP_1E00 () -{ - int16 tmp; - trace_input ("mvfachi", OP_REG_OUTPUT, OP_ACCUM, OP_VOID); - tmp = (ACC (OP[1]) >> 16); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* mvfaclo */ -void -OP_1E02 () -{ - int16 tmp; - trace_input ("mvfaclo", OP_REG_OUTPUT, OP_ACCUM, OP_VOID); - tmp = ACC (OP[1]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* mvfc */ -void -OP_5200 () -{ - int16 tmp; - trace_input ("mvfc", OP_REG_OUTPUT, OP_CR, OP_VOID); - tmp = CREG (OP[1]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* mvtacg */ -void -OP_1E41 () -{ - int64 tmp; - trace_input ("mvtacg", OP_REG, OP_ACCUM, OP_VOID); - tmp = ((ACC (OP[1]) & MASK32) - | ((int64)(GPR (OP[0]) & 0xff) << 32)); - SET_ACC (OP[1], tmp); - trace_output_40 (tmp); -} - -/* mvtachi */ -void -OP_1E01 () -{ - uint64 tmp; - trace_input ("mvtachi", OP_REG, OP_ACCUM, OP_VOID); - tmp = ACC (OP[1]) & 0xffff; - tmp = ((SEXT16 (GPR (OP[0])) << 16 | tmp) & MASK40); - SET_ACC (OP[1], tmp); - trace_output_40 (tmp); -} - -/* mvtaclo */ -void -OP_1E21 () -{ - int64 tmp; - trace_input ("mvtaclo", OP_REG, OP_ACCUM, OP_VOID); - tmp = ((SEXT16 (GPR (OP[0]))) & MASK40); - SET_ACC (OP[1], tmp); - trace_output_40 (tmp); -} - -/* mvtc */ -void -OP_5600 () -{ - int16 tmp; - trace_input ("mvtc", OP_REG, OP_CR_OUTPUT, OP_VOID); - tmp = GPR (OP[0]); - tmp = SET_CREG (OP[1], tmp); - trace_output_16 (tmp); -} - -/* mvub */ -void -OP_5401 () -{ - int16 tmp; - trace_input ("mvub", OP_REG_OUTPUT, OP_REG, OP_VOID); - tmp = (GPR (OP[1]) & 0xff); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* neg */ -void -OP_4605 () -{ - int16 tmp; - trace_input ("neg", OP_REG, OP_VOID, OP_VOID); - tmp = - GPR (OP[0]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* neg */ -void -OP_5605 () -{ - int64 tmp; - - trace_input ("neg", OP_ACCUM, OP_VOID, OP_VOID); - tmp = -SEXT40(ACC (OP[0])); - if (PSW_ST) - { - if (tmp > SEXT40(MAX32)) - tmp = (MAX32); - else if (tmp < SEXT40(MIN32)) - tmp = (MIN32); - else - tmp = (tmp & MASK40); - } - else - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - - -/* nop */ -void -OP_5E00 () -{ - trace_input ("nop", OP_VOID, OP_VOID, OP_VOID); - - ins_type_counters[ (int)State.ins_type ]--; /* don't count nops as normal instructions */ - switch (State.ins_type) - { - default: - ins_type_counters[ (int)INS_UNKNOWN ]++; - break; - - case INS_LEFT_PARALLEL: - /* Don't count a parallel op that includes a NOP as a true parallel op */ - ins_type_counters[ (int)INS_RIGHT_PARALLEL ]--; - ins_type_counters[ (int)INS_RIGHT ]++; - ins_type_counters[ (int)INS_LEFT_NOPS ]++; - break; - - case INS_LEFT: - case INS_LEFT_COND_EXE: - ins_type_counters[ (int)INS_LEFT_NOPS ]++; - break; - - case INS_RIGHT_PARALLEL: - /* Don't count a parallel op that includes a NOP as a true parallel op */ - ins_type_counters[ (int)INS_LEFT_PARALLEL ]--; - ins_type_counters[ (int)INS_LEFT ]++; - ins_type_counters[ (int)INS_RIGHT_NOPS ]++; - break; - - case INS_RIGHT: - case INS_RIGHT_COND_EXE: - ins_type_counters[ (int)INS_RIGHT_NOPS ]++; - break; - } - - trace_output_void (); -} - -/* not */ -void -OP_4603 () -{ - int16 tmp; - trace_input ("not", OP_REG, OP_VOID, OP_VOID); - tmp = ~GPR (OP[0]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* or */ -void -OP_800 () -{ - int16 tmp; - trace_input ("or", OP_REG, OP_REG, OP_VOID); - tmp = (GPR (OP[0]) | GPR (OP[1])); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* or3 */ -void -OP_4000000 () -{ - int16 tmp; - trace_input ("or3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16); - tmp = (GPR (OP[1]) | OP[2]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* rac */ -void -OP_5201 () -{ - int64 tmp; - int shift = SEXT3 (OP[2]); - - trace_input ("rac", OP_DREG_OUTPUT, OP_ACCUM, OP_CONSTANT3); - if (OP[1] != 0) - { - (*d10v_callback->printf_filtered) (d10v_callback, - "ERROR at PC 0x%x: instruction only valid for A0\n", - PC<<2); - State.exception = SIGILL; - } - - SET_PSW_F1 (PSW_F0); - tmp = SEXT56 ((ACC (0) << 16) | (ACC (1) & 0xffff)); - if (shift >=0) - tmp <<= shift; - else - tmp >>= -shift; - tmp += 0x8000; - tmp >>= 16; /* look at bits 0:43 */ - if (tmp > SEXT44 (SIGNED64 (0x0007fffffff))) - { - tmp = 0x7fffffff; - SET_PSW_F0 (1); - } - else if (tmp < SEXT44 (SIGNED64 (0xfff80000000))) - { - tmp = 0x80000000; - SET_PSW_F0 (1); - } - else - { - SET_PSW_F0 (0); - } - SET_GPR32 (OP[0], tmp); - trace_output_32 (tmp); -} - -/* rachi */ -void -OP_4201 () -{ - signed64 tmp; - int shift = SEXT3 (OP[2]); - - trace_input ("rachi", OP_REG_OUTPUT, OP_ACCUM, OP_CONSTANT3); - SET_PSW_F1 (PSW_F0); - if (shift >=0) - tmp = SEXT40 (ACC (OP[1])) << shift; - else - tmp = SEXT40 (ACC (OP[1])) >> -shift; - tmp += 0x8000; - - if (tmp > SEXT44 (SIGNED64 (0x0007fffffff))) - { - tmp = 0x7fff; - SET_PSW_F0 (1); - } - else if (tmp < SEXT44 (SIGNED64 (0xfff80000000))) - { - tmp = 0x8000; - SET_PSW_F0 (1); - } - else - { - tmp = (tmp >> 16); - SET_PSW_F0 (0); - } - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* rep */ -void -OP_27000000 () -{ - trace_input ("rep", OP_REG, OP_CONSTANT16, OP_VOID); - SET_RPT_S (PC + 1); - SET_RPT_E (PC + OP[1]); - SET_RPT_C (GPR (OP[0])); - SET_PSW_RP (1); - if (GPR (OP[0]) == 0) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: rep with count=0 is illegal.\n"); - State.exception = SIGILL; - } - if (OP[1] < 4) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: rep must include at least 4 instructions.\n"); - State.exception = SIGILL; - } - trace_output_void (); -} - -/* repi */ -void -OP_2F000000 () -{ - trace_input ("repi", OP_CONSTANT16, OP_CONSTANT16, OP_VOID); - SET_RPT_S (PC + 1); - SET_RPT_E (PC + OP[1]); - SET_RPT_C (OP[0]); - SET_PSW_RP (1); - if (OP[0] == 0) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: repi with count=0 is illegal.\n"); - State.exception = SIGILL; - } - if (OP[1] < 4) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: repi must include at least 4 instructions.\n"); - State.exception = SIGILL; - } - trace_output_void (); -} - -/* rtd */ -void -OP_5F60 () -{ - trace_input ("rtd", OP_VOID, OP_VOID, OP_VOID); - SET_CREG (PSW_CR, DPSW); - JMP(DPC); - trace_output_void (); -} - -/* rte */ -void -OP_5F40 () -{ - trace_input ("rte", OP_VOID, OP_VOID, OP_VOID); - SET_CREG (PSW_CR, BPSW); - JMP(BPC); - trace_output_void (); -} - -/* sadd */ -void -OP_1223 () -{ - int64 tmp; - - trace_input ("sadd", OP_ACCUM, OP_ACCUM, OP_VOID); - tmp = SEXT40(ACC (OP[0])) + (SEXT40(ACC (OP[1])) >> 16); - if (PSW_ST) - { - if (tmp > SEXT40(MAX32)) - tmp = (MAX32); - else if (tmp < SEXT40(MIN32)) - tmp = (MIN32); - else - tmp = (tmp & MASK40); - } - else - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* setf0f */ -void -OP_4611 () -{ - int16 tmp; - trace_input ("setf0f", OP_REG_OUTPUT, OP_VOID, OP_VOID); - tmp = ((PSW_F0 == 0) ? 1 : 0); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* setf0t */ -void -OP_4613 () -{ - int16 tmp; - trace_input ("setf0t", OP_REG_OUTPUT, OP_VOID, OP_VOID); - tmp = ((PSW_F0 == 1) ? 1 : 0); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* sleep */ -void -OP_5FC0 () -{ - trace_input ("sleep", OP_VOID, OP_VOID, OP_VOID); - SET_PSW_IE (1); - trace_output_void (); -} - -/* sll */ -void -OP_2200 () -{ - int16 tmp; - trace_input ("sll", OP_REG, OP_REG, OP_VOID); - tmp = (GPR (OP[0]) << (GPR (OP[1]) & 0xf)); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* sll */ -void -OP_3200 () -{ - int64 tmp; - trace_input ("sll", OP_ACCUM, OP_REG, OP_VOID); - if ((GPR (OP[1]) & 31) <= 16) - tmp = SEXT40 (ACC (OP[0])) << (GPR (OP[1]) & 31); - else - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", GPR (OP[1]) & 31); - State.exception = SIGILL; - return; - } - - if (PSW_ST) - { - if (tmp > MAX32) - tmp = (MAX32); - else if (tmp < 0xffffff80000000LL) - tmp = (MIN32); - else - tmp = (tmp & MASK40); - } - else - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* slli */ -void -OP_2201 () -{ - int16 tmp; - trace_input ("slli", OP_REG, OP_CONSTANT16, OP_VOID); - tmp = (GPR (OP[0]) << OP[1]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* slli */ -void -OP_3201 () -{ - int64 tmp; - - if (OP[1] == 0) - OP[1] = 16; - - trace_input ("slli", OP_ACCUM, OP_CONSTANT16, OP_VOID); - tmp = SEXT40(ACC (OP[0])) << OP[1]; - - if (PSW_ST) - { - if (tmp > MAX32) - tmp = (MAX32); - else if (tmp < 0xffffff80000000LL) - tmp = (MIN32); - else - tmp = (tmp & MASK40); - } - else - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* slx */ -void -OP_460B () -{ - int16 tmp; - trace_input ("slx", OP_REG, OP_FLAG, OP_VOID); - tmp = ((GPR (OP[0]) << 1) | PSW_F0); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* sra */ -void -OP_2400 () -{ - int16 tmp; - trace_input ("sra", OP_REG, OP_REG, OP_VOID); - tmp = (((int16)(GPR (OP[0]))) >> (GPR (OP[1]) & 0xf)); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* sra */ -void -OP_3400 () -{ - trace_input ("sra", OP_ACCUM, OP_REG, OP_VOID); - if ((GPR (OP[1]) & 31) <= 16) - { - int64 tmp = ((SEXT40(ACC (OP[0])) >> (GPR (OP[1]) & 31)) & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); - } - else - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", GPR (OP[1]) & 31); - State.exception = SIGILL; - return; - } -} - -/* srai */ -void -OP_2401 () -{ - int16 tmp; - trace_input ("srai", OP_REG, OP_CONSTANT16, OP_VOID); - tmp = (((int16)(GPR (OP[0]))) >> OP[1]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* srai */ -void -OP_3401 () -{ - int64 tmp; - if (OP[1] == 0) - OP[1] = 16; - - trace_input ("srai", OP_ACCUM, OP_CONSTANT16, OP_VOID); - tmp = ((SEXT40(ACC (OP[0])) >> OP[1]) & MASK40); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* srl */ -void -OP_2000 () -{ - int16 tmp; - trace_input ("srl", OP_REG, OP_REG, OP_VOID); - tmp = (GPR (OP[0]) >> (GPR (OP[1]) & 0xf)); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* srl */ -void -OP_3000 () -{ - trace_input ("srl", OP_ACCUM, OP_REG, OP_VOID); - if ((GPR (OP[1]) & 31) <= 16) - { - int64 tmp = ((uint64)((ACC (OP[0]) & MASK40) >> (GPR (OP[1]) & 31))); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); - } - else - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", GPR (OP[1]) & 31); - State.exception = SIGILL; - return; - } - -} - -/* srli */ -void -OP_2001 () -{ - int16 tmp; - trace_input ("srli", OP_REG, OP_CONSTANT16, OP_VOID); - tmp = (GPR (OP[0]) >> OP[1]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* srli */ -void -OP_3001 () -{ - int64 tmp; - if (OP[1] == 0) - OP[1] = 16; - - trace_input ("srli", OP_ACCUM, OP_CONSTANT16, OP_VOID); - tmp = ((uint64)(ACC (OP[0]) & MASK40) >> OP[1]); - SET_ACC (OP[0], tmp); - trace_output_40 (tmp); -} - -/* srx */ -void -OP_4609 () -{ - uint16 tmp; - trace_input ("srx", OP_REG, OP_FLAG, OP_VOID); - tmp = PSW_F0 << 15; - tmp = ((GPR (OP[0]) >> 1) | tmp); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* st */ -void -OP_34000000 () -{ - trace_input ("st", OP_REG, OP_MEMREF2, OP_VOID); - SW (OP[1] + GPR (OP[2]), GPR (OP[0])); - trace_output_void (); -} - -/* st */ -void -OP_6800 () -{ - trace_input ("st", OP_REG, OP_MEMREF, OP_VOID); - SW (GPR (OP[1]), GPR (OP[0])); - trace_output_void (); -} - -/* st */ -void -OP_6C1F () -{ - uint16 addr = GPR (OP[1]) - 2; - trace_input ("st", OP_REG, OP_PREDEC, OP_VOID); - if (OP[1] != 15) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot pre-decrement any registers but r15 (SP).\n"); - State.exception = SIGILL; - return; - } - SW (addr, GPR (OP[0])); - SET_GPR (OP[1], addr); - trace_output_void (); -} - -/* st */ -void -OP_6801 () -{ - trace_input ("st", OP_REG, OP_POSTINC, OP_VOID); - SW (GPR (OP[1]), GPR (OP[0])); - INC_ADDR (OP[1], 2); - trace_output_void (); -} - -/* st */ -void -OP_6C01 () -{ - trace_input ("st", OP_REG, OP_POSTDEC, OP_VOID); - if ( OP[1] == 15 ) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n"); - State.exception = SIGILL; - return; - } - SW (GPR (OP[1]), GPR (OP[0])); - INC_ADDR (OP[1], -2); - trace_output_void (); -} - -/* st2w */ -void -OP_35000000 () -{ - trace_input ("st2w", OP_DREG, OP_MEMREF2, OP_VOID); - SW (GPR (OP[2])+ OP[1] + 0, GPR (OP[0] + 0)); - SW (GPR (OP[2])+ OP[1] + 2, GPR (OP[0] + 1)); - trace_output_void (); -} - -/* st2w */ -void -OP_6A00 () -{ - trace_input ("st2w", OP_DREG, OP_MEMREF, OP_VOID); - SW (GPR (OP[1]) + 0, GPR (OP[0] + 0)); - SW (GPR (OP[1]) + 2, GPR (OP[0] + 1)); - trace_output_void (); -} - -/* st2w */ -void -OP_6E1F () -{ - uint16 addr = GPR (OP[1]) - 4; - trace_input ("st2w", OP_DREG, OP_PREDEC, OP_VOID); - if ( OP[1] != 15 ) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot pre-decrement any registers but r15 (SP).\n"); - State.exception = SIGILL; - return; - } - SW (addr + 0, GPR (OP[0] + 0)); - SW (addr + 2, GPR (OP[0] + 1)); - SET_GPR (OP[1], addr); - trace_output_void (); -} - -/* st2w */ -void -OP_6A01 () -{ - trace_input ("st2w", OP_DREG, OP_POSTINC, OP_VOID); - SW (GPR (OP[1]) + 0, GPR (OP[0] + 0)); - SW (GPR (OP[1]) + 2, GPR (OP[0] + 1)); - INC_ADDR (OP[1], 4); - trace_output_void (); -} - -/* st2w */ -void -OP_6E01 () -{ - trace_input ("st2w", OP_DREG, OP_POSTDEC, OP_VOID); - if ( OP[1] == 15 ) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n"); - State.exception = SIGILL; - return; - } - SW (GPR (OP[1]) + 0, GPR (OP[0] + 0)); - SW (GPR (OP[1]) + 2, GPR (OP[0] + 1)); - INC_ADDR (OP[1], -4); - trace_output_void (); -} - -/* stb */ -void -OP_3C000000 () -{ - trace_input ("stb", OP_REG, OP_MEMREF2, OP_VOID); - SB (GPR (OP[2]) + OP[1], GPR (OP[0])); - trace_output_void (); -} - -/* stb */ -void -OP_7800 () -{ - trace_input ("stb", OP_REG, OP_MEMREF, OP_VOID); - SB (GPR (OP[1]), GPR (OP[0])); - trace_output_void (); -} - -/* stop */ -void -OP_5FE0 () -{ - trace_input ("stop", OP_VOID, OP_VOID, OP_VOID); - State.exception = SIG_D10V_STOP; - trace_output_void (); -} - -/* sub */ -void -OP_0 () -{ - uint16 a = GPR (OP[0]); - uint16 b = GPR (OP[1]); - uint16 tmp = (a - b); - trace_input ("sub", OP_REG, OP_REG, OP_VOID); - /* see ../common/sim-alu.h for a more extensive discussion on how to - compute the carry/overflow bits. */ - SET_PSW_C (a >= b); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* sub */ -void -OP_1001 () -{ - int64 tmp; - - trace_input ("sub", OP_ACCUM, OP_DREG, OP_VOID); - tmp = SEXT40(ACC (OP[0])) - (SEXT16 (GPR (OP[1])) << 16 | GPR (OP[1] + 1)); - if (PSW_ST) - { - if ( tmp > MAX32) - tmp = (MAX32); - else if ( tmp < MIN32) - tmp = (MIN32); - else - tmp = (tmp & MASK40); - } - else - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - - trace_output_40 (tmp); -} - -/* sub */ - -void -OP_1003 () -{ - int64 tmp; - - trace_input ("sub", OP_ACCUM, OP_ACCUM, OP_VOID); - tmp = SEXT40(ACC (OP[0])) - SEXT40(ACC (OP[1])); - if (PSW_ST) - { - if (tmp > MAX32) - tmp = (MAX32); - else if ( tmp < MIN32) - tmp = (MIN32); - else - tmp = (tmp & MASK40); - } - else - tmp = (tmp & MASK40); - SET_ACC (OP[0], tmp); - - trace_output_40 (tmp); -} - -/* sub2w */ -void -OP_1000 () -{ - uint32 tmp, a, b; - - trace_input ("sub2w", OP_DREG, OP_DREG, OP_VOID); - a = (uint32)((GPR (OP[0]) << 16) | GPR (OP[0] + 1)); - b = (uint32)((GPR (OP[1]) << 16) | GPR (OP[1] + 1)); - /* see ../common/sim-alu.h for a more extensive discussion on how to - compute the carry/overflow bits */ - tmp = a - b; - SET_PSW_C (a >= b); - SET_GPR32 (OP[0], tmp); - trace_output_32 (tmp); -} - -/* subac3 */ -void -OP_17000000 () -{ - int64 tmp; - - trace_input ("subac3", OP_DREG_OUTPUT, OP_DREG, OP_ACCUM); - tmp = SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1)) - SEXT40 (ACC (OP[2])); - SET_GPR32 (OP[0], tmp); - trace_output_32 (tmp); -} - -/* subac3 */ -void -OP_17000002 () -{ - int64 tmp; - - trace_input ("subac3", OP_DREG_OUTPUT, OP_ACCUM, OP_ACCUM); - tmp = SEXT40 (ACC (OP[1])) - SEXT40(ACC (OP[2])); - SET_GPR32 (OP[0], tmp); - trace_output_32 (tmp); -} - -/* subac3s */ -void -OP_17001000 () -{ - int64 tmp; - - trace_input ("subac3s", OP_DREG_OUTPUT, OP_DREG, OP_ACCUM); - SET_PSW_F1 (PSW_F0); - tmp = SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1)) - SEXT40(ACC (OP[2])); - if ( tmp > MAX32) - { - tmp = 0x7fffffff; - SET_PSW_F0 (1); - } - else if (tmp < MIN32) - { - tmp = 0x80000000; - SET_PSW_F0 (1); - } - else - { - SET_PSW_F0 (0); - } - SET_GPR32 (OP[0], tmp); - trace_output_32 (tmp); -} - -/* subac3s */ -void -OP_17001002 () -{ - int64 tmp; - - trace_input ("subac3s", OP_DREG_OUTPUT, OP_ACCUM, OP_ACCUM); - SET_PSW_F1 (PSW_F0); - tmp = SEXT40(ACC (OP[1])) - SEXT40(ACC (OP[2])); - if ( tmp > MAX32) - { - tmp = 0x7fffffff; - SET_PSW_F0 (1); - } - else if (tmp < MIN32) - { - tmp = 0x80000000; - SET_PSW_F0 (1); - } - else - { - SET_PSW_F0 (0); - } - SET_GPR32 (OP[0], tmp); - trace_output_32 (tmp); -} - -/* subi */ -void -OP_1 () -{ - unsigned tmp; - if (OP[1] == 0) - OP[1] = 16; - - trace_input ("subi", OP_REG, OP_CONSTANT16, OP_VOID); - /* see ../common/sim-alu.h for a more extensive discussion on how to - compute the carry/overflow bits. */ - /* since OP[1] is never <= 0, -OP[1] == ~OP[1]+1 can never overflow */ - tmp = ((unsigned)(unsigned16) GPR (OP[0]) - + (unsigned)(unsigned16) ( - OP[1])); - SET_PSW_C (tmp >= (1 << 16)); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* trap */ -void -OP_5F00 () -{ - trace_input ("trap", OP_CONSTANT4, OP_VOID, OP_VOID); - trace_output_void (); - - switch (OP[0]) - { - default: -#if (DEBUG & DEBUG_TRAP) == 0 - { - uint16 vec = OP[0] + TRAP_VECTOR_START; - SET_BPC (PC + 1); - SET_BPSW (PSW); - SET_PSW (PSW & PSW_SM_BIT); - JMP (vec); - break; - } -#else /* if debugging use trap to print registers */ - { - int i; - static int first_time = 1; - - if (first_time) - { - first_time = 0; - (*d10v_callback->printf_filtered) (d10v_callback, "Trap # PC "); - for (i = 0; i < 16; i++) - (*d10v_callback->printf_filtered) (d10v_callback, " %sr%d", (i > 9) ? "" : " ", i); - (*d10v_callback->printf_filtered) (d10v_callback, " a0 a1 f0 f1 c\n"); - } - - (*d10v_callback->printf_filtered) (d10v_callback, "Trap %2d 0x%.4x:", (int)OP[0], (int)PC); - - for (i = 0; i < 16; i++) - (*d10v_callback->printf_filtered) (d10v_callback, " %.4x", (int) GPR (i)); - - for (i = 0; i < 2; i++) - (*d10v_callback->printf_filtered) (d10v_callback, " %.2x%.8lx", - ((int)(ACC (i) >> 32) & 0xff), - ((unsigned long) ACC (i)) & 0xffffffff); - - (*d10v_callback->printf_filtered) (d10v_callback, " %d %d %d\n", - PSW_F0 != 0, PSW_F1 != 0, PSW_C != 0); - (*d10v_callback->flush_stdout) (d10v_callback); - break; - } -#endif - case 15: /* new system call trap */ - /* Trap 15 is used for simulating low-level I/O */ - { - unsigned32 result = 0; - errno = 0; - -/* Registers passed to trap 0 */ - -#define FUNC GPR (4) /* function number */ -#define PARM1 GPR (0) /* optional parm 1 */ -#define PARM2 GPR (1) /* optional parm 2 */ -#define PARM3 GPR (2) /* optional parm 3 */ -#define PARM4 GPR (3) /* optional parm 3 */ - -/* Registers set by trap 0 */ - -#define RETVAL(X) do { result = (X); SET_GPR (0, result); } while (0) -#define RETVAL32(X) do { result = (X); SET_GPR (0, result >> 16); SET_GPR (1, result); } while (0) -#define RETERR(X) SET_GPR (4, (X)) /* return error code */ - -/* Turn a pointer in a register into a pointer into real memory. */ - -#define MEMPTR(x) ((char *)(dmem_addr(x))) - - switch (FUNC) - { -#if !defined(__GO32__) && !defined(_WIN32) - case TARGET_SYS_fork: - trace_input ("<fork>", OP_VOID, OP_VOID, OP_VOID); - RETVAL (fork ()); - trace_output_16 (result); - break; - -#define getpid() 47 - case TARGET_SYS_getpid: - trace_input ("<getpid>", OP_VOID, OP_VOID, OP_VOID); - RETVAL (getpid ()); - trace_output_16 (result); - break; - - case TARGET_SYS_kill: - trace_input ("<kill>", OP_R0, OP_R1, OP_VOID); - if (PARM1 == getpid ()) - { - trace_output_void (); - State.exception = PARM2; - } - else - { - int os_sig = -1; - switch (PARM2) - { -#ifdef SIGHUP - case 1: os_sig = SIGHUP; break; -#endif -#ifdef SIGINT - case 2: os_sig = SIGINT; break; -#endif -#ifdef SIGQUIT - case 3: os_sig = SIGQUIT; break; -#endif -#ifdef SIGILL - case 4: os_sig = SIGILL; break; -#endif -#ifdef SIGTRAP - case 5: os_sig = SIGTRAP; break; -#endif -#ifdef SIGABRT - case 6: os_sig = SIGABRT; break; -#elif defined(SIGIOT) - case 6: os_sig = SIGIOT; break; -#endif -#ifdef SIGEMT - case 7: os_sig = SIGEMT; break; -#endif -#ifdef SIGFPE - case 8: os_sig = SIGFPE; break; -#endif -#ifdef SIGKILL - case 9: os_sig = SIGKILL; break; -#endif -#ifdef SIGBUS - case 10: os_sig = SIGBUS; break; -#endif -#ifdef SIGSEGV - case 11: os_sig = SIGSEGV; break; -#endif -#ifdef SIGSYS - case 12: os_sig = SIGSYS; break; -#endif -#ifdef SIGPIPE - case 13: os_sig = SIGPIPE; break; -#endif -#ifdef SIGALRM - case 14: os_sig = SIGALRM; break; -#endif -#ifdef SIGTERM - case 15: os_sig = SIGTERM; break; -#endif -#ifdef SIGURG - case 16: os_sig = SIGURG; break; -#endif -#ifdef SIGSTOP - case 17: os_sig = SIGSTOP; break; -#endif -#ifdef SIGTSTP - case 18: os_sig = SIGTSTP; break; -#endif -#ifdef SIGCONT - case 19: os_sig = SIGCONT; break; -#endif -#ifdef SIGCHLD - case 20: os_sig = SIGCHLD; break; -#elif defined(SIGCLD) - case 20: os_sig = SIGCLD; break; -#endif -#ifdef SIGTTIN - case 21: os_sig = SIGTTIN; break; -#endif -#ifdef SIGTTOU - case 22: os_sig = SIGTTOU; break; -#endif -#ifdef SIGIO - case 23: os_sig = SIGIO; break; -#elif defined (SIGPOLL) - case 23: os_sig = SIGPOLL; break; -#endif -#ifdef SIGXCPU - case 24: os_sig = SIGXCPU; break; -#endif -#ifdef SIGXFSZ - case 25: os_sig = SIGXFSZ; break; -#endif -#ifdef SIGVTALRM - case 26: os_sig = SIGVTALRM; break; -#endif -#ifdef SIGPROF - case 27: os_sig = SIGPROF; break; -#endif -#ifdef SIGWINCH - case 28: os_sig = SIGWINCH; break; -#endif -#ifdef SIGLOST - case 29: os_sig = SIGLOST; break; -#endif -#ifdef SIGUSR1 - case 30: os_sig = SIGUSR1; break; -#endif -#ifdef SIGUSR2 - case 31: os_sig = SIGUSR2; break; -#endif - } - - if (os_sig == -1) - { - trace_output_void (); - (*d10v_callback->printf_filtered) (d10v_callback, "Unknown signal %d\n", PARM2); - (*d10v_callback->flush_stdout) (d10v_callback); - State.exception = SIGILL; - } - else - { - RETVAL (kill (PARM1, PARM2)); - trace_output_16 (result); - } - } - break; - - case TARGET_SYS_execve: - trace_input ("<execve>", OP_R0, OP_R1, OP_R2); - RETVAL (execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2), - (char **)MEMPTR (PARM3))); - trace_output_16 (result); - break; - -#ifdef TARGET_SYS_execv - case TARGET_SYS_execv: - trace_input ("<execv>", OP_R0, OP_R1, OP_VOID); - RETVAL (execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2), NULL)); - trace_output_16 (result); - break; -#endif - - case TARGET_SYS_pipe: - { - reg_t buf; - int host_fd[2]; - - trace_input ("<pipe>", OP_R0, OP_VOID, OP_VOID); - buf = PARM1; - RETVAL (pipe (host_fd)); - SW (buf, host_fd[0]); - buf += sizeof(uint16); - SW (buf, host_fd[1]); - trace_output_16 (result); - } - break; - -#if 0 -#ifdef TARGET_SYS_wait - case TARGET_SYS_wait: - { - int status; - trace_input ("<wait>", OP_R0, OP_VOID, OP_VOID); - RETVAL (wait (&status)); - if (PARM1) - SW (PARM1, status); - trace_output_16 (result); - } - break; -#endif -#endif -#else - case TARGET_SYS_getpid: - trace_input ("<getpid>", OP_VOID, OP_VOID, OP_VOID); - RETVAL (1); - trace_output_16 (result); - break; - - case TARGET_SYS_kill: - trace_input ("<kill>", OP_REG, OP_REG, OP_VOID); - trace_output_void (); - State.exception = PARM2; - break; -#endif - - case TARGET_SYS_read: - trace_input ("<read>", OP_R0, OP_R1, OP_R2); - RETVAL (d10v_callback->read (d10v_callback, PARM1, MEMPTR (PARM2), - PARM3)); - trace_output_16 (result); - break; - - case TARGET_SYS_write: - trace_input ("<write>", OP_R0, OP_R1, OP_R2); - if (PARM1 == 1) - RETVAL ((int)d10v_callback->write_stdout (d10v_callback, - MEMPTR (PARM2), PARM3)); - else - RETVAL ((int)d10v_callback->write (d10v_callback, PARM1, - MEMPTR (PARM2), PARM3)); - trace_output_16 (result); - break; - - case TARGET_SYS_lseek: - trace_input ("<lseek>", OP_R0, OP_R1, OP_R2); - RETVAL32 (d10v_callback->lseek (d10v_callback, PARM1, - ((((unsigned long) PARM2) << 16) - || (unsigned long) PARM3), - PARM4)); - trace_output_32 (result); - break; - - case TARGET_SYS_close: - trace_input ("<close>", OP_R0, OP_VOID, OP_VOID); - RETVAL (d10v_callback->close (d10v_callback, PARM1)); - trace_output_16 (result); - break; - - case TARGET_SYS_open: - trace_input ("<open>", OP_R0, OP_R1, OP_R2); - RETVAL (d10v_callback->open (d10v_callback, MEMPTR (PARM1), PARM2)); - trace_output_16 (result); - break; - - case TARGET_SYS_exit: - trace_input ("<exit>", OP_R0, OP_VOID, OP_VOID); - State.exception = SIG_D10V_EXIT; - trace_output_void (); - break; - - case TARGET_SYS_stat: - trace_input ("<stat>", OP_R0, OP_R1, OP_VOID); - /* stat system call */ - { - struct stat host_stat; - reg_t buf; - - RETVAL (stat (MEMPTR (PARM1), &host_stat)); - - buf = PARM2; - - /* The hard-coded offsets and sizes were determined by using - * the D10V compiler on a test program that used struct stat. - */ - SW (buf, host_stat.st_dev); - SW (buf+2, host_stat.st_ino); - SW (buf+4, host_stat.st_mode); - SW (buf+6, host_stat.st_nlink); - SW (buf+8, host_stat.st_uid); - SW (buf+10, host_stat.st_gid); - SW (buf+12, host_stat.st_rdev); - SLW (buf+16, host_stat.st_size); - SLW (buf+20, host_stat.st_atime); - SLW (buf+28, host_stat.st_mtime); - SLW (buf+36, host_stat.st_ctime); - } - trace_output_16 (result); - break; - - case TARGET_SYS_chown: - trace_input ("<chown>", OP_R0, OP_R1, OP_R2); - RETVAL (chown (MEMPTR (PARM1), PARM2, PARM3)); - trace_output_16 (result); - break; - - case TARGET_SYS_chmod: - trace_input ("<chmod>", OP_R0, OP_R1, OP_R2); - RETVAL (chmod (MEMPTR (PARM1), PARM2)); - trace_output_16 (result); - break; - -#if 0 -#ifdef TARGET_SYS_utime - case TARGET_SYS_utime: - trace_input ("<utime>", OP_R0, OP_R1, OP_R2); - /* Cast the second argument to void *, to avoid type mismatch - if a prototype is present. */ - RETVAL (utime (MEMPTR (PARM1), (void *) MEMPTR (PARM2))); - trace_output_16 (result); - break; -#endif -#endif - -#if 0 -#ifdef TARGET_SYS_time - case TARGET_SYS_time: - trace_input ("<time>", OP_R0, OP_R1, OP_R2); - RETVAL32 (time (PARM1 ? MEMPTR (PARM1) : NULL)); - trace_output_32 (result); - break; -#endif -#endif - - default: - d10v_callback->error (d10v_callback, "Unknown syscall %d", FUNC); - } - if ((uint16) result == (uint16) -1) - RETERR (d10v_callback->get_errno(d10v_callback)); - else - RETERR (0); - break; - } - } -} - -/* tst0i */ -void -OP_7000000 () -{ - trace_input ("tst0i", OP_REG, OP_CONSTANT16, OP_VOID); - SET_PSW_F1 (PSW_F0);; - SET_PSW_F0 ((GPR (OP[0]) & OP[1]) ? 1 : 0); - trace_output_flag (); -} - -/* tst1i */ -void -OP_F000000 () -{ - trace_input ("tst1i", OP_REG, OP_CONSTANT16, OP_VOID); - SET_PSW_F1 (PSW_F0); - SET_PSW_F0 ((~(GPR (OP[0])) & OP[1]) ? 1 : 0); - trace_output_flag (); -} - -/* wait */ -void -OP_5F80 () -{ - trace_input ("wait", OP_VOID, OP_VOID, OP_VOID); - SET_PSW_IE (1); - trace_output_void (); -} - -/* xor */ -void -OP_A00 () -{ - int16 tmp; - trace_input ("xor", OP_REG, OP_REG, OP_VOID); - tmp = (GPR (OP[0]) ^ GPR (OP[1])); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - -/* xor3 */ -void -OP_5000000 () -{ - int16 tmp; - trace_input ("xor3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16); - tmp = (GPR (OP[1]) ^ OP[2]); - SET_GPR (OP[0], tmp); - trace_output_16 (tmp); -} - |