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-rw-r--r--sim/d10v/ChangeLog5
-rw-r--r--sim/d10v/simops.c4
2 files changed, 7 insertions, 2 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index 32381d8..57f9f1a 100644
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,3 +1,8 @@
+Fri Sep 6 17:56:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * simops.c (OP_2600, OP_2601): Changed min and max comparisons
+ to use signed register values.
+
Wed Sep 4 11:35:17 1996 Michael Meissner <meissner@tiktok.cygnus.com>
* d10v_sim.h (DEBUG_*): Add bit flags for controlling debug
diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c
index faf7d7d..dc05f5e 100644
--- a/sim/d10v/simops.c
+++ b/sim/d10v/simops.c
@@ -1223,7 +1223,7 @@ OP_2600 ()
{
trace_input ("max", OP_REG, OP_REG, OP_VOID);
State.F1 = State.F0;
- if (State.regs[OP[1]] > State.regs[OP[0]])
+ if ((int16)State.regs[OP[1]] > (int16)State.regs[OP[0]])
{
State.regs[OP[0]] = State.regs[OP[1]];
State.F0 = 1;
@@ -1275,7 +1275,7 @@ OP_2601 ()
{
trace_input ("min", OP_REG, OP_REG, OP_VOID);
State.F1 = State.F0;
- if (State.regs[OP[1]] < State.regs[OP[0]])
+ if ((int16)State.regs[OP[1]] < (int16)State.regs[OP[0]])
{
State.regs[OP[0]] = State.regs[OP[1]];
State.F0 = 1;