diff options
Diffstat (limited to 'sim/d10v')
| -rw-r--r-- | sim/d10v/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/d10v/simops.c | 22 |
2 files changed, 27 insertions, 0 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index 449e256..f39999d 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,3 +1,8 @@ +1999-11-25 Nick Clifton <nickc@cygnus.com> + + * simops.c (OP_4E0F): New function: Simulate new bit pattern for + cpfg instruction. + Fri Oct 29 18:34:28 1999 Andrew Cagney <cagney@b1.cygnus.com> * simops.c (move_to_cr): Don't allow user to set PSW.DM in either diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c index d80c923..9c1f3f6 100644 --- a/sim/d10v/simops.c +++ b/sim/d10v/simops.c @@ -1087,6 +1087,28 @@ OP_4E09 () trace_output_flag (); } +/* cpfg */ +void +OP_4E0F () +{ + uint8 val; + + trace_input ("cpfg", OP_FLAG_OUTPUT, OP_FLAG, OP_VOID); + + if (OP[1] == 0) + val = PSW_F0; + else if (OP[1] == 1) + val = PSW_F1; + else + val = PSW_C; + if (OP[0] == 0) + SET_PSW_F0 (val); + else + SET_PSW_F1 (val); + + trace_output_flag (); +} + /* dbt */ void OP_5F20 () |