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Diffstat (limited to 'sim/d10v/ChangeLog')
| -rw-r--r-- | sim/d10v/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index 95b2690..9f1b4ac 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,3 +1,8 @@ +Mon Oct 21 16:16:26 1996 Martin M. Hunt <hunt@pizza.cygnus.com> + + * interp.c (sim_resume): Change the way single-stepping and exceptions + are handled so single-stepping works again. + Thu Oct 17 12:24:16 1996 Michael Meissner <meissner@tiktok.cygnus.com> * endian.c: Optimize simulated loads/stores on x86, AIX, and big |