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-rw-r--r--sim/common/ChangeLog13
-rw-r--r--sim/common/cgen-par.c48
-rw-r--r--sim/common/cgen-par.h15
3 files changed, 74 insertions, 2 deletions
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index 1d8bfea..c2d1c8c 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,3 +1,16 @@
+1999-11-04 Dave Brolley <brolley@cygnus.com>
+
+ * cgen-par.h (cgen_write_queue_kind): Add CGEN_FN_XI_WRITE and
+ CGEN_MEM_XI_WRITE members.
+ (CGEN_WRITE_QUEUE_ELEMENT): Add fn_xi_write and mem_xi_write members.
+ (sim_queue_fn_xi_write): New function.
+ (sim_queue_mem_xi_write): New function.
+
+ * cgen-par.c (sim_queue_fn_xi_write): New function.
+ (sim_queue_mem_xi_write): New function.
+ (cgen_write_queue_element_execute): Handle CGEN_FN_XI_WRITE and
+ CGEN_MEM_XI_WRITE.
+
1999-10-22 Dave Brolley <brolley@cygnus.com>
* cgen-par.h (insn_address): New field in CGEN_WRITE_QUEUE_ELEMENT.
diff --git a/sim/common/cgen-par.c b/sim/common/cgen-par.c
index e2af54e..fece2c9 100644
--- a/sim/common/cgen-par.c
+++ b/sim/common/cgen-par.c
@@ -121,6 +121,25 @@ void sim_queue_fn_di_write (
element->kinds.fn_di_write.value = value;
}
+void sim_queue_fn_xi_write (
+ SIM_CPU *cpu,
+ void (*write_function)(SIM_CPU *cpu, UINT, SI *),
+ UINT regno,
+ SI *value
+)
+{
+ CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+ CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+ element->kind = CGEN_FN_XI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
+ element->kinds.fn_xi_write.function = write_function;
+ element->kinds.fn_xi_write.regno = regno;
+ element->kinds.fn_xi_write.value[0] = value[0];
+ element->kinds.fn_xi_write.value[1] = value[1];
+ element->kinds.fn_xi_write.value[2] = value[2];
+ element->kinds.fn_xi_write.value[3] = value[3];
+}
+
void sim_queue_fn_df_write (
SIM_CPU *cpu,
void (*write_function)(SIM_CPU *cpu, UINT, DI),
@@ -201,6 +220,19 @@ void sim_queue_mem_df_write (SIM_CPU *cpu, SI address, DF value)
element->kinds.mem_df_write.value = value;
}
+void sim_queue_mem_xi_write (SIM_CPU *cpu, SI address, SI *value)
+{
+ CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+ CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+ element->kind = CGEN_MEM_XI_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
+ element->kinds.mem_xi_write.address = address;
+ element->kinds.mem_xi_write.value[0] = value[0];
+ element->kinds.mem_xi_write.value[1] = value[1];
+ element->kinds.mem_xi_write.value[2] = value[2];
+ element->kinds.mem_xi_write.value[3] = value[3];
+}
+
/* Execute a write stored on the write queue. */
void
cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
@@ -243,6 +275,11 @@ cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
item->kinds.fn_df_write.regno,
item->kinds.fn_df_write.value);
break;
+ case CGEN_FN_XI_WRITE:
+ item->kinds.fn_xi_write.function (cpu,
+ item->kinds.fn_xi_write.regno,
+ item->kinds.fn_xi_write.value);
+ break;
case CGEN_FN_PC_WRITE:
item->kinds.fn_pc_write.function (cpu, item->kinds.fn_pc_write.value);
break;
@@ -271,6 +308,17 @@ cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
SETMEMDF (cpu, pc, item->kinds.mem_df_write.address,
item->kinds.mem_df_write.value);
break;
+ case CGEN_MEM_XI_WRITE:
+ pc = item->insn_address;
+ SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address,
+ item->kinds.mem_xi_write.value[0]);
+ SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address + 4,
+ item->kinds.mem_xi_write.value[1]);
+ SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address + 8,
+ item->kinds.mem_xi_write.value[2]);
+ SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address + 12,
+ item->kinds.mem_xi_write.value[3]);
+ break;
default:
break; /* FIXME: for now....print message later. */
}
diff --git a/sim/common/cgen-par.h b/sim/common/cgen-par.h
index 9cf5e8c..6771e40 100644
--- a/sim/common/cgen-par.h
+++ b/sim/common/cgen-par.h
@@ -26,9 +26,9 @@ enum cgen_write_queue_kind {
CGEN_BI_WRITE, CGEN_QI_WRITE, CGEN_SI_WRITE, CGEN_SF_WRITE,
CGEN_PC_WRITE,
CGEN_FN_HI_WRITE, CGEN_FN_SI_WRITE, CGEN_FN_DI_WRITE, CGEN_FN_DF_WRITE,
- CGEN_FN_PC_WRITE,
+ CGEN_FN_XI_WRITE, CGEN_FN_PC_WRITE,
CGEN_MEM_QI_WRITE, CGEN_MEM_HI_WRITE, CGEN_MEM_SI_WRITE, CGEN_MEM_DI_WRITE,
- CGEN_MEM_DF_WRITE,
+ CGEN_MEM_DF_WRITE, CGEN_MEM_XI_WRITE,
CGEN_NUM_WRITE_KINDS
};
@@ -77,6 +77,11 @@ typedef struct {
void (*function)(SIM_CPU *, UINT, DI);
} fn_df_write;
struct {
+ UINT regno;
+ SI value[4];
+ void (*function)(SIM_CPU *, UINT, SI *);
+ } fn_xi_write;
+ struct {
USI value;
void (*function)(SIM_CPU *, USI);
} fn_pc_write;
@@ -100,6 +105,10 @@ typedef struct {
SI address;
DI value;
} mem_df_write;
+ struct {
+ SI address;
+ SI value[4];
+ } mem_xi_write;
} kinds;
} CGEN_WRITE_QUEUE_ELEMENT;
@@ -143,6 +152,7 @@ extern void sim_queue_fn_hi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, UHI), UI
extern void sim_queue_fn_si_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, USI), UINT, SI);
extern void sim_queue_fn_di_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DI);
extern void sim_queue_fn_df_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DF);
+extern void sim_queue_fn_xi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, SI *), UINT, SI *);
extern void sim_queue_fn_pc_write (SIM_CPU *, void (*)(SIM_CPU *, USI), USI);
extern void sim_queue_mem_qi_write (SIM_CPU *, SI, QI);
@@ -150,5 +160,6 @@ extern void sim_queue_mem_hi_write (SIM_CPU *, SI, HI);
extern void sim_queue_mem_si_write (SIM_CPU *, SI, SI);
extern void sim_queue_mem_di_write (SIM_CPU *, SI, DI);
extern void sim_queue_mem_df_write (SIM_CPU *, SI, DF);
+extern void sim_queue_mem_xi_write (SIM_CPU *, SI, SI *);
#endif /* CGEN_PAR_H */
generated by cgit v1.1 at 2024-12-23 13:34:36 +0000