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-rw-r--r--sim/bfin/interp.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c
index 1f8681d..f8669d3 100644
--- a/sim/bfin/interp.c
+++ b/sim/bfin/interp.c
@@ -297,6 +297,7 @@ bfin_syscall (SIM_CPU *cpu)
sc.errcode = TARGET_ENOSYS;
else
{
+#ifdef HAVE_PREAD
char *data = xmalloc (sc.arg2);
/* XXX: Should add a cb->pread. */
@@ -306,6 +307,9 @@ bfin_syscall (SIM_CPU *cpu)
sc.errcode = TARGET_EINVAL;
free (data);
+#else
+ sc.errcode = TARGET_ENOSYS;
+#endif
}
if (sc.errcode)
@@ -495,8 +499,13 @@ bfin_syscall (SIM_CPU *cpu)
}
else
{
+#ifdef HAVE_KILL
sc.result = kill (sc.arg1, sc.arg2);
goto sys_finish;
+#else
+ sc.result = -1;
+ sc.errcode = TARGET_ENOSYS;
+#endif
}
break;