diff options
Diffstat (limited to 'sim/Makefile.in')
| -rw-r--r-- | sim/Makefile.in | 334 |
1 files changed, 161 insertions, 173 deletions
diff --git a/sim/Makefile.in b/sim/Makefile.in index 14db403..c2669fd 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -131,111 +131,105 @@ EXTRA_PROGRAMS = $(am__EXEEXT_2) testsuite/common/bits-gen$(EXEEXT) \ @SIM_ENABLE_HW_TRUE@ $(SIM_COMMON_HW_OBJS) \ @SIM_ENABLE_HW_TRUE@ $(SIM_HW_SOCKSER) -@SIM_ENABLE_HW_TRUE@am__append_3 = SIM_HW_DEVICES_="$(SIM_HW_DEVICES)" -@SIM_ENABLE_IGEN_TRUE@am__append_4 = $(IGEN) -@SIM_ENABLE_IGEN_TRUE@am__append_5 = igen/libigen.a +@SIM_ENABLE_IGEN_TRUE@am__append_3 = $(IGEN) +@SIM_ENABLE_IGEN_TRUE@am__append_4 = igen/libigen.a +@SIM_ENABLE_IGEN_TRUE@am__append_5 = $(igen_IGEN_TOOLS) @SIM_ENABLE_IGEN_TRUE@am__append_6 = $(igen_IGEN_TOOLS) -@SIM_ENABLE_IGEN_TRUE@am__append_7 = $(igen_IGEN_TOOLS) TESTS = testsuite/common/bits32m0$(EXEEXT) \ testsuite/common/bits32m31$(EXEEXT) \ testsuite/common/bits64m0$(EXEEXT) \ testsuite/common/bits64m63$(EXEEXT) \ testsuite/common/alu-tst$(EXEEXT) -@SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/libsim.a -@SIM_ENABLE_ARCH_aarch64_TRUE@am__append_9 = aarch64/run -@SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/libsim.a -@SIM_ENABLE_ARCH_arm_TRUE@am__append_11 = arm/run -@SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/libsim.a -@SIM_ENABLE_ARCH_avr_TRUE@am__append_13 = avr/run -@SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/libsim.a -@SIM_ENABLE_ARCH_bfin_TRUE@am__append_15 = bfin/run -@SIM_ENABLE_ARCH_bfin_TRUE@am__append_16 = bfin_SIM_EXTRA_HW_DEVICES="$(bfin_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = bpf/libsim.a -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = bpf/run -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = \ +@SIM_ENABLE_ARCH_aarch64_TRUE@am__append_7 = aarch64/libsim.a +@SIM_ENABLE_ARCH_aarch64_TRUE@am__append_8 = aarch64/run +@SIM_ENABLE_ARCH_arm_TRUE@am__append_9 = arm/libsim.a +@SIM_ENABLE_ARCH_arm_TRUE@am__append_10 = arm/run +@SIM_ENABLE_ARCH_avr_TRUE@am__append_11 = avr/libsim.a +@SIM_ENABLE_ARCH_avr_TRUE@am__append_12 = avr/run +@SIM_ENABLE_ARCH_bfin_TRUE@am__append_13 = bfin/libsim.a +@SIM_ENABLE_ARCH_bfin_TRUE@am__append_14 = bfin/run +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_15 = bpf/libsim.a +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_16 = bpf/run +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_17 = \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_20 = $(bpf_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_bpf_TRUE@am__append_21 = $(bpf_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/libsim.a -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = cr16/run -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = cr16/simops.h +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_18 = $(bpf_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_bpf_TRUE@am__append_19 = $(bpf_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_20 = cr16/libsim.a +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_21 = cr16/run +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_22 = cr16/simops.h +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_23 = $(cr16_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cr16_TRUE@am__append_24 = cr16/gencode @SIM_ENABLE_ARCH_cr16_TRUE@am__append_25 = $(cr16_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_26 = cr16/gencode -@SIM_ENABLE_ARCH_cr16_TRUE@am__append_27 = $(cr16_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris/libsim.a -@SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = cris/run -@SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = cris_SIM_EXTRA_HW_DEVICES="$(cris_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = cris/rvdummy -@SIM_ENABLE_ARCH_cris_TRUE@am__append_32 = \ +@SIM_ENABLE_ARCH_cris_TRUE@am__append_26 = cris/libsim.a +@SIM_ENABLE_ARCH_cris_TRUE@am__append_27 = cris/run +@SIM_ENABLE_ARCH_cris_TRUE@am__append_28 = cris/rvdummy +@SIM_ENABLE_ARCH_cris_TRUE@am__append_29 = \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h -@SIM_ENABLE_ARCH_cris_TRUE@am__append_33 = $(cris_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_cris_TRUE@am__append_34 = $(cris_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = d10v/libsim.a -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/run -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = d10v/simops.h -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_38 = $(d10v_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_39 = d10v/gencode -@SIM_ENABLE_ARCH_d10v_TRUE@am__append_40 = $(d10v_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_erc32_TRUE@am__append_41 = erc32/libsim.a -@SIM_ENABLE_ARCH_erc32_TRUE@am__append_42 = erc32/run erc32/sis -@SIM_ENABLE_ARCH_erc32_TRUE@am__append_43 = sim-%D-install-exec-local -@SIM_ENABLE_ARCH_erc32_TRUE@am__append_44 = sim-erc32-uninstall-local -@SIM_ENABLE_ARCH_examples_TRUE@am__append_45 = example-synacor/libsim.a -@SIM_ENABLE_ARCH_examples_TRUE@am__append_46 = example-synacor/run -@SIM_ENABLE_ARCH_frv_TRUE@am__append_47 = frv/libsim.a -@SIM_ENABLE_ARCH_frv_TRUE@am__append_48 = frv/run -@SIM_ENABLE_ARCH_frv_TRUE@am__append_49 = frv/eng.h -@SIM_ENABLE_ARCH_frv_TRUE@am__append_50 = $(frv_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_frv_TRUE@am__append_51 = $(frv_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_ft32_TRUE@am__append_52 = ft32/libsim.a -@SIM_ENABLE_ARCH_ft32_TRUE@am__append_53 = ft32/run -@SIM_ENABLE_ARCH_h8300_TRUE@am__append_54 = h8300/libsim.a -@SIM_ENABLE_ARCH_h8300_TRUE@am__append_55 = h8300/run -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56 = iq2000/libsim.a -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_57 = iq2000/run -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_58 = iq2000/eng.h -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_59 = $(iq2000_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_60 = $(iq2000_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = lm32/libsim.a -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = lm32/run -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_63 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_64 = lm32/eng.h -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_65 = $(lm32_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_66 = $(lm32_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = m32c/libsim.a -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_68 = m32c/run -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_69 = $(m32c_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_70 = m32c/opc2c -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_71 = \ +@SIM_ENABLE_ARCH_cris_TRUE@am__append_30 = $(cris_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_cris_TRUE@am__append_31 = $(cris_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_32 = d10v/libsim.a +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_33 = d10v/run +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_34 = d10v/simops.h +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_35 = $(d10v_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_36 = d10v/gencode +@SIM_ENABLE_ARCH_d10v_TRUE@am__append_37 = $(d10v_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_erc32_TRUE@am__append_38 = erc32/libsim.a +@SIM_ENABLE_ARCH_erc32_TRUE@am__append_39 = erc32/run erc32/sis +@SIM_ENABLE_ARCH_erc32_TRUE@am__append_40 = sim-%D-install-exec-local +@SIM_ENABLE_ARCH_erc32_TRUE@am__append_41 = sim-erc32-uninstall-local +@SIM_ENABLE_ARCH_examples_TRUE@am__append_42 = example-synacor/libsim.a +@SIM_ENABLE_ARCH_examples_TRUE@am__append_43 = example-synacor/run +@SIM_ENABLE_ARCH_frv_TRUE@am__append_44 = frv/libsim.a +@SIM_ENABLE_ARCH_frv_TRUE@am__append_45 = frv/run +@SIM_ENABLE_ARCH_frv_TRUE@am__append_46 = frv/eng.h +@SIM_ENABLE_ARCH_frv_TRUE@am__append_47 = $(frv_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_frv_TRUE@am__append_48 = $(frv_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_ft32_TRUE@am__append_49 = ft32/libsim.a +@SIM_ENABLE_ARCH_ft32_TRUE@am__append_50 = ft32/run +@SIM_ENABLE_ARCH_h8300_TRUE@am__append_51 = h8300/libsim.a +@SIM_ENABLE_ARCH_h8300_TRUE@am__append_52 = h8300/run +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_53 = iq2000/libsim.a +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_54 = iq2000/run +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_55 = iq2000/eng.h +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_56 = $(iq2000_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_57 = $(iq2000_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_58 = lm32/libsim.a +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_59 = lm32/run +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_60 = lm32/eng.h +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = $(lm32_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = $(lm32_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_63 = m32c/libsim.a +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_64 = m32c/run +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_65 = $(m32c_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_66 = m32c/opc2c +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = \ @SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = m32r/libsim.a -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_73 = m32r/run -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_74 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_75 = \ +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_68 = m32r/libsim.a +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_69 = m32r/run +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_70 = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_76 = $(m32r_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_77 = $(m32r_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = m68hc11/libsim.a -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = m68hc11/run -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_81 = $(m68hc11_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_82 = m68hc11/gencode -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_83 = $(m68hc11_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mcore_TRUE@am__append_84 = mcore/libsim.a -@SIM_ENABLE_ARCH_mcore_TRUE@am__append_85 = mcore/run -@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_86 = microblaze/libsim.a -@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_87 = microblaze/run -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_88 = \ +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_71 = $(m32r_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = $(m32r_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_73 = m68hc11/libsim.a +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_74 = m68hc11/run +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_75 = $(m68hc11_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_76 = m68hc11/gencode +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_77 = $(m68hc11_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mcore_TRUE@am__append_78 = mcore/libsim.a +@SIM_ENABLE_ARCH_mcore_TRUE@am__append_79 = mcore/run +@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_80 = microblaze/libsim.a +@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_81 = microblaze/run +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_82 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/support.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/itable.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/semantics.o \ @@ -244,7 +238,7 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/engine.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/irun.o -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_89 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_83 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \ @@ -258,38 +252,36 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_90 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_84 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_OBJ) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/itable.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/multi-run.o -@SIM_ENABLE_ARCH_mips_TRUE@am__append_91 = mips/libsim.a -@SIM_ENABLE_ARCH_mips_TRUE@am__append_92 = mips/run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_93 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_mips_TRUE@am__append_94 = mips/itable.h \ +@SIM_ENABLE_ARCH_mips_TRUE@am__append_85 = mips/libsim.a +@SIM_ENABLE_ARCH_mips_TRUE@am__append_86 = mips/run +@SIM_ENABLE_ARCH_mips_TRUE@am__append_87 = mips/itable.h \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC) -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_95 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_88 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_96 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_89 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32 -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_97 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_90 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_98 = $(mips_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mips_TRUE@am__append_99 = $(mips_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mips_TRUE@am__append_100 = mips/multi-include.h mips/multi-run.c -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_101 = mn10300/libsim.a -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_102 = mn10300/run -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_103 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_104 = \ +@SIM_ENABLE_ARCH_mips_TRUE@am__append_91 = $(mips_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mips_TRUE@am__append_92 = $(mips_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mips_TRUE@am__append_93 = mips/multi-include.h mips/multi-run.c +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_94 = mn10300/libsim.a +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_95 = mn10300/run +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_96 = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \ @@ -298,38 +290,38 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_105 = $(mn10300_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_106 = $(mn10300_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_moxie_TRUE@am__append_107 = moxie/libsim.a -@SIM_ENABLE_ARCH_moxie_TRUE@am__append_108 = moxie/run -@SIM_ENABLE_ARCH_msp430_TRUE@am__append_109 = msp430/libsim.a -@SIM_ENABLE_ARCH_msp430_TRUE@am__append_110 = msp430/run -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_111 = or1k/libsim.a -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_112 = or1k/run -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_113 = or1k/eng.h -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_114 = $(or1k_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_115 = $(or1k_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_ppc_TRUE@am__append_116 = ppc/run ppc/psim -@SIM_ENABLE_ARCH_pru_TRUE@am__append_117 = pru/libsim.a -@SIM_ENABLE_ARCH_pru_TRUE@am__append_118 = pru/run -@SIM_ENABLE_ARCH_riscv_TRUE@am__append_119 = riscv/libsim.a -@SIM_ENABLE_ARCH_riscv_TRUE@am__append_120 = riscv/run -@SIM_ENABLE_ARCH_rl78_TRUE@am__append_121 = rl78/libsim.a -@SIM_ENABLE_ARCH_rl78_TRUE@am__append_122 = rl78/run -@SIM_ENABLE_ARCH_rx_TRUE@am__append_123 = rx/libsim.a -@SIM_ENABLE_ARCH_rx_TRUE@am__append_124 = rx/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_125 = sh/libsim.a -@SIM_ENABLE_ARCH_sh_TRUE@am__append_126 = sh/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_127 = \ +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_97 = $(mn10300_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_98 = $(mn10300_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_moxie_TRUE@am__append_99 = moxie/libsim.a +@SIM_ENABLE_ARCH_moxie_TRUE@am__append_100 = moxie/run +@SIM_ENABLE_ARCH_msp430_TRUE@am__append_101 = msp430/libsim.a +@SIM_ENABLE_ARCH_msp430_TRUE@am__append_102 = msp430/run +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_103 = or1k/libsim.a +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_104 = or1k/run +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_105 = or1k/eng.h +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_106 = $(or1k_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_107 = $(or1k_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_ppc_TRUE@am__append_108 = ppc/run ppc/psim +@SIM_ENABLE_ARCH_pru_TRUE@am__append_109 = pru/libsim.a +@SIM_ENABLE_ARCH_pru_TRUE@am__append_110 = pru/run +@SIM_ENABLE_ARCH_riscv_TRUE@am__append_111 = riscv/libsim.a +@SIM_ENABLE_ARCH_riscv_TRUE@am__append_112 = riscv/run +@SIM_ENABLE_ARCH_rl78_TRUE@am__append_113 = rl78/libsim.a +@SIM_ENABLE_ARCH_rl78_TRUE@am__append_114 = rl78/run +@SIM_ENABLE_ARCH_rx_TRUE@am__append_115 = rx/libsim.a +@SIM_ENABLE_ARCH_rx_TRUE@am__append_116 = rx/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_117 = sh/libsim.a +@SIM_ENABLE_ARCH_sh_TRUE@am__append_118 = sh/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_119 = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c -@SIM_ENABLE_ARCH_sh_TRUE@am__append_128 = $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_sh_TRUE@am__append_129 = sh/gencode -@SIM_ENABLE_ARCH_sh_TRUE@am__append_130 = $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_v850_TRUE@am__append_131 = v850/libsim.a -@SIM_ENABLE_ARCH_v850_TRUE@am__append_132 = v850/run -@SIM_ENABLE_ARCH_v850_TRUE@am__append_133 = \ +@SIM_ENABLE_ARCH_sh_TRUE@am__append_120 = $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_sh_TRUE@am__append_121 = sh/gencode +@SIM_ENABLE_ARCH_sh_TRUE@am__append_122 = $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_123 = v850/libsim.a +@SIM_ENABLE_ARCH_v850_TRUE@am__append_124 = v850/run +@SIM_ENABLE_ARCH_v850_TRUE@am__append_125 = \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \ @@ -338,8 +330,8 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h -@SIM_ENABLE_ARCH_v850_TRUE@am__append_134 = $(v850_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_v850_TRUE@am__append_135 = $(v850_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_126 = $(v850_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_127 = $(v850_BUILD_OUTPUTS) subdir = . ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \ @@ -716,8 +708,8 @@ am__DEPENDENCIES_1 = @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/itable.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/multi-run.o -@SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_88) \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_89) \ +@SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_82) \ +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_83) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__DEPENDENCIES_2) @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_mips_TRUE@ $(common_libcommon_a_OBJECTS) \ @@ -1746,43 +1738,39 @@ GNULIB_PARENT_DIR = .. srccom = $(srcdir)/common srcroot = $(srcdir)/.. SUBDIRS = @subdirs@ -AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \ - $(am__append_3) $(am__append_16) $(am__append_30) \ - $(am__append_63) $(am__append_74) $(am__append_80) \ - $(am__append_93) $(am__append_103) pkginclude_HEADERS = $(am__append_1) -noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \ - $(am__append_10) $(am__append_12) $(am__append_14) \ - $(am__append_17) $(am__append_22) $(am__append_28) \ - $(am__append_35) $(am__append_41) $(am__append_45) \ - $(am__append_47) $(am__append_52) $(am__append_54) \ - $(am__append_56) $(am__append_61) $(am__append_67) \ - $(am__append_72) $(am__append_78) $(am__append_84) \ - $(am__append_86) $(am__append_91) $(am__append_101) \ - $(am__append_107) $(am__append_109) $(am__append_111) \ - $(am__append_117) $(am__append_119) $(am__append_121) \ - $(am__append_123) $(am__append_125) $(am__append_131) -BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \ - $(am__append_37) $(am__append_49) $(am__append_58) \ - $(am__append_64) $(am__append_75) $(am__append_94) \ - $(am__append_104) $(am__append_113) $(am__append_127) \ - $(am__append_133) +noinst_LIBRARIES = common/libcommon.a $(am__append_4) $(am__append_7) \ + $(am__append_9) $(am__append_11) $(am__append_13) \ + $(am__append_15) $(am__append_20) $(am__append_26) \ + $(am__append_32) $(am__append_38) $(am__append_42) \ + $(am__append_44) $(am__append_49) $(am__append_51) \ + $(am__append_53) $(am__append_58) $(am__append_63) \ + $(am__append_68) $(am__append_73) $(am__append_78) \ + $(am__append_80) $(am__append_85) $(am__append_94) \ + $(am__append_99) $(am__append_101) $(am__append_103) \ + $(am__append_109) $(am__append_111) $(am__append_113) \ + $(am__append_115) $(am__append_117) $(am__append_123) +BUILT_SOURCES = $(am__append_17) $(am__append_22) $(am__append_29) \ + $(am__append_34) $(am__append_46) $(am__append_55) \ + $(am__append_60) $(am__append_70) $(am__append_87) \ + $(am__append_96) $(am__append_105) $(am__append_119) \ + $(am__append_125) CLEANFILES = common/version.c common/version.c-stamp \ testsuite/common/bits-gen testsuite/common/bits32m0.c \ testsuite/common/bits32m31.c testsuite/common/bits64m0.c \ testsuite/common/bits64m63.c -DISTCLEANFILES = $(am__append_100) +DISTCLEANFILES = $(am__append_93) MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \ $(common_HW_CONFIG_H_TARGETS) $(patsubst \ %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \ $(common_GEN_MODULES_C_TARGETS) $(patsubst \ - %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \ - site-sim-config.exp testrun.log testrun.sum $(am__append_21) \ - $(am__append_27) $(am__append_34) $(am__append_40) \ - $(am__append_51) $(am__append_60) $(am__append_66) \ - $(am__append_71) $(am__append_77) $(am__append_83) \ - $(am__append_99) $(am__append_106) $(am__append_115) \ - $(am__append_130) $(am__append_135) + %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_6) \ + site-sim-config.exp testrun.log testrun.sum $(am__append_19) \ + $(am__append_25) $(am__append_31) $(am__append_37) \ + $(am__append_48) $(am__append_57) $(am__append_62) \ + $(am__append_67) $(am__append_72) $(am__append_77) \ + $(am__append_92) $(am__append_98) $(am__append_107) \ + $(am__append_122) $(am__append_127) AM_CFLAGS = \ $(WERROR_CFLAGS) \ $(WARN_CFLAGS) \ @@ -1799,15 +1787,15 @@ COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUIL LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@ SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \ $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \ - $(am__append_4) $(am__append_20) $(am__append_25) \ - $(am__append_33) $(am__append_38) $(am__append_50) \ - $(am__append_59) $(am__append_65) $(am__append_69) \ - $(am__append_76) $(am__append_81) $(am__append_98) \ - $(am__append_105) $(am__append_114) $(am__append_128) \ - $(am__append_134) + $(am__append_3) $(am__append_18) $(am__append_23) \ + $(am__append_30) $(am__append_35) $(am__append_47) \ + $(am__append_56) $(am__append_61) $(am__append_65) \ + $(am__append_71) $(am__append_75) $(am__append_91) \ + $(am__append_97) $(am__append_106) $(am__append_120) \ + $(am__append_126) SIM_INSTALL_DATA_LOCAL_DEPS = -SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43) -SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44) +SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_40) +SIM_UNINSTALL_LOCAL_DEPS = $(am__append_41) SIM_DEPBASE = $(@D)/$(DEPDIR)/$(@F:.o=) SIM_COMPILE = \ $(AM_V_CC)$(COMPILE) -MT $@ -MD -MP -MF $(SIM_DEPBASE).Tpo -c -o $@ $< && \ @@ -2579,8 +2567,8 @@ testsuite_common_CPPFLAGS = \ @SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \ @SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@ -@SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_88) \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_89) $(am__append_90) +@SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_82) \ +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_83) $(am__append_84) @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES = @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_mips_TRUE@ $(common_libcommon_a_OBJECTS) \ @@ -2649,8 +2637,8 @@ testsuite_common_CPPFLAGS = \ @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_95) $(am__append_96) \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_97) +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_88) $(am__append_89) \ +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_90) @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \ |