aboutsummaryrefslogtreecommitdiff
path: root/opcodes
diff options
context:
space:
mode:
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/m32r-opc.c4
2 files changed, 8 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index faa1c61..380ed30 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+start-sanitize-m32rx
+Thu Apr 2 16:44:23 1998 Nick Clifton <nickc@cygnus.com>
+
+ * m32r-opc.c: Fix bit patterns for SAT and SATB.
+
+end-sanitize-m32rx
Wed Apr 1 16:20:27 1998 Ian Dall <Ian.Dall@dsto.defence.gov.au>
* ns32k-dis.c (bit_extract_simple): New function to extract bits
diff --git a/opcodes/m32r-opc.c b/opcodes/m32r-opc.c
index 5c0294e..a48e73c 100644
--- a/opcodes/m32r-opc.c
+++ b/opcodes/m32r-opc.c
@@ -2420,7 +2420,7 @@ const CGEN_INSN m32r_cgen_insn_table_entries[MAX_INSNS] =
{ 1, 1, 1, 1 },
"satb", "satb",
{ MNEM, ' ', OP (DR), ',', OP (SR), 0 },
- { 32, 32, 0xf0f0ffff }, 0x80600100,
+ { 32, 32, 0xf0f0ffff }, 0x80600300,
& fmt_74_satb_ops[0],
{ CGEN_INSN_NBOOL_ATTRS, 0, { (1<<MACH_M32RX), PIPE_NONE } }
},
@@ -2442,7 +2442,7 @@ const CGEN_INSN m32r_cgen_insn_table_entries[MAX_INSNS] =
{ 1, 1, 1, 1 },
"sat", "sat",
{ MNEM, ' ', OP (DR), ',', OP (SR), 0 },
- { 32, 32, 0xf0f0ffff }, 0x80000000,
+ { 32, 32, 0xf0f0ffff }, 0x80600000,
& fmt_75_sat_ops[0],
{ CGEN_INSN_NBOOL_ATTRS, 0, { (1<<MACH_M32RX), PIPE_NONE } }
},