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-rw-r--r--opcodes/ChangeLog99
-rw-r--r--opcodes/cgen.sh26
-rw-r--r--opcodes/epiphany-asm.c1
-rw-r--r--opcodes/epiphany-desc.c1
-rw-r--r--opcodes/epiphany-desc.h1
-rw-r--r--opcodes/epiphany-dis.c1
-rw-r--r--opcodes/epiphany-ibld.c1
-rw-r--r--opcodes/epiphany-opc.c1
-rw-r--r--opcodes/epiphany-opc.h1
-rw-r--r--opcodes/fr30-asm.c1
-rw-r--r--opcodes/fr30-desc.c1
-rw-r--r--opcodes/fr30-desc.h1
-rw-r--r--opcodes/fr30-dis.c1
-rw-r--r--opcodes/fr30-ibld.c1
-rw-r--r--opcodes/fr30-opc.c1
-rw-r--r--opcodes/fr30-opc.h1
-rw-r--r--opcodes/frv-asm.c1
-rw-r--r--opcodes/frv-desc.c1
-rw-r--r--opcodes/frv-desc.h1
-rw-r--r--opcodes/frv-dis.c1
-rw-r--r--opcodes/frv-ibld.c1
-rw-r--r--opcodes/frv-opc.c1
-rw-r--r--opcodes/frv-opc.h1
-rw-r--r--opcodes/ip2k-asm.c1
-rw-r--r--opcodes/ip2k-desc.c1
-rw-r--r--opcodes/ip2k-desc.h1
-rw-r--r--opcodes/ip2k-dis.c1
-rw-r--r--opcodes/ip2k-ibld.c1
-rw-r--r--opcodes/ip2k-opc.c1
-rw-r--r--opcodes/ip2k-opc.h1
-rw-r--r--opcodes/iq2000-asm.c1
-rw-r--r--opcodes/iq2000-desc.c1
-rw-r--r--opcodes/iq2000-desc.h1
-rw-r--r--opcodes/iq2000-dis.c1
-rw-r--r--opcodes/iq2000-ibld.c1
-rw-r--r--opcodes/iq2000-opc.c1
-rw-r--r--opcodes/iq2000-opc.h1
-rw-r--r--opcodes/lm32-asm.c1
-rw-r--r--opcodes/lm32-desc.c1
-rw-r--r--opcodes/lm32-desc.h1
-rw-r--r--opcodes/lm32-dis.c1
-rw-r--r--opcodes/lm32-ibld.c1
-rw-r--r--opcodes/lm32-opc.c1
-rw-r--r--opcodes/lm32-opc.h1
-rw-r--r--opcodes/lm32-opinst.c1
-rw-r--r--opcodes/m32c-asm.c1
-rw-r--r--opcodes/m32c-desc.c1
-rw-r--r--opcodes/m32c-desc.h1
-rw-r--r--opcodes/m32c-dis.c1
-rw-r--r--opcodes/m32c-ibld.c1
-rw-r--r--opcodes/m32c-opc.c1
-rw-r--r--opcodes/m32c-opc.h1
-rw-r--r--opcodes/m32r-asm.c1
-rw-r--r--opcodes/m32r-desc.c1
-rw-r--r--opcodes/m32r-desc.h1
-rw-r--r--opcodes/m32r-dis.c1
-rw-r--r--opcodes/m32r-ibld.c1
-rw-r--r--opcodes/m32r-opc.c1
-rw-r--r--opcodes/m32r-opc.h1
-rw-r--r--opcodes/m32r-opinst.c1
-rw-r--r--opcodes/mep-asm.c1
-rw-r--r--opcodes/mep-desc.c1
-rw-r--r--opcodes/mep-desc.h1
-rw-r--r--opcodes/mep-dis.c1
-rw-r--r--opcodes/mep-ibld.c1
-rw-r--r--opcodes/mep-opc.c1
-rw-r--r--opcodes/mep-opc.h1
-rw-r--r--opcodes/mt-asm.c1
-rw-r--r--opcodes/mt-desc.c1
-rw-r--r--opcodes/mt-desc.h1
-rw-r--r--opcodes/mt-dis.c1
-rw-r--r--opcodes/mt-ibld.c1
-rw-r--r--opcodes/mt-opc.c1
-rw-r--r--opcodes/mt-opc.h1
-rw-r--r--opcodes/or1k-asm.c1
-rw-r--r--opcodes/or1k-desc.c1
-rw-r--r--opcodes/or1k-desc.h1
-rw-r--r--opcodes/or1k-dis.c1
-rw-r--r--opcodes/or1k-ibld.c1
-rw-r--r--opcodes/or1k-opc.c1
-rw-r--r--opcodes/or1k-opc.h1
-rw-r--r--opcodes/or1k-opinst.c1
-rw-r--r--opcodes/xc16x-asm.c1
-rw-r--r--opcodes/xc16x-desc.c1
-rw-r--r--opcodes/xc16x-desc.h1
-rw-r--r--opcodes/xc16x-dis.c1
-rw-r--r--opcodes/xc16x-ibld.c1
-rw-r--r--opcodes/xc16x-opc.c1
-rw-r--r--opcodes/xc16x-opc.h1
-rw-r--r--opcodes/xstormy16-asm.c1
-rw-r--r--opcodes/xstormy16-desc.c1
-rw-r--r--opcodes/xstormy16-desc.h1
-rw-r--r--opcodes/xstormy16-dis.c1
-rw-r--r--opcodes/xstormy16-ibld.c1
-rw-r--r--opcodes/xstormy16-opc.c1
-rw-r--r--opcodes/xstormy16-opc.h1
96 files changed, 211 insertions, 8 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9addcce..e6e4fa1 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,102 @@
+2017-07-11 Yao Qi <yao.qi@linaro.org>
+ Alan Modra <amodra@gmail.com>
+
+ * cgen.sh: Mark generated files read-only.
+ * epiphany-asm.c: Regenerate.
+ * epiphany-desc.c: Regenerate.
+ * epiphany-desc.h: Regenerate.
+ * epiphany-dis.c: Regenerate.
+ * epiphany-ibld.c: Regenerate.
+ * epiphany-opc.c: Regenerate.
+ * epiphany-opc.h: Regenerate.
+ * fr30-asm.c: Regenerate.
+ * fr30-desc.c: Regenerate.
+ * fr30-desc.h: Regenerate.
+ * fr30-dis.c: Regenerate.
+ * fr30-ibld.c: Regenerate.
+ * fr30-opc.c: Regenerate.
+ * fr30-opc.h: Regenerate.
+ * frv-asm.c: Regenerate.
+ * frv-desc.c: Regenerate.
+ * frv-desc.h: Regenerate.
+ * frv-dis.c: Regenerate.
+ * frv-ibld.c: Regenerate.
+ * frv-opc.c: Regenerate.
+ * frv-opc.h: Regenerate.
+ * ip2k-asm.c: Regenerate.
+ * ip2k-desc.c: Regenerate.
+ * ip2k-desc.h: Regenerate.
+ * ip2k-dis.c: Regenerate.
+ * ip2k-ibld.c: Regenerate.
+ * ip2k-opc.c: Regenerate.
+ * ip2k-opc.h: Regenerate.
+ * iq2000-asm.c: Regenerate.
+ * iq2000-desc.c: Regenerate.
+ * iq2000-desc.h: Regenerate.
+ * iq2000-dis.c: Regenerate.
+ * iq2000-ibld.c: Regenerate.
+ * iq2000-opc.c: Regenerate.
+ * iq2000-opc.h: Regenerate.
+ * lm32-asm.c: Regenerate.
+ * lm32-desc.c: Regenerate.
+ * lm32-desc.h: Regenerate.
+ * lm32-dis.c: Regenerate.
+ * lm32-ibld.c: Regenerate.
+ * lm32-opc.c: Regenerate.
+ * lm32-opc.h: Regenerate.
+ * lm32-opinst.c: Regenerate.
+ * m32c-asm.c: Regenerate.
+ * m32c-desc.c: Regenerate.
+ * m32c-desc.h: Regenerate.
+ * m32c-dis.c: Regenerate.
+ * m32c-ibld.c: Regenerate.
+ * m32c-opc.c: Regenerate.
+ * m32c-opc.h: Regenerate.
+ * m32r-asm.c: Regenerate.
+ * m32r-desc.c: Regenerate.
+ * m32r-desc.h: Regenerate.
+ * m32r-dis.c: Regenerate.
+ * m32r-ibld.c: Regenerate.
+ * m32r-opc.c: Regenerate.
+ * m32r-opc.h: Regenerate.
+ * m32r-opinst.c: Regenerate.
+ * mep-asm.c: Regenerate.
+ * mep-desc.c: Regenerate.
+ * mep-desc.h: Regenerate.
+ * mep-dis.c: Regenerate.
+ * mep-ibld.c: Regenerate.
+ * mep-opc.c: Regenerate.
+ * mep-opc.h: Regenerate.
+ * mt-asm.c: Regenerate.
+ * mt-desc.c: Regenerate.
+ * mt-desc.h: Regenerate.
+ * mt-dis.c: Regenerate.
+ * mt-ibld.c: Regenerate.
+ * mt-opc.c: Regenerate.
+ * mt-opc.h: Regenerate.
+ * or1k-asm.c: Regenerate.
+ * or1k-desc.c: Regenerate.
+ * or1k-desc.h: Regenerate.
+ * or1k-dis.c: Regenerate.
+ * or1k-ibld.c: Regenerate.
+ * or1k-opc.c: Regenerate.
+ * or1k-opc.h: Regenerate.
+ * or1k-opinst.c: Regenerate.
+ * xc16x-asm.c: Regenerate.
+ * xc16x-desc.c: Regenerate.
+ * xc16x-desc.h: Regenerate.
+ * xc16x-dis.c: Regenerate.
+ * xc16x-ibld.c: Regenerate.
+ * xc16x-opc.c: Regenerate.
+ * xc16x-opc.h: Regenerate.
+ * xstormy16-asm.c: Regenerate.
+ * xstormy16-desc.c: Regenerate.
+ * xstormy16-desc.h: Regenerate.
+ * xstormy16-dis.c: Regenerate.
+ * xstormy16-ibld.c: Regenerate.
+ * xstormy16-opc.c: Regenerate.
+ * xstormy16-opc.h: Regenerate.
+
2017-07-07 Alan Modra <amodra@gmail.com>
* cgen-dis.in: Include disassemble.h, not dis-asm.h.
diff --git a/opcodes/cgen.sh b/opcodes/cgen.sh
index 637cf89..fdd5b32 100644
--- a/opcodes/cgen.sh
+++ b/opcodes/cgen.sh
@@ -82,6 +82,8 @@ do
esac
done
+header="/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */"
+
case $action in
opcodes)
# Remove residual working files.
@@ -113,27 +115,32 @@ opcodes)
${extrafile_args}
# Customise generated files for the particular architecture.
- sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ sed -e "1i$header" \
+ -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e 's/[ ][ ]*$//' < ${tmp}-desc.h1 > ${tmp}-desc.h
${rootdir}/move-if-change ${tmp}-desc.h ${srcdir}/${prefix}-desc.h
- sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ sed -e "1i$header" \
+ -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
< ${tmp}-desc.c1 > ${tmp}-desc.c
${rootdir}/move-if-change ${tmp}-desc.c ${srcdir}/${prefix}-desc.c
- sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ sed -e "1i$header" \
+ -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e 's/[ ][ ]*$//' < ${tmp}-opc.h1 > ${tmp}-opc.h
${rootdir}/move-if-change ${tmp}-opc.h ${srcdir}/${prefix}-opc.h
- sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ sed -e "1i$header" \
+ -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
< ${tmp}-opc.c1 > ${tmp}-opc.c
${rootdir}/move-if-change ${tmp}-opc.c ${srcdir}/${prefix}-opc.c
case $extrafiles in
*opinst*)
- sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ sed -e "1i$header" \
+ -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
< ${tmp}-opinst.c1 >${tmp}-opinst.c
${rootdir}/move-if-change ${tmp}-opinst.c ${srcdir}/${prefix}-opinst.c
@@ -141,18 +148,21 @@ opcodes)
esac
cat ${srcdir}/cgen-ibld.in ${tmp}-ibld.in1 | \
- sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ sed -e "1i$header" \
+ -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' > ${tmp}-ibld.c
${rootdir}/move-if-change ${tmp}-ibld.c ${srcdir}/${prefix}-ibld.c
sed -e "/ -- assembler routines/ r ${tmp}-asm.in1" ${srcdir}/cgen-asm.in \
- | sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ | sed -e "1i$header" \
+ -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
> ${tmp}-asm.c
${rootdir}/move-if-change ${tmp}-asm.c ${srcdir}/${prefix}-asm.c
sed -e "/ -- disassembler routines/ r ${tmp}-dis.in1" ${srcdir}/cgen-dis.in \
- | sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ | sed -e "1i$header" \
+ -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
-e "s/@prefix@/${prefix}/" -e 's/[ ][ ]*$//' \
> ${tmp}-dis.c
${rootdir}/move-if-change ${tmp}-dis.c ${srcdir}/${prefix}-dis.c
diff --git a/opcodes/epiphany-asm.c b/opcodes/epiphany-asm.c
index edc6730..cfb94db 100644
--- a/opcodes/epiphany-asm.c
+++ b/opcodes/epiphany-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/epiphany-desc.c b/opcodes/epiphany-desc.c
index babe8d1..8b8c357 100644
--- a/opcodes/epiphany-desc.c
+++ b/opcodes/epiphany-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for epiphany.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/epiphany-desc.h b/opcodes/epiphany-desc.h
index 55334d6..86ad453 100644
--- a/opcodes/epiphany-desc.h
+++ b/opcodes/epiphany-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for epiphany.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/epiphany-dis.c b/opcodes/epiphany-dis.c
index 90458dd..f55a284 100644
--- a/opcodes/epiphany-dis.c
+++ b/opcodes/epiphany-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/epiphany-ibld.c b/opcodes/epiphany-ibld.c
index cfd3e53..dc2ecff 100644
--- a/opcodes/epiphany-ibld.c
+++ b/opcodes/epiphany-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for epiphany. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/epiphany-opc.c b/opcodes/epiphany-opc.c
index e7efa58..8a23448 100644
--- a/opcodes/epiphany-opc.c
+++ b/opcodes/epiphany-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for epiphany.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/epiphany-opc.h b/opcodes/epiphany-opc.h
index fee8047..9b87bee 100644
--- a/opcodes/epiphany-opc.h
+++ b/opcodes/epiphany-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for epiphany.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/fr30-asm.c b/opcodes/fr30-asm.c
index 37f73f0..f976a00 100644
--- a/opcodes/fr30-asm.c
+++ b/opcodes/fr30-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/fr30-desc.c b/opcodes/fr30-desc.c
index 6c013d9..95a5a50 100644
--- a/opcodes/fr30-desc.c
+++ b/opcodes/fr30-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for fr30.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/fr30-desc.h b/opcodes/fr30-desc.h
index 1610643..11771d8 100644
--- a/opcodes/fr30-desc.h
+++ b/opcodes/fr30-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for fr30.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c
index 70ad479..2fe1c1d 100644
--- a/opcodes/fr30-dis.c
+++ b/opcodes/fr30-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/fr30-ibld.c b/opcodes/fr30-ibld.c
index b6f1fa1..985719a 100644
--- a/opcodes/fr30-ibld.c
+++ b/opcodes/fr30-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for fr30. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/fr30-opc.c b/opcodes/fr30-opc.c
index a3e67e6..683dbc4 100644
--- a/opcodes/fr30-opc.c
+++ b/opcodes/fr30-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for fr30.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/fr30-opc.h b/opcodes/fr30-opc.h
index 04f3168..298a8a9 100644
--- a/opcodes/fr30-opc.h
+++ b/opcodes/fr30-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for fr30.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/frv-asm.c b/opcodes/frv-asm.c
index 5cbb63f..086fe82 100644
--- a/opcodes/frv-asm.c
+++ b/opcodes/frv-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/frv-desc.c b/opcodes/frv-desc.c
index 8f63cb1..e613717 100644
--- a/opcodes/frv-desc.c
+++ b/opcodes/frv-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for frv.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/frv-desc.h b/opcodes/frv-desc.h
index 831d82f..a9900be 100644
--- a/opcodes/frv-desc.h
+++ b/opcodes/frv-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for frv.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c
index 60b8f3f..1cb85f4 100644
--- a/opcodes/frv-dis.c
+++ b/opcodes/frv-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/frv-ibld.c b/opcodes/frv-ibld.c
index c124971..98f2f34 100644
--- a/opcodes/frv-ibld.c
+++ b/opcodes/frv-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for frv. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/frv-opc.c b/opcodes/frv-opc.c
index e1d214e..2a465bf 100644
--- a/opcodes/frv-opc.c
+++ b/opcodes/frv-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for frv.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/frv-opc.h b/opcodes/frv-opc.h
index dc33159..308f579 100644
--- a/opcodes/frv-opc.h
+++ b/opcodes/frv-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for frv.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/ip2k-asm.c b/opcodes/ip2k-asm.c
index 812f923..6552bce 100644
--- a/opcodes/ip2k-asm.c
+++ b/opcodes/ip2k-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/ip2k-desc.c b/opcodes/ip2k-desc.c
index 75f2363..ae8c8da 100644
--- a/opcodes/ip2k-desc.c
+++ b/opcodes/ip2k-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for ip2k.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/ip2k-desc.h b/opcodes/ip2k-desc.h
index 62dc923..b25fa6b 100644
--- a/opcodes/ip2k-desc.h
+++ b/opcodes/ip2k-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for ip2k.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c
index e6008bd..e1b451e 100644
--- a/opcodes/ip2k-dis.c
+++ b/opcodes/ip2k-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/ip2k-ibld.c b/opcodes/ip2k-ibld.c
index 1a81f34..53d1391 100644
--- a/opcodes/ip2k-ibld.c
+++ b/opcodes/ip2k-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for ip2k. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/ip2k-opc.c b/opcodes/ip2k-opc.c
index 3bbaa54..789e986 100644
--- a/opcodes/ip2k-opc.c
+++ b/opcodes/ip2k-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for ip2k.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/ip2k-opc.h b/opcodes/ip2k-opc.h
index 4443f97..3e6d742 100644
--- a/opcodes/ip2k-opc.h
+++ b/opcodes/ip2k-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for ip2k.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c
index 4bc6670..9139dd5 100644
--- a/opcodes/iq2000-asm.c
+++ b/opcodes/iq2000-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/iq2000-desc.c b/opcodes/iq2000-desc.c
index 5921c05..6f66ec0 100644
--- a/opcodes/iq2000-desc.c
+++ b/opcodes/iq2000-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for iq2000.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/iq2000-desc.h b/opcodes/iq2000-desc.h
index 5238651..14f77fd 100644
--- a/opcodes/iq2000-desc.h
+++ b/opcodes/iq2000-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for iq2000.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c
index 1d55187..f81141c 100644
--- a/opcodes/iq2000-dis.c
+++ b/opcodes/iq2000-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/iq2000-ibld.c b/opcodes/iq2000-ibld.c
index 2c2d3ee..7e2cb6e 100644
--- a/opcodes/iq2000-ibld.c
+++ b/opcodes/iq2000-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for iq2000. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/iq2000-opc.c b/opcodes/iq2000-opc.c
index 6a78d91..5e8924c 100644
--- a/opcodes/iq2000-opc.c
+++ b/opcodes/iq2000-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for iq2000.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/iq2000-opc.h b/opcodes/iq2000-opc.h
index 5e2eff4..28ae5a2 100644
--- a/opcodes/iq2000-opc.h
+++ b/opcodes/iq2000-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for iq2000.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/lm32-asm.c b/opcodes/lm32-asm.c
index 6f4c399..9a37c8d 100644
--- a/opcodes/lm32-asm.c
+++ b/opcodes/lm32-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/lm32-desc.c b/opcodes/lm32-desc.c
index 1b3e565..3f9f9c7 100644
--- a/opcodes/lm32-desc.c
+++ b/opcodes/lm32-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for lm32.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/lm32-desc.h b/opcodes/lm32-desc.h
index ce2e075..2d9a7d8 100644
--- a/opcodes/lm32-desc.h
+++ b/opcodes/lm32-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for lm32.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/lm32-dis.c b/opcodes/lm32-dis.c
index 8238993..ce65676 100644
--- a/opcodes/lm32-dis.c
+++ b/opcodes/lm32-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/lm32-ibld.c b/opcodes/lm32-ibld.c
index 1812789..fbddbda 100644
--- a/opcodes/lm32-ibld.c
+++ b/opcodes/lm32-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for lm32. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/lm32-opc.c b/opcodes/lm32-opc.c
index a752460..35a7fe4 100644
--- a/opcodes/lm32-opc.c
+++ b/opcodes/lm32-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for lm32.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/lm32-opc.h b/opcodes/lm32-opc.h
index 0ae4971..0d8f803 100644
--- a/opcodes/lm32-opc.h
+++ b/opcodes/lm32-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for lm32.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/lm32-opinst.c b/opcodes/lm32-opinst.c
index 3d4be7f..1d95aa4 100644
--- a/opcodes/lm32-opinst.c
+++ b/opcodes/lm32-opinst.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Semantic operand instances for lm32.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/m32c-asm.c b/opcodes/m32c-asm.c
index 1b24c86..19916d2 100644
--- a/opcodes/m32c-asm.c
+++ b/opcodes/m32c-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/m32c-desc.c b/opcodes/m32c-desc.c
index 54e2912..93de6f8 100644
--- a/opcodes/m32c-desc.c
+++ b/opcodes/m32c-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for m32c.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/m32c-desc.h b/opcodes/m32c-desc.h
index 3bfdaf6..06748ec 100644
--- a/opcodes/m32c-desc.h
+++ b/opcodes/m32c-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for m32c.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c
index e4fc6f6c..ca5a49d 100644
--- a/opcodes/m32c-dis.c
+++ b/opcodes/m32c-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/m32c-ibld.c b/opcodes/m32c-ibld.c
index 8b5e0c8..7f3829e 100644
--- a/opcodes/m32c-ibld.c
+++ b/opcodes/m32c-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for m32c. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/m32c-opc.c b/opcodes/m32c-opc.c
index bdaa6bd..59c44bf 100644
--- a/opcodes/m32c-opc.c
+++ b/opcodes/m32c-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for m32c.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/m32c-opc.h b/opcodes/m32c-opc.h
index e419952..5458c3d 100644
--- a/opcodes/m32c-opc.h
+++ b/opcodes/m32c-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for m32c.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c
index 30728d9..4e915e7 100644
--- a/opcodes/m32r-asm.c
+++ b/opcodes/m32r-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/m32r-desc.c b/opcodes/m32r-desc.c
index 7b92d67..81f7ea2 100644
--- a/opcodes/m32r-desc.c
+++ b/opcodes/m32r-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for m32r.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/m32r-desc.h b/opcodes/m32r-desc.h
index 53809e1..587611a 100644
--- a/opcodes/m32r-desc.h
+++ b/opcodes/m32r-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for m32r.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c
index bee98bd..2f4b312 100644
--- a/opcodes/m32r-dis.c
+++ b/opcodes/m32r-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/m32r-ibld.c b/opcodes/m32r-ibld.c
index 0503796..fe46f73 100644
--- a/opcodes/m32r-ibld.c
+++ b/opcodes/m32r-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for m32r. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/m32r-opc.c b/opcodes/m32r-opc.c
index ee1b278..ca010c8 100644
--- a/opcodes/m32r-opc.c
+++ b/opcodes/m32r-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for m32r.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/m32r-opc.h b/opcodes/m32r-opc.h
index 5778f39..73095f0 100644
--- a/opcodes/m32r-opc.h
+++ b/opcodes/m32r-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for m32r.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/m32r-opinst.c b/opcodes/m32r-opinst.c
index 5242ddc..c2902ab 100644
--- a/opcodes/m32r-opinst.c
+++ b/opcodes/m32r-opinst.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Semantic operand instances for m32r.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/mep-asm.c b/opcodes/mep-asm.c
index fe55998..9af326b 100644
--- a/opcodes/mep-asm.c
+++ b/opcodes/mep-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/mep-desc.c b/opcodes/mep-desc.c
index 680daed..6857457 100644
--- a/opcodes/mep-desc.c
+++ b/opcodes/mep-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for mep.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/mep-desc.h b/opcodes/mep-desc.h
index 6cac0f2..c997eef 100644
--- a/opcodes/mep-desc.h
+++ b/opcodes/mep-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for mep.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/mep-dis.c b/opcodes/mep-dis.c
index a8888d9..656197d 100644
--- a/opcodes/mep-dis.c
+++ b/opcodes/mep-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/mep-ibld.c b/opcodes/mep-ibld.c
index fa33e23..62e92c6 100644
--- a/opcodes/mep-ibld.c
+++ b/opcodes/mep-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for mep. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/mep-opc.c b/opcodes/mep-opc.c
index de779cc..0d9ac12 100644
--- a/opcodes/mep-opc.c
+++ b/opcodes/mep-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for mep.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/mep-opc.h b/opcodes/mep-opc.h
index e7a6224..be8543b 100644
--- a/opcodes/mep-opc.h
+++ b/opcodes/mep-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for mep.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/mt-asm.c b/opcodes/mt-asm.c
index 44eb8af..56e975f 100644
--- a/opcodes/mt-asm.c
+++ b/opcodes/mt-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/mt-desc.c b/opcodes/mt-desc.c
index 24e2af0..6d33796 100644
--- a/opcodes/mt-desc.c
+++ b/opcodes/mt-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for mt.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/mt-desc.h b/opcodes/mt-desc.h
index 071f414..1d661bd 100644
--- a/opcodes/mt-desc.h
+++ b/opcodes/mt-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for mt.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/mt-dis.c b/opcodes/mt-dis.c
index fddbc81..ca67ce2 100644
--- a/opcodes/mt-dis.c
+++ b/opcodes/mt-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/mt-ibld.c b/opcodes/mt-ibld.c
index aacc9c5..5f03a44 100644
--- a/opcodes/mt-ibld.c
+++ b/opcodes/mt-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for mt. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/mt-opc.c b/opcodes/mt-opc.c
index 9e8f4bd..e6bbef8 100644
--- a/opcodes/mt-opc.c
+++ b/opcodes/mt-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for mt.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/mt-opc.h b/opcodes/mt-opc.h
index 3a3ef68..960a74c 100644
--- a/opcodes/mt-opc.h
+++ b/opcodes/mt-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for mt.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/or1k-asm.c b/opcodes/or1k-asm.c
index 98be97b..7fffa3d 100644
--- a/opcodes/or1k-asm.c
+++ b/opcodes/or1k-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/or1k-desc.c b/opcodes/or1k-desc.c
index 003beb7..76c2678 100644
--- a/opcodes/or1k-desc.c
+++ b/opcodes/or1k-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for or1k.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/or1k-desc.h b/opcodes/or1k-desc.h
index 5d2f5cd..f97253b 100644
--- a/opcodes/or1k-desc.h
+++ b/opcodes/or1k-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for or1k.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/or1k-dis.c b/opcodes/or1k-dis.c
index c9a7620..1b1ec73 100644
--- a/opcodes/or1k-dis.c
+++ b/opcodes/or1k-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/or1k-ibld.c b/opcodes/or1k-ibld.c
index 3799164..ac4e101 100644
--- a/opcodes/or1k-ibld.c
+++ b/opcodes/or1k-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for or1k. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/or1k-opc.c b/opcodes/or1k-opc.c
index 3f5e597..9312c14 100644
--- a/opcodes/or1k-opc.c
+++ b/opcodes/or1k-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for or1k.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/or1k-opc.h b/opcodes/or1k-opc.h
index 2fe5b5a..5673a58 100644
--- a/opcodes/or1k-opc.h
+++ b/opcodes/or1k-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for or1k.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/or1k-opinst.c b/opcodes/or1k-opinst.c
index f3eeb5a..3359028 100644
--- a/opcodes/or1k-opinst.c
+++ b/opcodes/or1k-opinst.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Semantic operand instances for or1k.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/xc16x-asm.c b/opcodes/xc16x-asm.c
index 9e13fc0..19f134f 100644
--- a/opcodes/xc16x-asm.c
+++ b/opcodes/xc16x-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/xc16x-desc.c b/opcodes/xc16x-desc.c
index 4df9620..cfd3064 100644
--- a/opcodes/xc16x-desc.c
+++ b/opcodes/xc16x-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for xc16x.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/xc16x-desc.h b/opcodes/xc16x-desc.h
index 8daedfe..c86771e 100644
--- a/opcodes/xc16x-desc.h
+++ b/opcodes/xc16x-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for xc16x.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/xc16x-dis.c b/opcodes/xc16x-dis.c
index 1cbf119..1becb9b 100644
--- a/opcodes/xc16x-dis.c
+++ b/opcodes/xc16x-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/xc16x-ibld.c b/opcodes/xc16x-ibld.c
index bde1a98..21d7c1b 100644
--- a/opcodes/xc16x-ibld.c
+++ b/opcodes/xc16x-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for xc16x. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/xc16x-opc.c b/opcodes/xc16x-opc.c
index 818e7df..bb607c1 100644
--- a/opcodes/xc16x-opc.c
+++ b/opcodes/xc16x-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for xc16x.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/xc16x-opc.h b/opcodes/xc16x-opc.h
index 34a7164..c5e846e 100644
--- a/opcodes/xc16x-opc.h
+++ b/opcodes/xc16x-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for xc16x.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/xstormy16-asm.c b/opcodes/xstormy16-asm.c
index 10225c9..60a9a11 100644
--- a/opcodes/xstormy16-asm.c
+++ b/opcodes/xstormy16-asm.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/xstormy16-desc.c b/opcodes/xstormy16-desc.c
index 76b8f07..f2b3ef7 100644
--- a/opcodes/xstormy16-desc.c
+++ b/opcodes/xstormy16-desc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data for xstormy16.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/xstormy16-desc.h b/opcodes/xstormy16-desc.h
index 530210e..6e58b7a 100644
--- a/opcodes/xstormy16-desc.h
+++ b/opcodes/xstormy16-desc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* CPU data header for xstormy16.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c
index 0b7fdf3..9f3cfa1 100644
--- a/opcodes/xstormy16-dis.c
+++ b/opcodes/xstormy16-dis.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
diff --git a/opcodes/xstormy16-ibld.c b/opcodes/xstormy16-ibld.c
index 4ad1b1d..7658448 100644
--- a/opcodes/xstormy16-ibld.c
+++ b/opcodes/xstormy16-ibld.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction building/extraction support for xstormy16. -*- C -*-
THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
diff --git a/opcodes/xstormy16-opc.c b/opcodes/xstormy16-opc.c
index 146b9f6..2602103 100644
--- a/opcodes/xstormy16-opc.c
+++ b/opcodes/xstormy16-opc.c
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode table for xstormy16.
THIS FILE IS MACHINE GENERATED WITH CGEN.
diff --git a/opcodes/xstormy16-opc.h b/opcodes/xstormy16-opc.h
index 6e64220..0cfa4ed 100644
--- a/opcodes/xstormy16-opc.h
+++ b/opcodes/xstormy16-opc.h
@@ -1,3 +1,4 @@
+/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
/* Instruction opcode header for xstormy16.
THIS FILE IS MACHINE GENERATED WITH CGEN.