diff options
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 15 | ||||
| -rw-r--r-- | opcodes/Makefile.am | 560 | ||||
| -rw-r--r-- | opcodes/Makefile.in | 560 | ||||
| -rwxr-xr-x | opcodes/configure | 1 | ||||
| -rw-r--r-- | opcodes/configure.in | 1 | ||||
| -rw-r--r-- | opcodes/disassemble.c | 6 | ||||
| -rw-r--r-- | opcodes/po/POTFILES.in | 2 | ||||
| -rw-r--r-- | opcodes/spu-dis.c | 260 | ||||
| -rw-r--r-- | opcodes/spu-opc.c | 44 |
9 files changed, 1021 insertions, 428 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 7f17d75..016292e 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,18 @@ +2006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com> + Yukishige Shibata <shibata@rd.scei.sony.co.jp> + Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp> + Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp> + Alan Modra <amodra@bigpond.net.au> + + * spu-dis.c: New file. + * spu-opc.c: New file. + * configure.in: Add SPU support. + * disassemble.c: Likewise. + * Makefile.am: Likewise. Run "make dep-am". + * Makefile.in: Regenerate. + * configure: Regenerate. + * po/POTFILES.in: Regenerate. + 2006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com> * ppc-opc.c (CELL): New define. diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index 3bf38e9..ebd252f 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -169,6 +169,8 @@ CFILES = \ sh64-opc.c \ sparc-dis.c \ sparc-opc.c \ + spu-dis.c \ + spu-opc.c \ tic30-dis.c \ tic4x-dis.c \ tic54x-dis.c \ @@ -301,6 +303,8 @@ ALL_MACHINES = \ sh64-opc.lo \ sparc-dis.lo \ sparc-opc.lo \ + spu-dis.lo \ + spu-opc.lo \ tic30-dis.lo \ tic4x-dis.lo \ tic54x-dis.lo \ @@ -604,131 +608,164 @@ dep-am: DEP # DO NOT DELETE THIS LINE -- mkdep uses it. # DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY. alpha-dis.lo: alpha-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/alpha.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + $(INCDIR)/opcode/alpha.h alpha-opc.lo: alpha-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/opcode/alpha.h $(BFD_H) $(INCDIR)/symcat.h \ - opintl.h + $(INCDIR)/opcode/alpha.h $(BFD_H) $(INCDIR)/ansidecl.h \ + $(INCDIR)/symcat.h opintl.h arc-dis.lo: arc-dis.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \ - $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ - $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h \ - $(INCDIR)/elf/reloc-macros.h opintl.h arc-dis.h arc-ext.h + $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ + $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h $(BFDDIR)/elf-bfd.h \ + $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ + $(INCDIR)/bfdlink.h $(INCDIR)/elf/arc.h $(INCDIR)/elf/reloc-macros.h \ + opintl.h arc-dis.h arc-ext.h arc-opc.lo: arc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \ + $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/opcode/arc.h \ opintl.h arc-ext.lo: arc-ext.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(BFD_H) $(INCDIR)/symcat.h arc-ext.h $(INCDIR)/libiberty.h + $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h arc-ext.h \ + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h arm-dis.lo: arm-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/arm.h \ - opintl.h $(INCDIR)/safe-ctype.h $(INCDIR)/floatformat.h \ - $(INCDIR)/coff/internal.h $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h \ - $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ - $(INCDIR)/elf/external.h $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + $(INCDIR)/opcode/arm.h opintl.h $(INCDIR)/safe-ctype.h \ + $(INCDIR)/floatformat.h $(INCDIR)/ansidecl.h $(INCDIR)/coff/internal.h \ + $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(BFDDIR)/elf-bfd.h \ + $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \ + $(INCDIR)/elf/internal.h $(INCDIR)/elf/arm.h $(INCDIR)/elf/reloc-macros.h avr-dis.lo: avr-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h opintl.h \ - $(INCDIR)/libiberty.h $(INCDIR)/opcode/avr.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ + $(INCDIR)/opcode/avr.h bfin-dis.lo: bfin-dis.c $(INCDIR)/opcode/bfin.h $(INCDIR)/dis-asm.h \ $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h cgen-asm.lo: cgen-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(BFD_H) \ - $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h \ + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \ + $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \ + $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \ opintl.h cgen-bitset.lo: cgen-bitset.c $(INCDIR)/libiberty.h \ $(INCDIR)/ansidecl.h $(INCDIR)/opcode/cgen-bitset.h cgen-dis.lo: cgen-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/libiberty.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h \ - $(INCDIR)/opcode/cgen-bitset.h + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(BFD_H) \ + $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \ + $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h cgen-opc.lo: cgen-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(BFD_H) \ - $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h $(INCDIR)/opcode/cgen-bitset.h + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h \ + $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \ + $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h cris-dis.lo: cris-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \ - $(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h + $(INCDIR)/ansidecl.h $(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h \ + $(INCDIR)/ansidecl.h cris-opc.lo: cris-opc.c $(INCDIR)/opcode/cris.h crx-dis.lo: crx-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \ - $(INCDIR)/opcode/crx.h + $(INCDIR)/ansidecl.h $(INCDIR)/opcode/crx.h crx-opc.lo: crx-opc.c $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ $(INCDIR)/symcat.h $(INCDIR)/opcode/crx.h d10v-dis.lo: d10v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/d10v.h $(INCDIR)/dis-asm.h $(BFD_H) \ - $(INCDIR)/symcat.h + $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h d10v-opc.lo: d10v-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/d10v.h d30v-dis.lo: d30v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/d30v.h $(INCDIR)/dis-asm.h $(BFD_H) \ - $(INCDIR)/symcat.h opintl.h + $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h d30v-opc.lo: d30v-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/d30v.h dlx-dis.lo: dlx-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/dlx.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + $(INCDIR)/opcode/dlx.h dis-buf.lo: dis-buf.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h opintl.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + opintl.h dis-init.lo: dis-init.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + $(BFD_H) disassemble.lo: disassemble.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h fr30-asm.lo: fr30-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \ - $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h $(INCDIR)/xregex.h \ - $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h + $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \ + fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \ + opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \ + $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h fr30-desc.lo: fr30-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \ - $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h $(INCDIR)/libiberty.h \ + $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \ + fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \ + opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ $(INCDIR)/xregex.h $(INCDIR)/xregex2.h fr30-dis.lo: fr30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ - fr30-opc.h opintl.h + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \ + opintl.h fr30-ibld.lo: fr30-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h \ - $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \ + $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \ fr30-opc.h opintl.h $(INCDIR)/safe-ctype.h fr30-opc.lo: fr30-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h \ - $(INCDIR)/opcode/cgen.h fr30-opc.h $(INCDIR)/libiberty.h + $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \ + fr30-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h fr30-opc.h \ + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h frv-asm.lo: frv-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \ - $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h $(INCDIR)/xregex.h \ - $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h + $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \ + frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \ + opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h \ + $(INCDIR)/ansidecl.h $(INCDIR)/safe-ctype.h frv-desc.lo: frv-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \ - $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h $(INCDIR)/libiberty.h \ + $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \ + frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \ + opintl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ $(INCDIR)/xregex.h $(INCDIR)/xregex2.h frv-dis.lo: frv-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ - frv-opc.h opintl.h + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \ + opintl.h frv-ibld.lo: frv-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h frv-desc.h \ - $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \ + $(INCDIR)/opcode/cgen.h $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h \ frv-opc.h opintl.h $(INCDIR)/safe-ctype.h frv-opc.lo: frv-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen-bitset.h \ - $(INCDIR)/opcode/cgen.h frv-opc.h $(INCDIR)/libiberty.h \ - $(INCDIR)/elf/frv.h $(INCDIR)/elf/reloc-macros.h + $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/symcat.h \ + frv-desc.h $(INCDIR)/opcode/cgen-bitset.h $(INCDIR)/opcode/cgen.h \ + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h frv-opc.h \ + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h $(INCDIR)/elf/frv.h \ + $(INCDIR)/elf/reloc-macros.h h8300-dis.lo: h8300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/h8300.h $(INCDIR)/dis-asm.h $(BFD_H) \ - $(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h + $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h \ + $(INCDIR)/ansidecl.h h8500-dis.lo: h8500-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - h8500-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \ - opintl.h + h8500-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ + $(INCDIR)/symcat.h opintl.h hppa-dis.lo: hppa-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(BFDDIR)/libhppa.h \ - $(INCDIR)/opcode/hppa.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + $(BFDDIR)/libhppa.h $(INCDIR)/opcode/hppa.h i370-dis.lo: i370-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/i370.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + $(INCDIR)/opcode/i370.h i370-opc.lo: i370-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/i370.h i386-dis.lo: i386-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \ - 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xstormy16-opc.h $(INCDIR)/libiberty.h + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \ + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h xtensa-dis.lo: xtensa-dis.c $(INCDIR)/xtensa-isa.h \ - $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h sysdep.h \ - config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h + $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ + sysdep.h config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ + $(INCDIR)/symcat.h z80-dis.lo: z80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h z8k-opc.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + z8k-opc.h z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/libiberty.h + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h # IF YOU PUT ANYTHING HERE IT WILL GO AWAY diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index 6d3275f..85003e6 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -383,6 +383,8 @@ CFILES = \ sh64-opc.c \ sparc-dis.c \ sparc-opc.c \ + spu-dis.c \ + spu-opc.c \ tic30-dis.c \ tic4x-dis.c \ tic54x-dis.c \ @@ -515,6 +517,8 @@ ALL_MACHINES = \ sh64-opc.lo \ sparc-dis.lo \ sparc-opc.lo \ + spu-dis.lo \ + spu-opc.lo \ tic30-dis.lo \ tic4x-dis.lo \ tic54x-dis.lo \ @@ -1141,131 +1145,164 @@ dep-am: DEP # DO NOT DELETE THIS LINE -- mkdep uses it. # DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY. alpha-dis.lo: alpha-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - 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xstormy16-opc.h $(INCDIR)/libiberty.h + $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen-bitset.h xstormy16-opc.h \ + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h xtensa-dis.lo: xtensa-dis.c $(INCDIR)/xtensa-isa.h \ - $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h sysdep.h \ - config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h + $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h \ + sysdep.h config.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h \ + $(INCDIR)/symcat.h z80-dis.lo: z80-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h z8k-opc.h + $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \ + z8k-opc.h z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h \ - $(INCDIR)/libiberty.h + $(INCDIR)/libiberty.h $(INCDIR)/ansidecl.h # IF YOU PUT ANYTHING HERE IT WILL GO AWAY # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. diff --git a/opcodes/configure b/opcodes/configure index ed91eca..8e3e27e 100755 --- a/opcodes/configure +++ b/opcodes/configure @@ -6589,6 +6589,7 @@ if test x${all_targets} = xfalse ; then done ta="$ta sh-dis.lo cgen-bitset.lo" ;; bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;; + bfd_spu_arch) ta="$ta spu-dis.lo spu-opc.lo" ;; bfd_tahoe_arch) ;; bfd_tic30_arch) ta="$ta tic30-dis.lo" ;; bfd_tic4x_arch) ta="$ta tic4x-dis.lo" ;; diff --git a/opcodes/configure.in b/opcodes/configure.in index b8cb7de..d937784 100644 --- a/opcodes/configure.in +++ b/opcodes/configure.in @@ -218,6 +218,7 @@ if test x${all_targets} = xfalse ; then done ta="$ta sh-dis.lo cgen-bitset.lo" ;; bfd_sparc_arch) ta="$ta sparc-dis.lo sparc-opc.lo" ;; + bfd_spu_arch) ta="$ta spu-dis.lo spu-opc.lo" ;; bfd_tahoe_arch) ;; bfd_tic30_arch) ta="$ta tic30-dis.lo" ;; bfd_tic4x_arch) ta="$ta tic4x-dis.lo" ;; diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index 14f6d37..ca28f56 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -67,6 +67,7 @@ #define ARCH_score #define ARCH_sh #define ARCH_sparc +#define ARCH_spu #define ARCH_tic30 #define ARCH_tic4x #define ARCH_tic54x @@ -345,6 +346,11 @@ disassembler (abfd) disassemble = print_insn_sparc; break; #endif +#ifdef ARCH_spu + case bfd_arch_spu: + disassemble = print_insn_spu; + break; +#endif #ifdef ARCH_tic30 case bfd_arch_tic30: disassemble = print_insn_tic30; diff --git a/opcodes/po/POTFILES.in b/opcodes/po/POTFILES.in index add47f5..337ec85 100644 --- a/opcodes/po/POTFILES.in +++ b/opcodes/po/POTFILES.in @@ -140,6 +140,8 @@ sh-dis.c sh-opc.h sparc-dis.c sparc-opc.c +spu-dis.c +spu-opc.c sysdep.h tic30-dis.c tic4x-dis.c diff --git a/opcodes/spu-dis.c b/opcodes/spu-dis.c new file mode 100644 index 0000000..a0dd1a0 --- /dev/null +++ b/opcodes/spu-dis.c @@ -0,0 +1,260 @@ +/* Disassemble SPU instructions + + Copyright 2006 Free Software Foundation, Inc. + + This file is part of GDB, GAS, and the GNU binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include <stdio.h> +#include "sysdep.h" +#include "dis-asm.h" +#include "opcode/spu.h" + +/* This file provides a disassembler function which uses + the disassembler interface defined in dis-asm.h. */ + +extern const struct spu_opcode spu_opcodes[]; +extern const int spu_num_opcodes; + +static const struct spu_opcode *spu_disassemble_table[(1<<11)]; + +static void +init_spu_disassemble (void) +{ + int i; + + /* If two instructions have the same opcode then we prefer the first + * one. In most cases it is just an alternate mnemonic. */ + for (i = 0; i < spu_num_opcodes; i++) + { + int o = spu_opcodes[i].opcode; + if (o >= (1 << 11)) + abort (); + if (spu_disassemble_table[o] == 0) + spu_disassemble_table[o] = &spu_opcodes[i]; + } +} + +/* Determine the instruction from the 10 least significant bits. */ +static const struct spu_opcode * +get_index_for_opcode (unsigned int insn) +{ + const struct spu_opcode *index; + unsigned int opcode = insn >> (32-11); + + /* Init the table. This assumes that element 0/opcode 0 (currently + * NOP) is always used */ + if (spu_disassemble_table[0] == 0) + init_spu_disassemble (); + + if ((index = spu_disassemble_table[opcode & 0x780]) != 0 + && index->insn_type == RRR) + return index; + + if ((index = spu_disassemble_table[opcode & 0x7f0]) != 0 + && (index->insn_type == RI18 || index->insn_type == LBT)) + return index; + + if ((index = spu_disassemble_table[opcode & 0x7f8]) != 0 + && index->insn_type == RI10) + return index; + + if ((index = spu_disassemble_table[opcode & 0x7fc]) != 0 + && (index->insn_type == RI16)) + return index; + + if ((index = spu_disassemble_table[opcode & 0x7fe]) != 0 + && (index->insn_type == RI8)) + return index; + + if ((index = spu_disassemble_table[opcode & 0x7ff]) != 0) + return index; + + return 0; +} + +/* Print a Spu instruction. */ + +int +print_insn_spu (bfd_vma memaddr, struct disassemble_info *info) +{ + bfd_byte buffer[4]; + int value; + int hex_value; + int status; + unsigned int insn; + const struct spu_opcode *index; + enum spu_insns tag; + + status = (*info->read_memory_func) (memaddr, buffer, 4, info); + if (status != 0) + { + (*info->memory_error_func) (status, memaddr, info); + return -1; + } + + insn = bfd_getb32 (buffer); + + index = get_index_for_opcode (insn); + + if (index == 0) + { + (*info->fprintf_func) (info->stream, ".long 0x%x", insn); + } + else + { + int i; + int paren = 0; + tag = (enum spu_insns)(index - spu_opcodes); + (*info->fprintf_func) (info->stream, "%s", index->mnemonic); + if (tag == M_BI || tag == M_BISL || tag == M_IRET || tag == M_BISLED + || tag == M_BIHNZ || tag == M_BIHZ || tag == M_BINZ || tag == M_BIZ + || tag == M_SYNC || tag == M_HBR) + { + int fb = (insn >> (32-18)) & 0x7f; + if (fb & 0x40) + (*info->fprintf_func) (info->stream, tag == M_SYNC ? "c" : "p"); + if (fb & 0x20) + (*info->fprintf_func) (info->stream, "d"); + if (fb & 0x10) + (*info->fprintf_func) (info->stream, "e"); + } + if (index->arg[0] != 0) + (*info->fprintf_func) (info->stream, "\t"); + hex_value = 0; + for (i = 1; i <= index->arg[0]; i++) + { + int arg = index->arg[i]; + if (arg != A_P && !paren && i > 1) + (*info->fprintf_func) (info->stream, ","); + + switch (arg) + { + case A_T: + (*info->fprintf_func) (info->stream, "$%d", + DECODE_INSN_RT (insn)); + break; + case A_A: + (*info->fprintf_func) (info->stream, "$%d", + DECODE_INSN_RA (insn)); + break; + case A_B: + (*info->fprintf_func) (info->stream, "$%d", + DECODE_INSN_RB (insn)); + break; + case A_C: + (*info->fprintf_func) (info->stream, "$%d", + DECODE_INSN_RC (insn)); + break; + case A_S: + (*info->fprintf_func) (info->stream, "$sp%d", + DECODE_INSN_RA (insn)); + break; + case A_H: + (*info->fprintf_func) (info->stream, "$ch%d", + DECODE_INSN_RA (insn)); + break; + case A_P: + paren++; + (*info->fprintf_func) (info->stream, "("); + break; + case A_U7A: + (*info->fprintf_func) (info->stream, "%d", + 173 - DECODE_INSN_U8 (insn)); + break; + case A_U7B: + (*info->fprintf_func) (info->stream, "%d", + 155 - DECODE_INSN_U8 (insn)); + break; + case A_S3: + case A_S6: + case A_S7: + case A_S7N: + case A_U3: + case A_U5: + case A_U6: + case A_U7: + hex_value = DECODE_INSN_I7 (insn); + (*info->fprintf_func) (info->stream, "%d", hex_value); + break; + case A_S11: + (*info->print_address_func) (memaddr + DECODE_INSN_I9a (insn) * 4, + info); + break; + case A_S11I: + (*info->print_address_func) (memaddr + DECODE_INSN_I9b (insn) * 4, + info); + break; + case A_S10: + case A_S10B: + hex_value = DECODE_INSN_I10 (insn); + (*info->fprintf_func) (info->stream, "%d", hex_value); + break; + case A_S14: + hex_value = DECODE_INSN_I10 (insn) * 16; + (*info->fprintf_func) (info->stream, "%d", hex_value); + break; + case A_S16: + hex_value = DECODE_INSN_I16 (insn); + (*info->fprintf_func) (info->stream, "%d", hex_value); + break; + case A_X16: + hex_value = DECODE_INSN_U16 (insn); + (*info->fprintf_func) (info->stream, "%u", hex_value); + break; + case A_R18: + value = DECODE_INSN_I16 (insn) * 4; + if (value == 0) + (*info->fprintf_func) (info->stream, "%d", value); + else + { + hex_value = memaddr + value; + (*info->print_address_func) (hex_value & 0x3ffff, info); + } + break; + case A_S18: + value = DECODE_INSN_U16 (insn) * 4; + if (value == 0) + (*info->fprintf_func) (info->stream, "%d", value); + else + (*info->print_address_func) (value, info); + break; + case A_U18: + value = DECODE_INSN_U18 (insn); + if (value == 0 || !(*info->symbol_at_address_func)(0, info)) + { + hex_value = value; + (*info->fprintf_func) (info->stream, "%u", value); + } + else + (*info->print_address_func) (value, info); + break; + case A_U14: + hex_value = DECODE_INSN_U14 (insn); + (*info->fprintf_func) (info->stream, "%u", hex_value); + break; + } + if (arg != A_P && paren) + { + (*info->fprintf_func) (info->stream, ")"); + paren--; + } + } + if (hex_value > 16) + (*info->fprintf_func) (info->stream, "\t# %x", hex_value); + } + return 4; +} diff --git a/opcodes/spu-opc.c b/opcodes/spu-opc.c new file mode 100644 index 0000000..683f96f --- /dev/null +++ b/opcodes/spu-opc.c @@ -0,0 +1,44 @@ +/* SPU opcode list + + Copyright 2006 Free Software Foundation, Inc. + + This file is part of GDB, GAS, and the GNU binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +#include "opcode/spu.h" + +/* This file holds the Spu opcode table */ + + +/* + Example contents of spu-insn.h + id_tag mode mode type opcode mnemonic asmtype dependency FPU L/S? branch? instruction + QUAD WORD (0,RC,RB,RA,RT) latency + APUOP(M_LQD, 1, 0, RI9, 0x1f8, "lqd", ASM_RI9IDX, 00012, FXU, 1, 0) Load Quadword d-form + */ + +const struct spu_opcode spu_opcodes[] = { +#define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \ + { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT }, +#define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \ + { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT }, +#include "opcode/spu-insns.h" +#undef APUOP +#undef APUOPFB +}; + +const int spu_num_opcodes = + sizeof (spu_opcodes) / sizeof (spu_opcodes[0]); |