diff options
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/mep-desc.c | 12 | ||||
| -rw-r--r-- | opcodes/mep-ibld.c | 36 | ||||
| -rw-r--r-- | opcodes/mep-opc.c | 50 | ||||
| -rw-r--r-- | opcodes/mep-opc.h | 103 |
5 files changed, 108 insertions, 100 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 36f08e0..9d4794f 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2009-04-17 DJ Delorie <dj@redhat.com + + * mep-desc.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + 2009-04-15 Anthony Green <green@moxielogic.com> * moxie-opc.c, moxie-dis.c: Created. diff --git a/opcodes/mep-desc.c b/opcodes/mep-desc.c index a210bda..9225cad 100644 --- a/opcodes/mep-desc.c +++ b/opcodes/mep-desc.c @@ -1122,7 +1122,7 @@ static const CGEN_IBASE mep_cgen_insn_table[MAX_INSNS] = /* lhucpm1 $crn,($rma+),$cdisp10a2 */ { MEP_INSN_LHUCPM1, "lhucpm1", "lhucpm1", 32, - { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } } + { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } } }, /* uci $rn,$rm,$uimm16 */ { @@ -1134,6 +1134,16 @@ static const CGEN_IBASE mep_cgen_insn_table[MAX_INSNS] = MEP_INSN_DSP, "dsp", "dsp", 32, { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } } }, +/* dsp0 $c5rnmuimm24 */ + { + -1, "dsp0", "dsp0", 32, + { 0|A(ALIAS)|A(NO_DIS)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } } + }, +/* dsp1 $rn,$c5rmuimm20 */ + { + -1, "dsp1", "dsp1", 32, + { 0|A(ALIAS)|A(NO_DIS)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } } + }, /* sb $rnc,($rma) */ { MEP_INSN_SB, "sb", "sb", 16, diff --git a/opcodes/mep-ibld.c b/opcodes/mep-ibld.c index 9473906..422a90d 100644 --- a/opcodes/mep-ibld.c +++ b/opcodes/mep-ibld.c @@ -649,33 +649,33 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd, case MEP_OPERAND_CDISP10 : { long value = fields->f_cdisp10; - value = ((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value)); - errmsg = insert_normal (cd, value, 0, 0, 22, 10, 32, total_length, buffer); + value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); + errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, buffer); } break; case MEP_OPERAND_CDISP10A2 : { long value = fields->f_cdisp10; - value = ((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value)); - errmsg = insert_normal (cd, value, 0, 0, 22, 10, 32, total_length, buffer); + value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); + errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, buffer); } break; case MEP_OPERAND_CDISP10A4 : { long value = fields->f_cdisp10; - value = ((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value)); - errmsg = insert_normal (cd, value, 0, 0, 22, 10, 32, total_length, buffer); + value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); + errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, buffer); } break; case MEP_OPERAND_CDISP10A8 : { long value = fields->f_cdisp10; - value = ((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value)); - errmsg = insert_normal (cd, value, 0, 0, 22, 10, 32, total_length, buffer); + value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); + errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, buffer); } break; case MEP_OPERAND_CDISP12 : - errmsg = insert_normal (cd, fields->f_12s20, 0, 0, 20, 12, 32, total_length, buffer); + errmsg = insert_normal (cd, fields->f_12s20, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 12, 32, total_length, buffer); break; case MEP_OPERAND_CIMM4 : errmsg = insert_normal (cd, fields->f_rn, 0, 0, 4, 4, 32, total_length, buffer); @@ -1082,37 +1082,37 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd, case MEP_OPERAND_CDISP10 : { long value; - length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 10, 32, total_length, pc, & value); - value = ((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value)); + length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, pc, & value); + value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); fields->f_cdisp10 = value; } break; case MEP_OPERAND_CDISP10A2 : { long value; - length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 10, 32, total_length, pc, & value); - value = ((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value)); + length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, pc, & value); + value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); fields->f_cdisp10 = value; } break; case MEP_OPERAND_CDISP10A4 : { long value; - length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 10, 32, total_length, pc, & value); - value = ((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value)); + length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, pc, & value); + value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); fields->f_cdisp10 = value; } break; case MEP_OPERAND_CDISP10A8 : { long value; - length = extract_normal (cd, ex_info, insn_value, 0, 0, 22, 10, 32, total_length, pc, & value); - value = ((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value)); + length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, pc, & value); + value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); fields->f_cdisp10 = value; } break; case MEP_OPERAND_CDISP12 : - length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 12, 32, total_length, pc, & fields->f_12s20); + length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 12, 32, total_length, pc, & fields->f_12s20); break; case MEP_OPERAND_CIMM4 : length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_rn); diff --git a/opcodes/mep-opc.c b/opcodes/mep-opc.c index bd298cb..e2711e7 100644 --- a/opcodes/mep-opc.c +++ b/opcodes/mep-opc.c @@ -212,6 +212,14 @@ static const CGEN_IFMT ifmt_dsp ATTRIBUTE_UNUSED = { 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } } }; +static const CGEN_IFMT ifmt_dsp0 ATTRIBUTE_UNUSED = { + 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_C5_RNMUIMM24) }, { F (F_SUB4) }, { 0 } } +}; + +static const CGEN_IFMT ifmt_dsp1 ATTRIBUTE_UNUSED = { + 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_C5_RMUIMM20) }, { F (F_SUB4) }, { 0 } } +}; + static const CGEN_IFMT ifmt_sb ATTRIBUTE_UNUSED = { 16, 16, 0xf00f, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } } }; @@ -569,6 +577,18 @@ static const CGEN_OPCODE mep_cgen_insn_opcode_table[MAX_INSNS] = { { MNEM, ' ', OP (RN), ',', OP (RM), ',', OP (UIMM16), 0 } }, & ifmt_dsp, { 0xf0000000 } }, +/* dsp0 $c5rnmuimm24 */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (C5RNMUIMM24), 0 } }, + & ifmt_dsp0, { 0xf0000000 } + }, +/* dsp1 $rn,$c5rmuimm20 */ + { + { 0, 0, 0, 0 }, + { { MNEM, ' ', OP (RN), ',', OP (C5RMUIMM20), 0 } }, + & ifmt_dsp1, { 0xf0000000 } + }, /* sb $rnc,($rma) */ { { 0, 0, 0, 0 }, @@ -1795,14 +1815,6 @@ static const CGEN_OPCODE mep_cgen_insn_opcode_table[MAX_INSNS] = #else #define F(f) & mep_cgen_ifld_table[MEP_/**/f] #endif -static const CGEN_IFMT ifmt_dsp0 ATTRIBUTE_UNUSED = { - 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } } -}; - -static const CGEN_IFMT ifmt_dsp1 ATTRIBUTE_UNUSED = { - 32, 32, 0xf00f0000, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_16U16) }, { 0 } } -}; - static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = { 16, 16, 0xffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } } }; @@ -1876,16 +1888,6 @@ static const CGEN_IFMT ifmt_lmcp16_0 ATTRIBUTE_UNUSED = { static const CGEN_IBASE mep_cgen_macro_insn_table[] = { -/* dsp0 $c5rnmuimm24 */ - { - -1, "dsp0", "dsp0", 32, - { 0|A(VOLATILE)|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } } - }, -/* dsp1 $rn,$c5rmuimm20 */ - { - -1, "dsp1", "dsp1", 32, - { 0|A(VOLATILE)|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } } - }, /* nop */ { -1, "nop", "nop", 16, @@ -1957,18 +1959,6 @@ static const CGEN_IBASE mep_cgen_macro_insn_table[] = static const CGEN_OPCODE mep_cgen_macro_insn_opcode_table[] = { -/* dsp0 $c5rnmuimm24 */ - { - { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (C5RNMUIMM24), 0 } }, - & ifmt_dsp0, { 0xf0000000 } - }, -/* dsp1 $rn,$c5rmuimm20 */ - { - { 0, 0, 0, 0 }, - { { MNEM, ' ', OP (RN), ',', OP (C5RMUIMM20), 0 } }, - & ifmt_dsp1, { 0xf0000000 } - }, /* nop */ { { 0, 0, 0, 0 }, diff --git a/opcodes/mep-opc.h b/opcodes/mep-opc.h index 5e56923..3e89249 100644 --- a/opcodes/mep-opc.h +++ b/opcodes/mep-opc.h @@ -101,57 +101,58 @@ typedef enum cgen_insn_type { , MEP_INSN_SBCP, MEP_INSN_LBCP, MEP_INSN_LBUCP, MEP_INSN_SHCP , MEP_INSN_LHCP, MEP_INSN_LHUCP, MEP_INSN_LBUCPA, MEP_INSN_LHUCPA , MEP_INSN_LBUCPM0, MEP_INSN_LHUCPM0, MEP_INSN_LBUCPM1, MEP_INSN_LHUCPM1 - , MEP_INSN_UCI, MEP_INSN_DSP, MEP_INSN_SB, MEP_INSN_SH - , MEP_INSN_SW, MEP_INSN_LB, MEP_INSN_LH, MEP_INSN_LW - , MEP_INSN_LBU, MEP_INSN_LHU, MEP_INSN_SW_SP, MEP_INSN_LW_SP - , MEP_INSN_SB_TP, MEP_INSN_SH_TP, MEP_INSN_SW_TP, MEP_INSN_LB_TP - , MEP_INSN_LH_TP, MEP_INSN_LW_TP, MEP_INSN_LBU_TP, MEP_INSN_LHU_TP - , MEP_INSN_SB16, MEP_INSN_SH16, MEP_INSN_SW16, MEP_INSN_LB16 - , MEP_INSN_LH16, MEP_INSN_LW16, MEP_INSN_LBU16, MEP_INSN_LHU16 - , MEP_INSN_SW24, MEP_INSN_LW24, MEP_INSN_EXTB, MEP_INSN_EXTH - , MEP_INSN_EXTUB, MEP_INSN_EXTUH, MEP_INSN_SSARB, MEP_INSN_MOV - , MEP_INSN_MOVI8, MEP_INSN_MOVI16, MEP_INSN_MOVU24, MEP_INSN_MOVU16 - , MEP_INSN_MOVH, MEP_INSN_ADD3, MEP_INSN_ADD, MEP_INSN_ADD3I - , MEP_INSN_ADVCK3, MEP_INSN_SUB, MEP_INSN_SBVCK3, MEP_INSN_NEG - , MEP_INSN_SLT3, MEP_INSN_SLTU3, MEP_INSN_SLT3I, MEP_INSN_SLTU3I - , MEP_INSN_SL1AD3, MEP_INSN_SL2AD3, MEP_INSN_ADD3X, MEP_INSN_SLT3X - , MEP_INSN_SLTU3X, MEP_INSN_OR, MEP_INSN_AND, MEP_INSN_XOR - , MEP_INSN_NOR, MEP_INSN_OR3, MEP_INSN_AND3, MEP_INSN_XOR3 - , MEP_INSN_SRA, MEP_INSN_SRL, MEP_INSN_SLL, MEP_INSN_SRAI - , MEP_INSN_SRLI, MEP_INSN_SLLI, MEP_INSN_SLL3, MEP_INSN_FSFT - , MEP_INSN_BRA, MEP_INSN_BEQZ, MEP_INSN_BNEZ, MEP_INSN_BEQI - , MEP_INSN_BNEI, MEP_INSN_BLTI, MEP_INSN_BGEI, MEP_INSN_BEQ - , MEP_INSN_BNE, MEP_INSN_BSR12, MEP_INSN_BSR24, MEP_INSN_JMP - , MEP_INSN_JMP24, MEP_INSN_JSR, MEP_INSN_RET, MEP_INSN_REPEAT - , MEP_INSN_EREPEAT, MEP_INSN_STC_LP, MEP_INSN_STC_HI, MEP_INSN_STC_LO - , MEP_INSN_STC, MEP_INSN_LDC_LP, MEP_INSN_LDC_HI, MEP_INSN_LDC_LO - , MEP_INSN_LDC, MEP_INSN_DI, MEP_INSN_EI, MEP_INSN_RETI - , MEP_INSN_HALT, MEP_INSN_SLEEP, MEP_INSN_SWI, MEP_INSN_BREAK - , MEP_INSN_SYNCM, MEP_INSN_STCB, MEP_INSN_LDCB, MEP_INSN_BSETM - , MEP_INSN_BCLRM, MEP_INSN_BNOTM, MEP_INSN_BTSTM, MEP_INSN_TAS - , MEP_INSN_CACHE, MEP_INSN_MUL, MEP_INSN_MULU, MEP_INSN_MULR - , MEP_INSN_MULRU, MEP_INSN_MADD, MEP_INSN_MADDU, MEP_INSN_MADDR - , MEP_INSN_MADDRU, MEP_INSN_DIV, MEP_INSN_DIVU, MEP_INSN_DRET - , MEP_INSN_DBREAK, MEP_INSN_LDZ, MEP_INSN_ABS, MEP_INSN_AVE - , MEP_INSN_MIN, MEP_INSN_MAX, MEP_INSN_MINU, MEP_INSN_MAXU - , MEP_INSN_CLIP, MEP_INSN_CLIPU, MEP_INSN_SADD, MEP_INSN_SSUB - , MEP_INSN_SADDU, MEP_INSN_SSUBU, MEP_INSN_SWCP, MEP_INSN_LWCP - , MEP_INSN_SMCP, MEP_INSN_LMCP, MEP_INSN_SWCPI, MEP_INSN_LWCPI - , MEP_INSN_SMCPI, MEP_INSN_LMCPI, MEP_INSN_SWCP16, MEP_INSN_LWCP16 - , MEP_INSN_SMCP16, MEP_INSN_LMCP16, MEP_INSN_SBCPA, MEP_INSN_LBCPA - , MEP_INSN_SHCPA, MEP_INSN_LHCPA, MEP_INSN_SWCPA, MEP_INSN_LWCPA - , MEP_INSN_SMCPA, MEP_INSN_LMCPA, MEP_INSN_SBCPM0, MEP_INSN_LBCPM0 - , MEP_INSN_SHCPM0, MEP_INSN_LHCPM0, MEP_INSN_SWCPM0, MEP_INSN_LWCPM0 - , MEP_INSN_SMCPM0, MEP_INSN_LMCPM0, MEP_INSN_SBCPM1, MEP_INSN_LBCPM1 - , MEP_INSN_SHCPM1, MEP_INSN_LHCPM1, MEP_INSN_SWCPM1, MEP_INSN_LWCPM1 - , MEP_INSN_SMCPM1, MEP_INSN_LMCPM1, MEP_INSN_BCPEQ, MEP_INSN_BCPNE - , MEP_INSN_BCPAT, MEP_INSN_BCPAF, MEP_INSN_SYNCCP, MEP_INSN_JSRV - , MEP_INSN_BSRV, MEP_INSN_SIM_SYSCALL, MEP_INSN_RI_0, MEP_INSN_RI_1 - , MEP_INSN_RI_2, MEP_INSN_RI_3, MEP_INSN_RI_4, MEP_INSN_RI_5 - , MEP_INSN_RI_6, MEP_INSN_RI_7, MEP_INSN_RI_8, MEP_INSN_RI_9 - , MEP_INSN_RI_10, MEP_INSN_RI_11, MEP_INSN_RI_12, MEP_INSN_RI_13 - , MEP_INSN_RI_14, MEP_INSN_RI_15, MEP_INSN_RI_17, MEP_INSN_RI_20 - , MEP_INSN_RI_21, MEP_INSN_RI_22, MEP_INSN_RI_23, MEP_INSN_RI_26 + , MEP_INSN_UCI, MEP_INSN_DSP, MEP_INSN_DSP0, MEP_INSN_DSP1 + , MEP_INSN_SB, MEP_INSN_SH, MEP_INSN_SW, MEP_INSN_LB + , MEP_INSN_LH, MEP_INSN_LW, MEP_INSN_LBU, MEP_INSN_LHU + , MEP_INSN_SW_SP, MEP_INSN_LW_SP, MEP_INSN_SB_TP, MEP_INSN_SH_TP + , MEP_INSN_SW_TP, MEP_INSN_LB_TP, MEP_INSN_LH_TP, MEP_INSN_LW_TP + , MEP_INSN_LBU_TP, MEP_INSN_LHU_TP, MEP_INSN_SB16, MEP_INSN_SH16 + , MEP_INSN_SW16, MEP_INSN_LB16, MEP_INSN_LH16, MEP_INSN_LW16 + , MEP_INSN_LBU16, MEP_INSN_LHU16, MEP_INSN_SW24, MEP_INSN_LW24 + , MEP_INSN_EXTB, MEP_INSN_EXTH, MEP_INSN_EXTUB, MEP_INSN_EXTUH + , MEP_INSN_SSARB, MEP_INSN_MOV, MEP_INSN_MOVI8, MEP_INSN_MOVI16 + , MEP_INSN_MOVU24, MEP_INSN_MOVU16, MEP_INSN_MOVH, MEP_INSN_ADD3 + , MEP_INSN_ADD, MEP_INSN_ADD3I, MEP_INSN_ADVCK3, MEP_INSN_SUB + , MEP_INSN_SBVCK3, MEP_INSN_NEG, MEP_INSN_SLT3, MEP_INSN_SLTU3 + , MEP_INSN_SLT3I, MEP_INSN_SLTU3I, MEP_INSN_SL1AD3, MEP_INSN_SL2AD3 + , MEP_INSN_ADD3X, MEP_INSN_SLT3X, MEP_INSN_SLTU3X, MEP_INSN_OR + , MEP_INSN_AND, MEP_INSN_XOR, MEP_INSN_NOR, MEP_INSN_OR3 + , MEP_INSN_AND3, MEP_INSN_XOR3, MEP_INSN_SRA, MEP_INSN_SRL + , MEP_INSN_SLL, MEP_INSN_SRAI, MEP_INSN_SRLI, MEP_INSN_SLLI + , MEP_INSN_SLL3, MEP_INSN_FSFT, MEP_INSN_BRA, MEP_INSN_BEQZ + , MEP_INSN_BNEZ, MEP_INSN_BEQI, MEP_INSN_BNEI, MEP_INSN_BLTI + , MEP_INSN_BGEI, MEP_INSN_BEQ, MEP_INSN_BNE, MEP_INSN_BSR12 + , MEP_INSN_BSR24, MEP_INSN_JMP, MEP_INSN_JMP24, MEP_INSN_JSR + , MEP_INSN_RET, MEP_INSN_REPEAT, MEP_INSN_EREPEAT, MEP_INSN_STC_LP + , MEP_INSN_STC_HI, MEP_INSN_STC_LO, MEP_INSN_STC, MEP_INSN_LDC_LP + , MEP_INSN_LDC_HI, MEP_INSN_LDC_LO, MEP_INSN_LDC, MEP_INSN_DI + , MEP_INSN_EI, MEP_INSN_RETI, MEP_INSN_HALT, MEP_INSN_SLEEP + , MEP_INSN_SWI, MEP_INSN_BREAK, MEP_INSN_SYNCM, MEP_INSN_STCB + , MEP_INSN_LDCB, MEP_INSN_BSETM, MEP_INSN_BCLRM, MEP_INSN_BNOTM + , MEP_INSN_BTSTM, MEP_INSN_TAS, MEP_INSN_CACHE, MEP_INSN_MUL + , MEP_INSN_MULU, MEP_INSN_MULR, MEP_INSN_MULRU, MEP_INSN_MADD + , MEP_INSN_MADDU, MEP_INSN_MADDR, MEP_INSN_MADDRU, MEP_INSN_DIV + , MEP_INSN_DIVU, MEP_INSN_DRET, MEP_INSN_DBREAK, MEP_INSN_LDZ + , MEP_INSN_ABS, MEP_INSN_AVE, MEP_INSN_MIN, MEP_INSN_MAX + , MEP_INSN_MINU, MEP_INSN_MAXU, MEP_INSN_CLIP, MEP_INSN_CLIPU + , MEP_INSN_SADD, MEP_INSN_SSUB, MEP_INSN_SADDU, MEP_INSN_SSUBU + , MEP_INSN_SWCP, MEP_INSN_LWCP, MEP_INSN_SMCP, MEP_INSN_LMCP + , MEP_INSN_SWCPI, MEP_INSN_LWCPI, MEP_INSN_SMCPI, MEP_INSN_LMCPI + , MEP_INSN_SWCP16, MEP_INSN_LWCP16, MEP_INSN_SMCP16, MEP_INSN_LMCP16 + , MEP_INSN_SBCPA, MEP_INSN_LBCPA, MEP_INSN_SHCPA, MEP_INSN_LHCPA + , MEP_INSN_SWCPA, MEP_INSN_LWCPA, MEP_INSN_SMCPA, MEP_INSN_LMCPA + , MEP_INSN_SBCPM0, MEP_INSN_LBCPM0, MEP_INSN_SHCPM0, MEP_INSN_LHCPM0 + , MEP_INSN_SWCPM0, MEP_INSN_LWCPM0, MEP_INSN_SMCPM0, MEP_INSN_LMCPM0 + , MEP_INSN_SBCPM1, MEP_INSN_LBCPM1, MEP_INSN_SHCPM1, MEP_INSN_LHCPM1 + , MEP_INSN_SWCPM1, MEP_INSN_LWCPM1, MEP_INSN_SMCPM1, MEP_INSN_LMCPM1 + , MEP_INSN_BCPEQ, MEP_INSN_BCPNE, MEP_INSN_BCPAT, MEP_INSN_BCPAF + , MEP_INSN_SYNCCP, MEP_INSN_JSRV, MEP_INSN_BSRV, MEP_INSN_SIM_SYSCALL + , MEP_INSN_RI_0, MEP_INSN_RI_1, MEP_INSN_RI_2, MEP_INSN_RI_3 + , MEP_INSN_RI_4, MEP_INSN_RI_5, MEP_INSN_RI_6, MEP_INSN_RI_7 + , MEP_INSN_RI_8, MEP_INSN_RI_9, MEP_INSN_RI_10, MEP_INSN_RI_11 + , MEP_INSN_RI_12, MEP_INSN_RI_13, MEP_INSN_RI_14, MEP_INSN_RI_15 + , MEP_INSN_RI_17, MEP_INSN_RI_20, MEP_INSN_RI_21, MEP_INSN_RI_22 + , MEP_INSN_RI_23, MEP_INSN_RI_26 } CGEN_INSN_TYPE; /* Index of `invalid' insn place holder. */ |