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-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/m68k-dis.c224
-rw-r--r--opcodes/m68k-opc.c2
3 files changed, 118 insertions, 113 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 2e3da58..54027b3 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+Thu Nov 2 23:06:33 1995 Ian Lance Taylor <ian@cygnus.com>
+
+ * m68k-opc.c: Use #W rather than #w.
+ * m68k-dis.c (print_insn_arg): Handle new 'W' place.
+
Wed Nov 1 13:30:24 1995 Ian Lance Taylor <ian@cygnus.com>
* m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf,
diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c
index d0845fd..7eab05e 100644
--- a/opcodes/m68k-dis.c
+++ b/opcodes/m68k-dis.c
@@ -13,48 +13,36 @@ GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
-Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "dis-asm.h"
#include "floatformat.h"
-/* Opcode/m68k.h is a massive table. As a kludge, break it up into
- two pieces. This makes nonportable C -- FIXME -- it assumes that
- two data items declared near each other will be contiguous in
- memory. This kludge can be removed, FIXME, when GCC is fixed to not
- be a hog about initializers. */
-
-#ifdef __GNUC__
-#define BREAK_UP_BIG_DECL }; \
- struct m68k_opcode m68k_opcodes_2[] = {
-#define AND_OTHER_PART sizeof (m68k_opcodes_2)
-#endif
-
#include "opcode/m68k.h"
-
/* Local function prototypes */
static int
fetch_arg PARAMS ((unsigned char *, int, int, disassemble_info *));
static void
-print_base PARAMS ((int, int, disassemble_info*));
+print_base PARAMS ((int, bfd_vma, disassemble_info*));
static unsigned char *
print_indexed PARAMS ((int, unsigned char *, bfd_vma, disassemble_info *));
static int
-print_insn_arg PARAMS ((char *, unsigned char *, unsigned char *, bfd_vma,
- disassemble_info *));
+print_insn_arg PARAMS ((const char *, unsigned char *, unsigned char *,
+ bfd_vma, disassemble_info *));
CONST char * CONST fpcr_names[] = {
- "", "fpiar", "fpsr", "fpiar/fpsr", "fpcr",
- "fpiar/fpcr", "fpsr/fpcr", "fpiar/fpsr/fpcr"};
+ "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
+ "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"};
-static char *reg_names[] = {
- "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "a0",
- "a1", "a2", "a3", "a4", "a5", "fp", "sp", "ps", "pc"};
+static char *const reg_names[] = {
+ "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
+ "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
+ "%ps", "%pc"};
/* Sign-extend an (unsigned char). */
#if __STDC__ == 1
@@ -171,18 +159,6 @@ dummy_print_address (vma, info)
{
}
-static const struct m68k_opcode *
-opcode (idx)
- int idx;
-{
-#ifdef __GNUC__
- const int max = sizeof (m68k_opcodes) / sizeof (m68k_opcodes[0]);
- if (idx >= max)
- return &m68k_opcodes_2[idx - max];
-#endif
- return &m68k_opcodes[idx];
-}
-
/* Print the m68k instruction at address MEMADDR in debugged memory,
on INFO->STREAM. Returns length of the instruction, in bytes. */
@@ -194,7 +170,7 @@ print_insn_m68k (memaddr, info)
register int i;
register unsigned char *p;
unsigned char *save_p;
- register char *d;
+ register const char *d;
register unsigned long bestmask;
const struct m68k_opcode *best = 0;
struct private priv;
@@ -212,15 +188,12 @@ print_insn_m68k (memaddr, info)
bestmask = 0;
FETCH_DATA (info, buffer + 2);
- for (i = 0; i < numopcodes; i++)
+ for (i = 0; i < m68k_numopcodes; i++)
{
- const struct m68k_opcode *opc = opcode (i);
+ const struct m68k_opcode *opc = &m68k_opcodes[i];
unsigned long opcode = opc->opcode;
unsigned long match = opc->match;
- if (opc->flags & F_ALIAS)
- continue;
-
if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
&& ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
/* Only fetch the next two bytes if we need to. */
@@ -300,9 +273,10 @@ print_insn_m68k (memaddr, info)
break;
}
}
- /* pflusha is an exception; it takes no arguments but is two words long. */
- if (buffer[0] == 0xf0 && buffer[1] == 0 && buffer[2] == 0x24 &&
- buffer[3] == 0)
+ /* Some opcodes like pflusha and lpstop are exceptions; they take no
+ arguments but are two words long. Recognize them by looking at
+ the lower 16 bits of the mask. */
+ if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
p = buffer + 4;
FETCH_DATA (info, p);
@@ -367,7 +341,7 @@ print_insn_m68k (memaddr, info)
static int
print_insn_arg (d, buffer, p0, addr, info)
- char *d;
+ const char *d;
unsigned char *buffer;
unsigned char *p0;
bfd_vma addr; /* PC for this arg to be relative to */
@@ -386,7 +360,7 @@ print_insn_arg (d, buffer, p0, addr, info)
{
case 'c': /* cache identifier */
{
- static char *cacheFieldName[] = { "NOP", "dc", "ic", "bc" };
+ static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
val = fetch_arg (buffer, place, 2, info);
(*info->fprintf_func) (info->stream, cacheFieldName[val]);
break;
@@ -404,42 +378,41 @@ print_insn_arg (d, buffer, p0, addr, info)
case '_': /* 32-bit absolute address for move16. */
{
val = NEXTLONG (p);
- (*info->fprintf_func) (info->stream, "@#");
(*info->print_address_func) (val, info);
break;
}
case 'C':
- (*info->fprintf_func) (info->stream, "ccr");
+ (*info->fprintf_func) (info->stream, "%%ccr");
break;
case 'S':
- (*info->fprintf_func) (info->stream, "sr");
+ (*info->fprintf_func) (info->stream, "%%sr");
break;
case 'U':
- (*info->fprintf_func) (info->stream, "usp");
+ (*info->fprintf_func) (info->stream, "%%usp");
break;
case 'J':
{
- static struct { char *name; int value; } names[]
- = {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
- {"tc", 0x003}, {"itt0",0x004}, {"itt1", 0x005},
- {"dtt0",0x006}, {"dtt1",0x007}, {"buscr",0x008},
- {"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
- {"msp", 0x803}, {"isp", 0x804},
+ static const struct { char *name; int value; } names[]
+ = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
+ {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
+ {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
+ {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
+ {"%msp", 0x803}, {"%ibsp", 0x804},
/* Should we be calling this psr like we do in case 'Y'? */
- {"mmusr",0x805},
+ {"%mmusr",0x805},
- {"urp", 0x806}, {"srp", 0x807}, {"pcr", 0x808}};
+ {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
val = fetch_arg (buffer, place, 12, info);
for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
if (names[regno].value == val)
{
- (*info->fprintf_func) (info->stream, names[regno].name);
+ (*info->fprintf_func) (info->stream, "%s", names[regno].name);
break;
}
if (regno < 0)
@@ -485,14 +458,16 @@ print_insn_arg (d, buffer, p0, addr, info)
break;
case 'r':
- (*info->fprintf_func)
- (info->stream, "%s@",
- reg_names[fetch_arg (buffer, place, 4, info)]);
+ regno = fetch_arg (buffer, place, 4, info);
+ if (regno > 7)
+ (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
+ else
+ (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
break;
case 'F':
(*info->fprintf_func)
- (info->stream, "fp%d",
+ (info->stream, "%%fp%d",
fetch_arg (buffer, place, 3, info));
break;
@@ -545,7 +520,7 @@ print_insn_arg (d, buffer, p0, addr, info)
val = fetch_arg (buffer, place, 8, info);
else if (place == 'b')
val = NEXTBYTE (p1);
- else if (place == 'w')
+ else if (place == 'w' || place == 'W')
val = NEXTWORD (p1);
else if (place == 'l')
val = NEXTLONG (p1);
@@ -561,7 +536,7 @@ print_insn_arg (d, buffer, p0, addr, info)
val = COERCE_SIGNED_CHAR(buffer[1]);
else if (place == 'w' || place == 'W')
val = NEXTWORD (p);
- else if (place == 'l' || place == 'L')
+ else if (place == 'l' || place == 'L' || place == 'C')
val = NEXTLONG (p);
else if (place == 'g')
{
@@ -664,13 +639,11 @@ print_insn_arg (d, buffer, p0, addr, info)
{
case 0:
val = NEXTWORD (p);
- (*info->fprintf_func) (info->stream, "@#");
(*info->print_address_func) (val, info);
break;
case 1:
val = NEXTLONG (p);
- (*info->fprintf_func) (info->stream, "@#");
(*info->print_address_func) (val, info);
break;
@@ -804,12 +777,12 @@ print_insn_arg (d, buffer, p0, addr, info)
if (doneany)
(*info->fprintf_func) (info->stream, "/");
doneany = 1;
- (*info->fprintf_func) (info->stream, "fp%d", regno);
+ (*info->fprintf_func) (info->stream, "%%fp%d", regno);
first_regno = regno;
while (val & (1 << (regno + 1)))
++regno;
if (regno > first_regno)
- (*info->fprintf_func) (info->stream, "-fp%d", regno);
+ (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
}
}
else
@@ -821,31 +794,33 @@ print_insn_arg (d, buffer, p0, addr, info)
case 'Y':
case 'Z':
case 'W':
+ case '0':
+ case '1':
+ case '2':
case '3':
- case 'P':
{
int val = fetch_arg (buffer, place, 5, info);
char *name = 0;
switch (val)
{
- case 2: name = "tt0"; break;
- case 3: name = "tt1"; break;
- case 0x10: name = "tc"; break;
- case 0x11: name = "drp"; break;
- case 0x12: name = "srp"; break;
- case 0x13: name = "crp"; break;
- case 0x14: name = "cal"; break;
- case 0x15: name = "val"; break;
- case 0x16: name = "scc"; break;
- case 0x17: name = "ac"; break;
- case 0x18: name = "psr"; break;
- case 0x19: name = "pcsr"; break;
+ case 2: name = "%tt0"; break;
+ case 3: name = "%tt1"; break;
+ case 0x10: name = "%tc"; break;
+ case 0x11: name = "%drp"; break;
+ case 0x12: name = "%srp"; break;
+ case 0x13: name = "%crp"; break;
+ case 0x14: name = "%cal"; break;
+ case 0x15: name = "%val"; break;
+ case 0x16: name = "%scc"; break;
+ case 0x17: name = "%ac"; break;
+ case 0x18: name = "%psr"; break;
+ case 0x19: name = "%pcsr"; break;
case 0x1c:
case 0x1d:
{
int break_reg = ((buffer[3] >> 2) & 7);
(*info->fprintf_func)
- (info->stream, val == 0x1c ? "bad%d" : "bac%d",
+ (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
break_reg);
}
break;
@@ -853,7 +828,7 @@ print_insn_arg (d, buffer, p0, addr, info)
(*info->fprintf_func) (info->stream, "<mmu register %d>", val);
}
if (name)
- (*info->fprintf_func) (info->stream, name);
+ (*info->fprintf_func) (info->stream, "%s", name);
}
break;
@@ -861,16 +836,16 @@ print_insn_arg (d, buffer, p0, addr, info)
{
int fc = fetch_arg (buffer, place, 5, info);
if (fc == 1)
- (*info->fprintf_func) (info->stream, "dfc");
+ (*info->fprintf_func) (info->stream, "%%dfc");
else if (fc == 0)
- (*info->fprintf_func) (info->stream, "sfc");
+ (*info->fprintf_func) (info->stream, "%%sfc");
else
(*info->fprintf_func) (info->stream, "<function code %d>", fc);
}
break;
case 'V':
- (*info->fprintf_func) (info->stream, "val");
+ (*info->fprintf_func) (info->stream, "%%val");
break;
case 't':
@@ -1022,16 +997,17 @@ print_indexed (basereg, p, addr, info)
disassemble_info *info;
{
register int word;
- static char *scales[] = {"", "*2", "*4", "*8"};
- register int base_disp;
- register int outer_disp;
+ static char *const scales[] = {"", ":2", ":4", ":8"};
+ bfd_vma base_disp;
+ bfd_vma outer_disp;
char buf[40];
+ char vmabuf[50];
word = NEXTWORD (p);
/* Generate the text for the index register.
Where this will be output is not yet determined. */
- sprintf (buf, "[%s.%c%s]",
+ sprintf (buf, "%s:%c%s",
reg_names[(word >> 12) & 0xf],
(word & 0x800) ? 'l' : 'w',
scales[(word >> 9) & 3]);
@@ -1040,11 +1016,13 @@ print_indexed (basereg, p, addr, info)
if ((word & 0x100) == 0)
{
- print_base (basereg,
- ((word & 0x80) ? word | 0xff00 : word & 0xff)
- + ((basereg == -1) ? addr : 0),
- info);
- (*info->fprintf_func) (info->stream, "%s", buf);
+ word &= 0xff;
+ if ((word & 0x80) != 0)
+ word -= 0x100;
+ if (basereg == -1)
+ word += addr;
+ print_base (basereg, word, info);
+ (*info->fprintf_func) (info->stream, ",%s)", buf);
return p;
}
@@ -1052,9 +1030,14 @@ print_indexed (basereg, p, addr, info)
/* First, compute the displacement to add to the base register. */
if (word & 0200)
- basereg = -2;
+ {
+ if (basereg == -1)
+ basereg = -3;
+ else
+ basereg = -2;
+ }
if (word & 0100)
- buf[0] = 0;
+ buf[0] = '\0';
base_disp = 0;
switch ((word >> 4) & 3)
{
@@ -1072,7 +1055,9 @@ print_indexed (basereg, p, addr, info)
if ((word & 7) == 0)
{
print_base (basereg, base_disp, info);
- (*info->fprintf_func) (info->stream, "%s", buf);
+ if (buf[0] != '\0')
+ (*info->fprintf_func) (info->stream, ",%s", buf);
+ (*info->fprintf_func) (info->stream, ")");
return p;
}
@@ -1088,15 +1073,17 @@ print_indexed (basereg, p, addr, info)
outer_disp = NEXTLONG (p);
}
- (*info->fprintf_func) (info->stream, "%d(", outer_disp);
print_base (basereg, base_disp, info);
-
- /* If postindexed, print the closeparen before the index. */
- if (word & 4)
- (*info->fprintf_func) (info->stream, ")%s", buf);
- /* If preindexed, print the closeparen after the index. */
- else
- (*info->fprintf_func) (info->stream, "%s)", buf);
+ if ((word & 4) == 0 && buf[0] != '\0')
+ {
+ (*info->fprintf_func) (info->stream, ",%s", buf);
+ buf[0] = '\0';
+ }
+ sprintf_vma (vmabuf, outer_disp);
+ (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
+ if (buf[0] != '\0')
+ (*info->fprintf_func) (info->stream, ",%s", buf);
+ (*info->fprintf_func) (info->stream, ")");
return p;
}
@@ -1107,13 +1094,26 @@ print_indexed (basereg, p, addr, info)
static void
print_base (regno, disp, info)
int regno;
- int disp;
+ bfd_vma disp;
disassemble_info *info;
{
- if (regno == -2)
- (*info->fprintf_func) (info->stream, "%d", disp);
- else if (regno == -1)
- (*info->fprintf_func) (info->stream, "0x%x", (unsigned) disp);
+ if (regno == -1)
+ {
+ (*info->fprintf_func) (info->stream, "%%pc@(");
+ (*info->print_address_func) (disp, info);
+ }
else
- (*info->fprintf_func) (info->stream, "%d(%s)", disp, reg_names[regno]);
+ {
+ char buf[50];
+
+ if (regno == -2)
+ (*info->fprintf_func) (info->stream, "@(");
+ else if (regno == -3)
+ (*info->fprintf_func) (info->stream, "%%zpc@(");
+ else
+ (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
+
+ sprintf_vma (buf, disp);
+ (*info->fprintf_func) (info->stream, "%s", buf);
+ }
}
diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index 2265c3e..707d6af 100644
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -1202,7 +1202,7 @@ const struct m68k_opcode m68k_opcodes[] =
{"linkw", one(0047120), one(0177770), "As#w", m68000up },
{"linkl", one(0044010), one(0177770), "As#l", m68020up | cpu32 },
-{"link", one(0047120), one(0177770), "As#w", m68000up },
+{"link", one(0047120), one(0177770), "As#W", m68000up },
{"link", one(0044010), one(0177770), "As#l", m68020up | cpu32 },
{"lslb", one(0160410), one(0170770), "QdDs", m68000up },