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-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/Makefile.in36
-rw-r--r--opcodes/mips-dis.c84
3 files changed, 80 insertions, 46 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 3a28f11..cfe72b2 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+Tue Jul 6 15:18:37 1993 Ian Lance Taylor (ian@cygnus.com)
+
+ * mips-dis.c: Updated to account for name changes in new version
+ of opcode/mips.h.
+ * Makefile.in: Added header file dependencies.
+
Sat Jul 3 23:47:56 1993 Doug Evans (dje@canuck.cygnus.com)
* h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index ec8cfb2..d550dc9 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -53,9 +53,9 @@ BISON = bison
MAKEINFO = makeinfo
RANLIB = ranlib
-INCDIR = $(srcdir)/../include
+INCDIR = $(srcdir)/../include
BFDDIR = $(srcdir)/../bfd
-CSEARCH = -I. -I$(srcdir) -I../include -I$(INCDIR) -I$(BFDDIR)
+CSEARCH = -I. -I$(srcdir) -I../bfd -I$(INCDIR) -I$(BFDDIR)
DEP = mkdep
@@ -112,22 +112,22 @@ $(TARGETLIB): $(OFILES)
$(AR) $(AR_FLAGS) $(TARGETLIB) $(OFILES)
$(RANLIB) $(TARGETLIB)
-# Circumvent Sun Make bug with VPATH.
-a29k-dis.o: a29k-dis.c
-dis-buf.o: dis-buf.c
-h8500-dis.o: h8500-dis.c
-h8300-dis.o: h8300-dis.c
-i386-dis.o: i386-dis.c
-i960-dis.o: i960-dis.c
-m68881-ext.o: m68881-ext.c
-m68k-dis.o: m68k-dis.c
-mips-dis.o: mips-dis.c
-sparc-dis.o: sparc-dis.c
-sparc-opc.o: sparc-opc.c
-z8k-dis.o: z8k-dis.c
-sh-dis.o: sh-dis.c
-alpha-dis.o: alpha-dis.c
-hppa-dis.o: hppa-dis.c $(srcdir)/../include/opcode/hppa.h
+a29k-dis.o: a29k-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/a29k.h
+dis-buf.o: dis-buf.c $(INCDIR)/dis-asm.h
+h8500-dis.o: h8500-dis.c h8500-opc.h $(INCDIR)/dis-asm.h
+h8300-dis.o: h8300-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/h8300.h
+i386-dis.o: i386-dis.c $(INCDIR)/dis-asm.h
+i960-dis.o: i960-dis.c $(INCDIR)/dis-asm.h
+m68881-ext.o: m68881-ext.c $(INCDIR)/ieee-float.h
+m68k-dis.o: m68k-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/ieee-float.h \
+ $(INCDIR)/opcode/m68k.h
+mips-dis.o: mips-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/mips.h
+sparc-dis.o: sparc-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/sparc.h
+sparc-opc.o: sparc-opc.c $(INCDIR)/opcode/sparc.h
+z8k-dis.o: z8k-dis.c z8k-opc.h $(INCDIR)/dis-asm.h
+sh-dis.o: sh-dis.c sh-opc.h $(INCDIR)/dis-asm.h
+alpha-dis.o: alpha-dis.c alpha-opc.h $(INCDIR)/dis-asm.h
+hppa-dis.o: hppa-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/hppa.h
tags etags: TAGS
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index aaf2beb..6806bcd 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -26,21 +26,8 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* FIXME: we need direct access to the swapping functions. */
#include "libbfd.h"
-/* We use bfd_vma in a couple of places where gdb expects CORE_ADDR. */
-#ifdef HOST_64_BIT
- #error FIXME: bfd_vma will not match gdb expectations
-#endif
-
-/* This file is used both by gdb and by objdump. A program which
- wants to use this code must provide an external function
- print_address. */
-extern int print_address PARAMS ((bfd_vma, FILE *));
-
/* Mips instructions are never longer than this many bytes. */
#define MAXLEN 4
-
-/* Number of elements in the opcode table. */
-#define NOPCODES (sizeof mips_opcodes / sizeof mips_opcodes[0])
/* FIXME: This should be shared with gdb somehow. */
#define REGISTER_NAMES \
@@ -67,6 +54,8 @@ print_insn_arg (d, l, pc, info)
bfd_vma pc;
struct disassemble_info *info;
{
+ int delta;
+
switch (*d)
{
case ',':
@@ -76,34 +65,48 @@ print_insn_arg (d, l, pc, info)
break;
case 's':
+ case 'b':
+ case 'r':
+ case 'v':
(*info->fprintf_func) (info->stream, "$%s",
reg_names[(l >> OP_SH_RS) & OP_MASK_RS]);
break;
case 't':
+ case 'w':
(*info->fprintf_func) (info->stream, "$%s",
reg_names[(l >> OP_SH_RT) & OP_MASK_RT]);
break;
case 'i':
+ case 'u':
(*info->fprintf_func) (info->stream, "%d",
(l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE);
break;
case 'j': /* same as i, but sign-extended */
+ case 'o':
+ delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
+ if (delta & 0x8000)
+ delta |= ~0xffff;
(*info->fprintf_func) (info->stream, "%d",
- (l >> OP_SH_DELTA) & OP_MASK_DELTA);
+ delta);
break;
case 'a':
- print_address (((pc & 0xF0000000)
- | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)),
- info->stream);
+ (*info->print_address_func)
+ (((pc & 0xF0000000) | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)),
+ info);
break;
- case 'b':
- print_address ((((l >> OP_SH_DELTA) & OP_MASK_DELTA) << 2) + pc + 4,
- info->stream);
+ case 'p':
+ /* sign extend the displacement */
+ delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
+ if (delta & 0x8000)
+ delta |= ~0xffff;
+ (*info->print_address_func)
+ ((delta << 2) + pc + 4,
+ info);
break;
case 'd':
@@ -111,22 +114,34 @@ print_insn_arg (d, l, pc, info)
reg_names[(l >> OP_SH_RD) & OP_MASK_RD]);
break;
- case 'h':
+ case '<':
(*info->fprintf_func) (info->stream, "0x%x",
(l >> OP_SH_SHAMT) & OP_MASK_SHAMT);
break;
- case 'B':
+ case 'c':
(*info->fprintf_func) (info->stream, "0x%x",
(l >> OP_SH_CODE) & OP_MASK_CODE);
break;
+ case 'C':
+ (*info->fprintf_func) (info->stream, "0x%x",
+ (l >> OP_SH_COPZ) & OP_MASK_COPZ);
+ break;
+
+ case 'B':
+ (*info->fprintf_func) (info->stream, "0x%x",
+ (l >> OP_SH_SYSCALL) & OP_MASK_SYSCALL);
+ break;
+
case 'S':
+ case 'V':
(*info->fprintf_func) (info->stream, "$f%d",
(l >> OP_SH_FS) & OP_MASK_FS);
break;
case 'T':
+ case 'W':
(*info->fprintf_func) (info->stream, "$f%d",
(l >> OP_SH_FT) & OP_MASK_FT);
break;
@@ -136,6 +151,16 @@ print_insn_arg (d, l, pc, info)
(l >> OP_SH_FD) & OP_MASK_FD);
break;
+ case 'E':
+ (*info->fprintf_func) (info->stream, "$%d",
+ (l >> OP_SH_RT) & OP_MASK_RT);
+ break;
+
+ case 'G':
+ (*info->fprintf_func) (info->stream, "$%d",
+ (l >> OP_SH_RD) & OP_MASK_RD);
+ break;
+
default:
(*info->fprintf_func) (info->stream,
"# internal error, undefined modifier(%c)", *d);
@@ -157,16 +182,19 @@ _print_insn_mips (memaddr, word, info)
register int i;
register char *d;
- for (i = 0; i < NOPCODES; i++)
+ for (i = 0; i < NUMOPCODES; i++)
{
- register unsigned int opcode = mips_opcodes[i].opcode;
- register unsigned int match = mips_opcodes[i].match;
- if ((word & match) == opcode)
- break;
+ if (mips_opcodes[i].pinfo != INSN_MACRO)
+ {
+ register unsigned int match = mips_opcodes[i].match;
+ register unsigned int mask = mips_opcodes[i].mask;
+ if ((word & mask) == match)
+ break;
+ }
}
/* Handle undefined instructions. */
- if (i == NOPCODES)
+ if (i == NUMOPCODES)
{
(*info->fprintf_func) (info->stream, "0x%x", word);
return 4;