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-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/aarch64-opc.c16
2 files changed, 21 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9385878..3d84fbe 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,10 @@
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
+ * aarch64-opc.c (aarch64_sys_regs_dc): Add "cvap".
+ (aarch64_sys_ins_reg_supported_p): New.
+
+2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
+
* aarch64-dis.c (aarch64_ext_regrt_sysins): Replace use of has_xt
with aarch64_sys_ins_reg_has_xt.
(aarch64_ext_sysins_op): Likewise.
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 2ae2f10..86aeae0 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -3264,6 +3264,7 @@ const aarch64_sys_ins_reg aarch64_sys_regs_dc[] =
{ "cvac", CPENS (3, C7, C10, 1), F_HASXT },
{ "csw", CPENS (0, C7, C10, 2), F_HASXT },
{ "cvau", CPENS (3, C7, C11, 1), F_HASXT },
+ { "cvap", CPENS (3, C7, C12, 1), F_HASXT | F_ARCHEXT },
{ "civac", CPENS (3, C7, C14, 1), F_HASXT },
{ "cisw", CPENS (0, C7, C14, 2), F_HASXT },
{ 0, CPENS(0,0,0,0), 0 }
@@ -3329,6 +3330,21 @@ aarch64_sys_ins_reg_has_xt (const aarch64_sys_ins_reg *sys_ins_reg)
return (sys_ins_reg->flags & F_HASXT) != 0;
}
+extern bfd_boolean
+aarch64_sys_ins_reg_supported_p (const aarch64_feature_set features,
+ const aarch64_sys_ins_reg *reg)
+{
+ if (!(reg->flags & F_ARCHEXT))
+ return TRUE;
+
+ /* DC CVAP. Values are from aarch64_sys_regs_dc. */
+ if (reg->value == CPENS (3, C7, C12, 1)
+ && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
+ return FALSE;
+
+ return TRUE;
+}
+
#undef C0
#undef C1
#undef C2