diff options
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 3 | ||||
| -rw-r--r-- | opcodes/v850-opc.c | 168 |
2 files changed, 87 insertions, 84 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index be0e150..d589dc6 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,6 +1,9 @@ start-sanitize-v850 Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com) + * v850-opc.c (v850_opcodes): Add initializer for size field + on all opcodes. + * v850-opc.c (v850_operands): D6 -> DS7. References changed. Add D8 for 8-bit unsigned field in short load/store insns. (IF4A, IF4D): These both need two registers. diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c index 8c3d45e..91bfcbe 100644 --- a/opcodes/v850-opc.c +++ b/opcodes/v850-opc.c @@ -123,106 +123,106 @@ const struct v850_operand v850_operands[] = { const struct v850_opcode v850_opcodes[] = { /* load/store instructions */ -{ "sld.b", OP(0x00), OP_MASK, IF4A }, -{ "sld.h", OP(0x00), OP_MASK, IF4C }, -{ "sld.w", OP(0x00), OP_MASK, IF4C }, -{ "sst.b", OP(0x00), OP_MASK, IF4B }, -{ "sst.h", OP(0x00), OP_MASK, IF4D }, -{ "sst.w", OP(0x00), OP_MASK, IF4D }, - -{ "ld.b", OP(0x00), OP_MASK, IF7A }, -{ "ld.h", OP(0x00), OP_MASK, IF7A }, -{ "ld.w", OP(0x00), OP_MASK, IF7A }, -{ "st.b", OP(0x00), OP_MASK, IF7B }, -{ "st.h", OP(0x00), OP_MASK, IF7B }, -{ "st.w", OP(0x00), OP_MASK, IF7B }, +{ "sld.b", OP(0x00), OP_MASK, IF4A, 2 }, +{ "sld.h", OP(0x00), OP_MASK, IF4C, 2 }, +{ "sld.w", OP(0x00), OP_MASK, IF4C, 2 }, +{ "sst.b", OP(0x00), OP_MASK, IF4B, 2 }, +{ "sst.h", OP(0x00), OP_MASK, IF4D, 2 }, +{ "sst.w", OP(0x00), OP_MASK, IF4D, 2 }, + +{ "ld.b", OP(0x00), OP_MASK, IF7A, 4 }, +{ "ld.h", OP(0x00), OP_MASK, IF7A, 4 }, +{ "ld.w", OP(0x00), OP_MASK, IF7A, 4 }, +{ "st.b", OP(0x00), OP_MASK, IF7B, 4 }, +{ "st.h", OP(0x00), OP_MASK, IF7B, 4 }, +{ "st.w", OP(0x00), OP_MASK, IF7B, 4 }, /* arithmetic operation instructions */ -{ "mov", OP(0x00), OP_MASK, IF1 }, -{ "mov", OP(0x08), OP_MASK, IF2 }, -{ "movea", OP(0x31), OP_MASK, IF6 }, -{ "movhi", OP(0x31), OP_MASK, IF6 }, -{ "add", OP(0x0e), OP_MASK, IF1 }, -{ "add", OP(0x12), OP_MASK, IF2 }, -{ "addi", OP(0x30), OP_MASK, IF6 }, -{ "sub", OP(0x0d), OP_MASK, IF1 }, -{ "subr", OP(0x0c), OP_MASK, IF1 }, -{ "mulh", OP(0x07), OP_MASK, IF1 }, -{ "mulh", OP(0x17), OP_MASK, IF2 }, -{ "mulhi", OP(0x37), OP_MASK, IF6 }, -{ "divh", OP(0x02), OP_MASK, IF1 }, -{ "cmp", OP(0x0f), OP_MASK, IF1 }, -{ "cmp", OP(0x13), OP_MASK, IF2 }, -{ "setf", two(0x0000,0x0000), two(0x0000,0xffff), {CCCC,R2} }, +{ "mov", OP(0x00), OP_MASK, IF1, 2 }, +{ "mov", OP(0x08), OP_MASK, IF2, 2 }, +{ "movea", OP(0x31), OP_MASK, IF6, 4 }, +{ "movhi", OP(0x31), OP_MASK, IF6, 4 }, +{ "add", OP(0x0e), OP_MASK, IF1, 2 }, +{ "add", OP(0x12), OP_MASK, IF2, 2 }, +{ "addi", OP(0x30), OP_MASK, IF6, 4 }, +{ "sub", OP(0x0d), OP_MASK, IF1, 2 }, +{ "subr", OP(0x0c), OP_MASK, IF1, 2 }, +{ "mulh", OP(0x07), OP_MASK, IF1, 2 }, +{ "mulh", OP(0x17), OP_MASK, IF2, 2 }, +{ "mulhi", OP(0x37), OP_MASK, IF6, 4 }, +{ "divh", OP(0x02), OP_MASK, IF1, 2 }, +{ "cmp", OP(0x0f), OP_MASK, IF1, 2 }, +{ "cmp", OP(0x13), OP_MASK, IF2, 2 }, +{ "setf", two(0x0000,0x0000), two(0x0000,0xffff), {CCCC,R2}, 4 }, /* saturated operation instructions */ -{ "satadd", OP(0x06), OP_MASK, IF1 }, -{ "satadd", OP(0x11), OP_MASK, IF2 }, -{ "satsub", OP(0x05), OP_MASK, IF1 }, -{ "satsubi", OP(0x33), OP_MASK, IF6 }, -{ "satsubr", OP(0x04), OP_MASK, IF1 }, +{ "satadd", OP(0x06), OP_MASK, IF1, 2 }, +{ "satadd", OP(0x11), OP_MASK, IF2, 2 }, +{ "satsub", OP(0x05), OP_MASK, IF1, 2 }, +{ "satsubi", OP(0x33), OP_MASK, IF6, 4 }, +{ "satsubr", OP(0x04), OP_MASK, IF1, 2 }, /* logical operation instructions */ -{ "tst", OP(0x0b), OP_MASK, IF1 }, -{ "or", OP(0x08), OP_MASK, IF1 }, -{ "ori", OP(0x34), OP_MASK, IF6 }, -{ "and", OP(0x0a), OP_MASK, IF1 }, -{ "andi", OP(0x36), OP_MASK, IF6 }, -{ "xor", OP(0x09), OP_MASK, IF1 }, -{ "xori", OP(0x35), OP_MASK, IF6 }, -{ "not", OP(0x01), OP_MASK, IF1 }, -{ "sar", OP(0x15), OP_MASK, {I5U, R2} }, -{ "sar", two(0x07e0,0x00a0), two(0x07e0,0xffff), {R1,R2} }, -{ "shl", OP(0x16), OP_MASK, {I5U, R2} }, -{ "shl", two(0x07e0,0x00c0), two(0x07e0,0xffff), {R1,R2} }, -{ "shr", OP(0x14), OP_MASK, {I5U, R2} }, -{ "shr", two(0x07e0,0x0080), two(0x07e0,0xffff), {R1,R2} }, +{ "tst", OP(0x0b), OP_MASK, IF1, 2 }, +{ "or", OP(0x08), OP_MASK, IF1, 2 }, +{ "ori", OP(0x34), OP_MASK, IF6, 4 }, +{ "and", OP(0x0a), OP_MASK, IF1, 2 }, +{ "andi", OP(0x36), OP_MASK, IF6, 4 }, +{ "xor", OP(0x09), OP_MASK, IF1, 2 }, +{ "xori", OP(0x35), OP_MASK, IF6, 4 }, +{ "not", OP(0x01), OP_MASK, IF1, 4 }, +{ "sar", OP(0x15), OP_MASK, {I5U, R2}, 2 }, +{ "sar", two(0x07e0,0x00a0), two(0x07e0,0xffff), {R1,R2}, 4 }, +{ "shl", OP(0x16), OP_MASK, {I5U, R2}, 2 }, +{ "shl", two(0x07e0,0x00c0), two(0x07e0,0xffff), {R1,R2}, 4 }, +{ "shr", OP(0x14), OP_MASK, {I5U, R2}, 2 }, +{ "shr", two(0x07e0,0x0080), two(0x07e0,0xffff), {R1,R2}, 4 }, /* branch instructions */ /* signed integer */ -{ "bgt", BOP(0xf), BOP_MASK, IF3 }, -{ "bge", BOP(0xe), BOP_MASK, IF3 }, -{ "blt", BOP(0x6), BOP_MASK, IF3 }, -{ "ble", BOP(0x7), BOP_MASK, IF3 }, +{ "bgt", BOP(0xf), BOP_MASK, IF3, 2 }, +{ "bge", BOP(0xe), BOP_MASK, IF3, 2 }, +{ "blt", BOP(0x6), BOP_MASK, IF3, 2 }, +{ "ble", BOP(0x7), BOP_MASK, IF3, 2 }, /* unsigned integer */ -{ "bh", BOP(0xb), BOP_MASK, IF3 }, -{ "bnh", BOP(0x3), BOP_MASK, IF3 }, -{ "bl", BOP(0x1), BOP_MASK, IF3 }, -{ "bnl", BOP(0x9), BOP_MASK, IF3 }, +{ "bh", BOP(0xb), BOP_MASK, IF3, 2 }, +{ "bnh", BOP(0x3), BOP_MASK, IF3, 2 }, +{ "bl", BOP(0x1), BOP_MASK, IF3, 2 }, +{ "bnl", BOP(0x9), BOP_MASK, IF3, 2 }, /* common */ -{ "be", BOP(0x2), BOP_MASK, IF3 }, -{ "bne", BOP(0xa), BOP_MASK, IF3 }, +{ "be", BOP(0x2), BOP_MASK, IF3, 2 }, +{ "bne", BOP(0xa), BOP_MASK, IF3, 2 }, /* others */ -{ "bv", BOP(0x0), BOP_MASK, IF3 }, -{ "bnv", BOP(0x8), BOP_MASK, IF3 }, -{ "bn", BOP(0x4), BOP_MASK, IF3 }, -{ "bp", BOP(0xc), BOP_MASK, IF3 }, -{ "bc", BOP(0x1), BOP_MASK, IF3 }, -{ "bnc", BOP(0x9), BOP_MASK, IF3 }, -{ "bz", BOP(0x2), BOP_MASK, IF3 }, -{ "bnz", BOP(0xa), BOP_MASK, IF3 }, -{ "br", BOP(0x5), BOP_MASK, IF3 }, -{ "bsa", BOP(0xd), BOP_MASK, IF3 }, - -{ "jmp", one(0x0060), one(0xffe0), R1 }, -{ "jarl", one(0x0780), one(0xf83f), { D22, R2 } }, -{ "jr", one(0x0780), one(0xffe0), { D22 } }, +{ "bv", BOP(0x0), BOP_MASK, IF3, 2 }, +{ "bnv", BOP(0x8), BOP_MASK, IF3, 2 }, +{ "bn", BOP(0x4), BOP_MASK, IF3, 2 }, +{ "bp", BOP(0xc), BOP_MASK, IF3, 2 }, +{ "bc", BOP(0x1), BOP_MASK, IF3, 2 }, +{ "bnc", BOP(0x9), BOP_MASK, IF3, 2 }, +{ "bz", BOP(0x2), BOP_MASK, IF3, 2 }, +{ "bnz", BOP(0xa), BOP_MASK, IF3, 2 }, +{ "br", BOP(0x5), BOP_MASK, IF3, 2 }, +{ "bsa", BOP(0xd), BOP_MASK, IF3, 2 }, + +{ "jmp", one(0x0060), one(0xffe0), R1, 2 }, +{ "jarl", one(0x0780), one(0xf83f), { D22, R2 }, 4 }, +{ "jr", one(0x0780), one(0xffe0), { D22 }, 4 }, /* bit manipulation instructions */ -{ "set1", two(0x07c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1} }, -{ "not1", two(0x47c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1} }, -{ "clr1", two(0x87c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1} }, -{ "tst1", two(0xc7c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1} }, +{ "set1", two(0x07c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 4 }, +{ "not1", two(0x47c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 4 }, +{ "clr1", two(0x87c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 4 }, +{ "tst1", two(0xc7c0,0x0000), two(0xc7e0,0x0000), {B3, D16, R1}, 4 }, /* special instructions */ -{ "di", two(0x07e0,0x0160), two(0xffff,0xffff), {0} }, -{ "ei", two(0x87e0,0x0160), two(0xffff,0xffff), {0} }, -{ "halt", two(0x07e0,0x0120), two(0xffff,0xffff), {0} }, -{ "reti", two(0x07e0,0x0140), two(0xffff,0xffff), {0} }, -{ "trap", two(0x07e0,0x0100), two(0xffe0,0xffff), I5U }, -{ "ldsr", two(0x07e0,0x0020), two(0x07e0,0xffff), IF1 }, -{ "stsr", two(0x07e0,0x0040), two(0x07e0,0xffff), IF1 }, -{ "nop", one(0x00), one(0xff), {0} }, +{ "di", two(0x07e0,0x0160), two(0xffff,0xffff), {0}, 4 }, +{ "ei", two(0x87e0,0x0160), two(0xffff,0xffff), {0}, 4 }, +{ "halt", two(0x07e0,0x0120), two(0xffff,0xffff), {0}, 4 }, +{ "reti", two(0x07e0,0x0140), two(0xffff,0xffff), {0}, 4 }, +{ "trap", two(0x07e0,0x0100), two(0xffe0,0xffff), I5U, 4 }, +{ "ldsr", two(0x07e0,0x0020), two(0x07e0,0xffff), IF1, 4 }, +{ "stsr", two(0x07e0,0x0040), two(0x07e0,0xffff), IF1, 4 }, +{ "nop", one(0x00), one(0xff), {0}, 2 }, } ; |