diff options
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 6 | ||||
-rw-r--r-- | opcodes/m68k-opc.c | 18 |
2 files changed, 18 insertions, 6 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 157a362..e2cbe60 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2020-04-21 Andreas Schwab <schwab@linux-m68k.org> + + PR 25848 + * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of + cmpi only on m68020up and cpu32. + 2020-04-20 Sudakshina Das <sudi.das@arm.com> * aarch64-asm.c (aarch64_ins_none): New. diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c index e13f116..db19894 100644 --- a/opcodes/m68k-opc.c +++ b/opcodes/m68k-opc.c @@ -265,11 +265,14 @@ const struct m68k_opcode m68k_opcodes[] = {"cmpaw", 2, one(0130300), one(0170700), "*wAd", m68000up }, {"cmpal", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a }, -{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68000up }, +{"cmpib", 4, one(0006000), one(0177700), "#b$s", m68000 | m68010 }, +{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68020up | cpu32 | fido_a }, {"cmpib", 4, one(0006000), one(0177700), "#bDs", mcfisa_b | mcfisa_c }, -{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68000up }, +{"cmpiw", 4, one(0006100), one(0177700), "#w$s", m68000 | m68010 }, +{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68020up | cpu32 | fido_a }, {"cmpiw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b | mcfisa_c }, -{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68000up }, +{"cmpil", 6, one(0006200), one(0177700), "#l$s", m68000 | m68010 }, +{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68020up | cpu32 | fido_a }, {"cmpil", 6, one(0006200), one(0177700), "#lDs", mcfisa_a }, {"cmpmb", 2, one(0130410), one(0170770), "+s+d", m68000up }, @@ -277,18 +280,21 @@ const struct m68k_opcode m68k_opcodes[] = {"cmpml", 2, one(0130610), one(0170770), "+s+d", m68000up }, /* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */ -{"cmpb", 4, one(0006000), one(0177700), "#b@s", m68000up }, +{"cmpb", 4, one(0006000), one(0177700), "#b$s", m68000 | m68010 }, +{"cmpb", 4, one(0006000), one(0177700), "#b@s", m68020up | cpu32 | fido_a }, {"cmpb", 4, one(0006000), one(0177700), "#bDs", mcfisa_b | mcfisa_c }, {"cmpb", 2, one(0130410), one(0170770), "+s+d", m68000up }, {"cmpb", 2, one(0130000), one(0170700), ";bDd", m68000up }, {"cmpb", 2, one(0130000), one(0170700), "*bDd", mcfisa_b | mcfisa_c }, {"cmpw", 2, one(0130300), one(0170700), "*wAd", m68000up }, -{"cmpw", 4, one(0006100), one(0177700), "#w@s", m68000up }, +{"cmpw", 4, one(0006100), one(0177700), "#w$s", m68000 | m68010 }, +{"cmpw", 4, one(0006100), one(0177700), "#w@s", m68020up | cpu32 | fido_a }, {"cmpw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b | mcfisa_c }, {"cmpw", 2, one(0130510), one(0170770), "+s+d", m68000up }, {"cmpw", 2, one(0130100), one(0170700), "*wDd", m68000up | mcfisa_b | mcfisa_c }, {"cmpl", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a }, -{"cmpl", 6, one(0006200), one(0177700), "#l@s", m68000up }, +{"cmpl", 6, one(0006200), one(0177700), "#l$s", m68000 | m68010 }, +{"cmpl", 6, one(0006200), one(0177700), "#l@s", m68020up | cpu32 | fido_a }, {"cmpl", 6, one(0006200), one(0177700), "#lDs", mcfisa_a }, {"cmpl", 2, one(0130610), one(0170770), "+s+d", m68000up }, {"cmpl", 2, one(0130200), one(0170700), "*lDd", m68000up | mcfisa_a }, |