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-rw-r--r--opcodes/ChangeLog49
-rw-r--r--opcodes/alpha-opc.c5
-rw-r--r--opcodes/arm-dis.c16
-rw-r--r--opcodes/disassemble.c3
-rw-r--r--opcodes/frv-asm.c10
-rw-r--r--opcodes/frv-desc.c1601
-rw-r--r--opcodes/frv-desc.h501
-rw-r--r--opcodes/frv-opc.c538
-rw-r--r--opcodes/frv-opc.h371
-rw-r--r--opcodes/m68hc11-dis.c46
-rw-r--r--opcodes/m68k-dis.c62
-rw-r--r--opcodes/m68k-opc.c730
-rw-r--r--opcodes/mips-dis.c22
-rw-r--r--opcodes/mips-opc.c23
-rw-r--r--opcodes/xtensa-dis.c10
15 files changed, 2328 insertions, 1659 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9b109a6..2f613cb 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,52 @@
+2003-11-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ * m68k-opc.c (m68k_opcodes): Reorder "fmovel".
+
+2003-11-03 Daniel Jacobowitz <drow@mvista.com>
+
+ * arm-dis.c (print_arm_insn): Print "-" after "#".
+
+2003-10-30 Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
+
+ * alpha-opc.c: Add support for a second argument to RPCC.
+
+2003-10-27 Stephane Carrez <stcarrez@nerim.fr>
+
+ * m68hc11-dis.c: Convert to ISO C90 prototypes.
+
+2003-10-21 Peter Barada <pbarada@mail.wm.sps.mot.com>
+ Bernardo Innocenti <bernie@develer.com>
+
+ * m68k-dis.c: Add MCFv4/MCF5528x support.
+ * m68k-opc.c: Likewise.
+
+2003-10-10 Dave Brolley <brolley@redhat.com>
+
+ * frv-asm.c,frv-desc.c,frv-opc.c: Regenerated.
+
+2003-10-08 Dave Brolley <brolley@redhat.com>
+
+ * frv-desc.[ch], frv-opc.[ch]: Regenerated.
+
+2003-09-30 Bob Wilson <bob.wilson@acm.org>
+
+ * xtensa-dis.c (fetch_data): Remove numBytes parameter.
+ (print_insn_xtensa): Fix call to fetch_data.
+
+2003-09-30 Chris Demetriou <cgd@broadcom.com>
+
+ * mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
+ (print_insn_args): Add handing for +E, +F, +G, and +H.
+ * mips-opc.c (I65): New define for MIPS64r2.
+ (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
+ "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
+ and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to
+ be supported on MIPS64r2.
+
+2003-09-24 Dave Brolley <brolley@redhat.com>
+
+ * frv-desc.c, frv-opc.c, frv-opc.h: Regenerated.
+
2003-09-14 Andreas Jaeger <aj@suse.de>
* i386-dis.c: Convert to ISO C90 prototypes.
diff --git a/opcodes/alpha-opc.c b/opcodes/alpha-opc.c
index 8dc10e4..7cac7f8 100644
--- a/opcodes/alpha-opc.c
+++ b/opcodes/alpha-opc.c
@@ -1,5 +1,5 @@
/* alpha-opc.c -- Alpha AXP opcode list
- Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2003 Free Software Foundation, Inc.
Contributed by Richard Henderson <rth@cygnus.com>,
patterned after the PPC opcode handling written by Ian Lance Taylor.
@@ -1105,7 +1105,8 @@ const struct alpha_opcode alpha_opcodes[] = {
{ "wmb", MFC(0x18,0x4400), BASE, ARG_NONE },
{ "fetch", MFC(0x18,0x8000), BASE, { ZA, PRB } },
{ "fetch_m", MFC(0x18,0xA000), BASE, { ZA, PRB } },
- { "rpcc", MFC(0x18,0xC000), BASE, { RA } },
+ { "rpcc", MFC(0x18,0xC000), BASE, { RA, ZB } },
+ { "rpcc", MFC(0x18,0xC000), BASE, { RA, RB } }, /* ev6 una */
{ "rc", MFC(0x18,0xE000), BASE, { RA } },
{ "ecb", MFC(0x18,0xE800), BASE, { ZA, PRB } }, /* ev56 una */
{ "rs", MFC(0x18,0xF000), BASE, { RA } },
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index ac36e88..5f8fc4c 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -286,7 +286,7 @@ print_insn_arm (pc, info, given)
{
int offset = given & 0xfff;
if (offset)
- func (stream, ", %s#%d",
+ func (stream, ", #%s%d",
(((given & 0x00800000) == 0)
? "-" : ""), offset);
}
@@ -307,7 +307,7 @@ print_insn_arm (pc, info, given)
{
int offset = given & 0xfff;
if (offset)
- func (stream, "], %s#%d",
+ func (stream, "], #%s%d",
(((given & 0x00800000) == 0)
? "-" : ""), offset);
else
@@ -350,7 +350,7 @@ print_insn_arm (pc, info, given)
/* Immediate. */
int offset = ((given & 0xf00) >> 4) | (given & 0xf);
if (offset)
- func (stream, ", %s#%d",
+ func (stream, ", #%s%d",
(((given & 0x00800000) == 0)
? "-" : ""), offset);
}
@@ -374,7 +374,7 @@ print_insn_arm (pc, info, given)
/* Immediate. */
int offset = ((given & 0xf00) >> 4) | (given & 0xf);
if (offset)
- func (stream, "], %s#%d",
+ func (stream, "], #%s%d",
(((given & 0x00800000) == 0)
? "-" : ""), offset);
else
@@ -451,7 +451,7 @@ print_insn_arm (pc, info, given)
int offset = given & 0xff;
if (offset)
- func (stream, ", %s#%d]%s",
+ func (stream, ", #%s%d]%s",
((given & 0x00800000) == 0 ? "-" : ""),
offset * 4,
((given & 0x00200000) != 0 ? "!" : ""));
@@ -467,7 +467,7 @@ print_insn_arm (pc, info, given)
if (given & (1 << 21))
{
if (offset)
- func (stream, ", %s#%d",
+ func (stream, ", #%s%d",
((given & 0x00800000) == 0 ? "-" : ""),
offset * 4);
}
@@ -876,12 +876,12 @@ print_insn_arm (pc, info, given)
if (offset)
{
if ((given & 0x01000000) != 0)
- func (stream, ", %s#%d]%s",
+ func (stream, ", #%s%d]%s",
((given & 0x00800000) == 0 ? "-" : ""),
offset * multiplier,
((given & 0x00200000) != 0 ? "!" : ""));
else
- func (stream, "], %s#%d",
+ func (stream, "], #%s%d",
((given & 0x00800000) == 0 ? "-" : ""),
offset * multiplier);
}
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index 2d1358e..14113b5 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -145,7 +145,8 @@ disassembler (abfd)
|| bfd_get_mach (abfd) == bfd_mach_h8300hn)
disassemble = print_insn_h8300h;
else if (bfd_get_mach (abfd) == bfd_mach_h8300s
- || bfd_get_mach (abfd) == bfd_mach_h8300sn)
+ || bfd_get_mach (abfd) == bfd_mach_h8300sn
+ || bfd_get_mach (abfd) == bfd_mach_h8300sx)
disassemble = print_insn_h8300s;
else
disassemble = print_insn_h8300;
diff --git a/opcodes/frv-asm.c b/opcodes/frv-asm.c
index 1d24b28..678a250 100644
--- a/opcodes/frv-asm.c
+++ b/opcodes/frv-asm.c
@@ -476,7 +476,7 @@ frv_cgen_parse_operand (cd, opindex, strp, fields)
errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_cccr_names, & fields->f_CCi);
break;
case FRV_OPERAND_CPRDOUBLEK :
- errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_cpr_names, & fields->f_CPRk);
+ errmsg = parse_even_register (cd, strp, & frv_cgen_opval_cpr_names, & fields->f_CPRk);
break;
case FRV_OPERAND_CPRI :
errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_cpr_names, & fields->f_CPRi);
@@ -515,13 +515,13 @@ frv_cgen_parse_operand (cd, opindex, strp, fields)
errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_fccr_names, & fields->f_FCCk);
break;
case FRV_OPERAND_FRDOUBLEI :
- errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_fr_names, & fields->f_FRi);
+ errmsg = parse_even_register (cd, strp, & frv_cgen_opval_fr_names, & fields->f_FRi);
break;
case FRV_OPERAND_FRDOUBLEJ :
- errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_fr_names, & fields->f_FRj);
+ errmsg = parse_even_register (cd, strp, & frv_cgen_opval_fr_names, & fields->f_FRj);
break;
case FRV_OPERAND_FRDOUBLEK :
- errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_fr_names, & fields->f_FRk);
+ errmsg = parse_even_register (cd, strp, & frv_cgen_opval_fr_names, & fields->f_FRk);
break;
case FRV_OPERAND_FRI :
errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_fr_names, & fields->f_FRi);
@@ -557,7 +557,7 @@ frv_cgen_parse_operand (cd, opindex, strp, fields)
errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_fr_names, & fields->f_FRk);
break;
case FRV_OPERAND_GRDOUBLEK :
- errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_gr_names, & fields->f_GRk);
+ errmsg = parse_even_register (cd, strp, & frv_cgen_opval_gr_names, & fields->f_GRk);
break;
case FRV_OPERAND_GRI :
errmsg = cgen_parse_keyword (cd, strp, & frv_cgen_opval_gr_names, & fields->f_GRi);
diff --git a/opcodes/frv-desc.c b/opcodes/frv-desc.c
index 1e66026..9cc85fe 100644
--- a/opcodes/frv-desc.c
+++ b/opcodes/frv-desc.c
@@ -47,6 +47,7 @@ static const CGEN_ATTR_ENTRY MACH_attr[] =
{
{ "base", MACH_BASE },
{ "frv", MACH_FRV },
+ { "fr550", MACH_FR550 },
{ "fr500", MACH_FR500 },
{ "fr400", MACH_FR400 },
{ "tomcat", MACH_TOMCAT },
@@ -68,10 +69,14 @@ static const CGEN_ATTR_ENTRY UNIT_attr[] =
{ "I0", UNIT_I0 },
{ "I1", UNIT_I1 },
{ "I01", UNIT_I01 },
+ { "I2", UNIT_I2 },
+ { "I3", UNIT_I3 },
{ "IALL", UNIT_IALL },
{ "FM0", UNIT_FM0 },
{ "FM1", UNIT_FM1 },
{ "FM01", UNIT_FM01 },
+ { "FM2", UNIT_FM2 },
+ { "FM3", UNIT_FM3 },
{ "FMALL", UNIT_FMALL },
{ "FMLOW", UNIT_FMLOW },
{ "B0", UNIT_B0 },
@@ -146,6 +151,37 @@ static const CGEN_ATTR_ENTRY FR500_MAJOR_attr[] =
{ 0, 0 }
};
+static const CGEN_ATTR_ENTRY FR550_MAJOR_attr[] =
+{
+ { "NONE", FR550_MAJOR_NONE },
+ { "I_1", FR550_MAJOR_I_1 },
+ { "I_2", FR550_MAJOR_I_2 },
+ { "I_3", FR550_MAJOR_I_3 },
+ { "I_4", FR550_MAJOR_I_4 },
+ { "I_5", FR550_MAJOR_I_5 },
+ { "I_6", FR550_MAJOR_I_6 },
+ { "I_7", FR550_MAJOR_I_7 },
+ { "I_8", FR550_MAJOR_I_8 },
+ { "B_1", FR550_MAJOR_B_1 },
+ { "B_2", FR550_MAJOR_B_2 },
+ { "B_3", FR550_MAJOR_B_3 },
+ { "B_4", FR550_MAJOR_B_4 },
+ { "B_5", FR550_MAJOR_B_5 },
+ { "B_6", FR550_MAJOR_B_6 },
+ { "C_1", FR550_MAJOR_C_1 },
+ { "C_2", FR550_MAJOR_C_2 },
+ { "F_1", FR550_MAJOR_F_1 },
+ { "F_2", FR550_MAJOR_F_2 },
+ { "F_3", FR550_MAJOR_F_3 },
+ { "F_4", FR550_MAJOR_F_4 },
+ { "M_1", FR550_MAJOR_M_1 },
+ { "M_2", FR550_MAJOR_M_2 },
+ { "M_3", FR550_MAJOR_M_3 },
+ { "M_4", FR550_MAJOR_M_4 },
+ { "M_5", FR550_MAJOR_M_5 },
+ { 0, 0 }
+};
+
const CGEN_ATTR_TABLE frv_cgen_ifield_attr_table[] =
{
{ "MACH", & MACH_attr[0], & MACH_attr[0] },
@@ -189,6 +225,7 @@ const CGEN_ATTR_TABLE frv_cgen_insn_attr_table[] =
{ "UNIT", & UNIT_attr[0], & UNIT_attr[0] },
{ "FR400-MAJOR", & FR400_MAJOR_attr[0], & FR400_MAJOR_attr[0] },
{ "FR500-MAJOR", & FR500_MAJOR_attr[0], & FR500_MAJOR_attr[0] },
+ { "FR550-MAJOR", & FR550_MAJOR_attr[0], & FR550_MAJOR_attr[0] },
{ "ALIAS", &bool_attr[0], &bool_attr[0] },
{ "VIRTUAL", &bool_attr[0], &bool_attr[0] },
{ "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
@@ -218,6 +255,7 @@ static const CGEN_ISA frv_cgen_isa_table[] = {
static const CGEN_MACH frv_cgen_mach_table[] = {
{ "frv", "frv", MACH_FRV, 0 },
+ { "fr550", "fr550", MACH_FR550, 0 },
{ "fr500", "fr500", MACH_FR500, 0 },
{ "tomcat", "tomcat", MACH_TOMCAT, 0 },
{ "fr400", "fr400", MACH_FR400, 0 },
@@ -527,6 +565,8 @@ static CGEN_KEYWORD_ENTRY frv_cgen_opval_spr_names_entries[] =
{ "cccr", 263, {0, {0}}, 0, 0 },
{ "lr", 272, {0, {0}}, 0, 0 },
{ "lcr", 273, {0, {0}}, 0, 0 },
+ { "iacc0h", 280, {0, {0}}, 0, 0 },
+ { "iacc0l", 281, {0, {0}}, 0, 0 },
{ "isr", 288, {0, {0}}, 0, 0 },
{ "neear0", 352, {0, {0}}, 0, 0 },
{ "neear1", 353, {0, {0}}, 0, 0 },
@@ -1464,7 +1504,7 @@ static CGEN_KEYWORD_ENTRY frv_cgen_opval_spr_names_entries[] =
CGEN_KEYWORD frv_cgen_opval_spr_names =
{
& frv_cgen_opval_spr_names_entries[0],
- 1005,
+ 1007,
0, 0, 0, 0, ""
};
@@ -1618,6 +1658,18 @@ CGEN_KEYWORD frv_cgen_opval_acc_names =
0, 0, 0, 0, ""
};
+static CGEN_KEYWORD_ENTRY frv_cgen_opval_iacc0_names_entries[] =
+{
+ { "iacc0", 0, {0, {0}}, 0, 0 }
+};
+
+CGEN_KEYWORD frv_cgen_opval_iacc0_names =
+{
+ & frv_cgen_opval_iacc0_names_entries[0],
+ 1,
+ 0, 0, 0, 0, ""
+};
+
static CGEN_KEYWORD_ENTRY frv_cgen_opval_iccr_names_entries[] =
{
{ "icc0", 0, {0, {0}}, 0, 0 },
@@ -1764,6 +1816,7 @@ const CGEN_HW_ENTRY frv_cgen_hw_table[] =
{ "h-accg", HW_H_ACCG, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_accg_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
{ "h-acc40S", HW_H_ACC40S, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
{ "h-acc40U", HW_H_ACC40U, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
+ { "h-iacc0", HW_H_IACC0, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iacc0_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_FR400) } } },
{ "h-iccr", HW_H_ICCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
{ "h-fccr", HW_H_FCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
{ "h-cccr", HW_H_CCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
@@ -2284,3702 +2337,3732 @@ static const CGEN_IBASE frv_cgen_insn_table[MAX_INSNS] =
/* add$pack $GRi,$GRj,$GRk */
{
FRV_INSN_ADD, "add", "add", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sub$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SUB, "sub", "sub", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* and$pack $GRi,$GRj,$GRk */
{
FRV_INSN_AND, "and", "and", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* or$pack $GRi,$GRj,$GRk */
{
FRV_INSN_OR, "or", "or", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* xor$pack $GRi,$GRj,$GRk */
{
FRV_INSN_XOR, "xor", "xor", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* not$pack $GRj,$GRk */
{
FRV_INSN_NOT, "not", "not", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sdiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SDIV, "sdiv", "sdiv", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* nsdiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_NSDIV, "nsdiv", "nsdiv", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* udiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_UDIV, "udiv", "udiv", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* nudiv$pack $GRi,$GRj,$GRk */
{
FRV_INSN_NUDIV, "nudiv", "nudiv", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* smul$pack $GRi,$GRj,$GRdoublek */
{
FRV_INSN_SMUL, "smul", "smul", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* umul$pack $GRi,$GRj,$GRdoublek */
{
FRV_INSN_UMUL, "umul", "umul", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
+ },
+/* smu$pack $GRi,$GRj */
+ {
+ FRV_INSN_SMU, "smu", "smu", 32,
+ { 0, { (1<<MACH_FR400), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
+ },
+/* smass$pack $GRi,$GRj */
+ {
+ FRV_INSN_SMASS, "smass", "smass", 32,
+ { 0, { (1<<MACH_FR400), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
+ },
+/* smsss$pack $GRi,$GRj */
+ {
+ FRV_INSN_SMSSS, "smsss", "smsss", 32,
+ { 0, { (1<<MACH_FR400), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* sll$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SLL, "sll", "sll", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* srl$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SRL, "srl", "srl", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sra$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SRA, "sra", "sra", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
+ },
+/* slass$pack $GRi,$GRj,$GRk */
+ {
+ FRV_INSN_SLASS, "slass", "slass", 32,
+ { 0, { (1<<MACH_FR400), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
+ },
+/* scutss$pack $GRj,$GRk */
+ {
+ FRV_INSN_SCUTSS, "scutss", "scutss", 32,
+ { 0, { (1<<MACH_FR400), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* scan$pack $GRi,$GRj,$GRk */
{
FRV_INSN_SCAN, "scan", "scan", 32,
- { 0, { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cadd$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CADD, "cadd", "cadd", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csub$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSUB, "csub", "csub", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cand$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CAND, "cand", "cand", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cor$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_COR, "cor", "cor", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cxor$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CXOR, "cxor", "cxor", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cnot$pack $GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CNOT, "cnot", "cnot", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
{
FRV_INSN_CSMUL, "csmul", "csmul", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSDIV, "csdiv", "csdiv", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CUDIV, "cudiv", "cudiv", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* csll$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSLL, "csll", "csll", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csrl$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRL, "csrl", "csrl", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csra$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRA, "csra", "csra", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cscan$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSCAN, "cscan", "cscan", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ADDCC, "addcc", "addcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SUBCC, "subcc", "subcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* andcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ANDCC, "andcc", "andcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* orcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ORCC, "orcc", "orcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* xorcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_XORCC, "xorcc", "xorcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sllcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SLLCC, "sllcc", "sllcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* srlcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SRLCC, "srlcc", "srlcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sracc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SRACC, "sracc", "sracc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* smulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
{
FRV_INSN_SMULCC, "smulcc", "smulcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* umulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
{
FRV_INSN_UMULCC, "umulcc", "umulcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* caddcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CADDCC, "caddcc", "caddcc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csubcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSUBCC, "csubcc", "csubcc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
{
FRV_INSN_CSMULCC, "csmulcc", "csmulcc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* candcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CANDCC, "candcc", "candcc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* corcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CORCC, "corcc", "corcc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cxorcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CXORCC, "cxorcc", "cxorcc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csllcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSLLCC, "csllcc", "csllcc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csrlcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRLCC, "csrlcc", "csrlcc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* csracc$pack $GRi,$GRj,$GRk,$CCi,$cond */
{
FRV_INSN_CSRACC, "csracc", "csracc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addx$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ADDX, "addx", "addx", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subx$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SUBX, "subx", "subx", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_ADDXCC, "addxcc", "addxcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
{
FRV_INSN_SUBXCC, "subxcc", "subxcc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
+ },
+/* addss$pack $GRi,$GRj,$GRk */
+ {
+ FRV_INSN_ADDSS, "addss", "addss", 32,
+ { 0, { (1<<MACH_FR400), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
+ },
+/* subss$pack $GRi,$GRj,$GRk */
+ {
+ FRV_INSN_SUBSS, "subss", "subss", 32,
+ { 0, { (1<<MACH_FR400), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
},
/* addi$pack $GRi,$s12,$GRk */
{
FRV_INSN_ADDI, "addi", "addi", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subi$pack $GRi,$s12,$GRk */
{
FRV_INSN_SUBI, "subi", "subi", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* andi$pack $GRi,$s12,$GRk */
{
FRV_INSN_ANDI, "andi", "andi", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* ori$pack $GRi,$s12,$GRk */
{
FRV_INSN_ORI, "ori", "ori", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* xori$pack $GRi,$s12,$GRk */
{
FRV_INSN_XORI, "xori", "xori", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sdivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_SDIVI, "sdivi", "sdivi", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* nsdivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_NSDIVI, "nsdivi", "nsdivi", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* udivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_UDIVI, "udivi", "udivi", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* nudivi$pack $GRi,$s12,$GRk */
{
FRV_INSN_NUDIVI, "nudivi", "nudivi", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* smuli$pack $GRi,$s12,$GRdoublek */
{
FRV_INSN_SMULI, "smuli", "smuli", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* umuli$pack $GRi,$s12,$GRdoublek */
{
FRV_INSN_UMULI, "umuli", "umuli", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* slli$pack $GRi,$s12,$GRk */
{
FRV_INSN_SLLI, "slli", "slli", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* srli$pack $GRi,$s12,$GRk */
{
FRV_INSN_SRLI, "srli", "srli", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* srai$pack $GRi,$s12,$GRk */
{
FRV_INSN_SRAI, "srai", "srai", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* scani$pack $GRi,$s12,$GRk */
{
FRV_INSN_SCANI, "scani", "scani", 32,
- { 0, { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ADDICC, "addicc", "addicc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SUBICC, "subicc", "subicc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* andicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ANDICC, "andicc", "andicc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* oricc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ORICC, "oricc", "oricc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* xoricc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_XORICC, "xoricc", "xoricc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* smulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
{
FRV_INSN_SMULICC, "smulicc", "smulicc", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* umulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
{
FRV_INSN_UMULICC, "umulicc", "umulicc", 32,
- { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
},
/* sllicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SLLICC, "sllicc", "sllicc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* srlicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SRLICC, "srlicc", "srlicc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sraicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SRAICC, "sraicc", "sraicc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addxi$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ADDXI, "addxi", "addxi", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subxi$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SUBXI, "subxi", "subxi", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* addxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_ADDXICC, "addxicc", "addxicc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* subxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
{
FRV_INSN_SUBXICC, "subxicc", "subxicc", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* cmpb$pack $GRi,$GRj,$ICCi_1 */
{
FRV_INSN_CMPB, "cmpb", "cmpb", 32,
- { 0, { (1<<MACH_FR400), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_I_1 } }
},
/* cmpba$pack $GRi,$GRj,$ICCi_1 */
{
FRV_INSN_CMPBA, "cmpba", "cmpba", 32,
- { 0, { (1<<MACH_FR400), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_I_1 } }
},
/* setlo$pack $ulo16,$GRklo */
{
FRV_INSN_SETLO, "setlo", "setlo", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* sethi$pack $uhi16,$GRkhi */
{
FRV_INSN_SETHI, "sethi", "sethi", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* setlos$pack $slo16,$GRk */
{
FRV_INSN_SETLOS, "setlos", "setlos", 32,
- { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
},
/* ldsb$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSB, "ldsb", "ldsb", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldub$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUB, "ldub", "ldub", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldsh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSH, "ldsh", "ldsh", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lduh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUH, "lduh", "lduh", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ld$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LD, "ld", "ld", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldbf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDBF, "ldbf", "ldbf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldhf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDHF, "ldhf", "ldhf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDF, "ldf", "ldf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldc$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDC, "ldc", "ldc", 32,
- { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldsb$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSB, "nldsb", "nldsb", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldub$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUB, "nldub", "nldub", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldsh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSH, "nldsh", "nldsh", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlduh$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUH, "nlduh", "nlduh", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nld$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLD, "nld", "nld", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldbf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDBF, "nldbf", "nldbf", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldhf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDHF, "nldhf", "nldhf", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDF, "nldf", "nldf", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldd$pack @($GRi,$GRj),$GRdoublek */
{
FRV_INSN_LDD, "ldd", "ldd", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddf$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_LDDF, "lddf", "lddf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddc$pack @($GRi,$GRj),$CPRdoublek */
{
FRV_INSN_LDDC, "lddc", "lddc", 32,
- { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldd$pack @($GRi,$GRj),$GRdoublek */
{
FRV_INSN_NLDD, "nldd", "nldd", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlddf$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_NLDDF, "nlddf", "nlddf", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldq$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDQ, "ldq", "ldq", 32,
- { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldqf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDQF, "ldqf", "ldqf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldqc$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDQC, "ldqc", "ldqc", 32,
- { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldq$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDQ, "nldq", "nldq", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldqf$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDQF, "nldqf", "nldqf", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldsbu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSBU, "ldsbu", "ldsbu", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldubu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUBU, "ldubu", "ldubu", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldshu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDSHU, "ldshu", "ldshu", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lduhu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDUHU, "lduhu", "lduhu", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDU, "ldu", "ldu", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldsbu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSBU, "nldsbu", "nldsbu", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldubu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUBU, "nldubu", "nldubu", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldshu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDSHU, "nldshu", "nldshu", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlduhu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDUHU, "nlduhu", "nlduhu", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDU, "nldu", "nldu", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldbfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDBFU, "ldbfu", "ldbfu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldhfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDHFU, "ldhfu", "ldhfu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDFU, "ldfu", "ldfu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldcu$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDCU, "ldcu", "ldcu", 32,
- { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldbfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDBFU, "nldbfu", "nldbfu", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldhfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDHFU, "nldhfu", "nldhfu", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDFU, "nldfu", "nldfu", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddu$pack @($GRi,$GRj),$GRdoublek */
{
FRV_INSN_LDDU, "lddu", "lddu", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlddu$pack @($GRi,$GRj),$GRdoublek */
{
FRV_INSN_NLDDU, "nlddu", "nlddu", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddfu$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_LDDFU, "lddfu", "lddfu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddcu$pack @($GRi,$GRj),$CPRdoublek */
{
FRV_INSN_LDDCU, "lddcu", "lddcu", 32,
- { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlddfu$pack @($GRi,$GRj),$FRdoublek */
{
FRV_INSN_NLDDFU, "nlddfu", "nlddfu", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldqu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_LDQU, "ldqu", "ldqu", 32,
- { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldqu$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_NLDQU, "nldqu", "nldqu", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldqfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_LDQFU, "ldqfu", "ldqfu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldqcu$pack @($GRi,$GRj),$CPRk */
{
FRV_INSN_LDQCU, "ldqcu", "ldqcu", 32,
- { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldqfu$pack @($GRi,$GRj),$FRintk */
{
FRV_INSN_NLDQFU, "nldqfu", "nldqfu", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldsbi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDSBI, "ldsbi", "ldsbi", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldshi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDSHI, "ldshi", "ldshi", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDI, "ldi", "ldi", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldubi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDUBI, "ldubi", "ldubi", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lduhi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDUHI, "lduhi", "lduhi", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldbfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDBFI, "ldbfi", "ldbfi", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldhfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDHFI, "ldhfi", "ldhfi", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDFI, "ldfi", "ldfi", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldsbi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDSBI, "nldsbi", "nldsbi", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldubi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDUBI, "nldubi", "nldubi", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldshi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDSHI, "nldshi", "nldshi", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlduhi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDUHI, "nlduhi", "nlduhi", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_NLDI, "nldi", "nldi", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldbfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDBFI, "nldbfi", "nldbfi", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldhfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDHFI, "nldhfi", "nldhfi", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nldfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDFI, "nldfi", "nldfi", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddi$pack @($GRi,$d12),$GRdoublek */
{
FRV_INSN_LDDI, "lddi", "lddi", 32,
- { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* lddfi$pack @($GRi,$d12),$FRdoublek */
{
FRV_INSN_LDDFI, "lddfi", "lddfi", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlddi$pack @($GRi,$d12),$GRdoublek */
{
FRV_INSN_NLDDI, "nlddi", "nlddi", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* nlddfi$pack @($GRi,$d12),$FRdoublek */
{
FRV_INSN_NLDDFI, "nlddfi", "nlddfi", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* ldqi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_LDQI, "ldqi", "ldqi", 32,
- { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* ldqfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_LDQFI, "ldqfi", "ldqfi", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
- },
-/* nldqi$pack @($GRi,$d12),$GRk */
- {
- FRV_INSN_NLDQI, "nldqi", "nldqi", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* nldqfi$pack @($GRi,$d12),$FRintk */
{
FRV_INSN_NLDQFI, "nldqfi", "nldqfi", 32,
- { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* stb$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STB, "stb", "stb", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sth$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STH, "sth", "sth", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* st$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_ST, "st", "st", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stbf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STBF, "stbf", "stbf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sthf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STHF, "sthf", "sthf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STF, "stf", "stf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stc$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STC, "stc", "stc", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* rstb$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_RSTB, "rstb", "rstb", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* rsth$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_RSTH, "rsth", "rsth", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* rst$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_RST, "rst", "rst", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* rstbf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_RSTBF, "rstbf", "rstbf", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* rsthf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_RSTHF, "rsthf", "rsthf", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* rstf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_RSTF, "rstf", "rstf", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
-/* std$pack $GRk,@($GRi,$GRj) */
+/* std$pack $GRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STD, "std", "std", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* stdf$pack $FRk,@($GRi,$GRj) */
+/* stdf$pack $FRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDF, "stdf", "stdf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* stdc$pack $CPRk,@($GRi,$GRj) */
+/* stdc$pack $CPRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDC, "stdc", "stdc", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* rstd$pack $GRk,@($GRi,$GRj) */
+/* rstd$pack $GRdoublek,@($GRi,$GRj) */
{
FRV_INSN_RSTD, "rstd", "rstd", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
-/* rstdf$pack $FRk,@($GRi,$GRj) */
+/* rstdf$pack $FRdoublek,@($GRi,$GRj) */
{
FRV_INSN_RSTDF, "rstdf", "rstdf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stq$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STQ, "stq", "stq", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stqf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STQF, "stqf", "stqf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stqc$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STQC, "stqc", "stqc", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* rstq$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_RSTQ, "rstq", "rstq", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* rstqf$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_RSTQF, "rstqf", "rstqf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stbu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STBU, "stbu", "stbu", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sthu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STHU, "sthu", "sthu", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STU, "stu", "stu", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stbfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STBFU, "stbfu", "stbfu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sthfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STHFU, "sthfu", "sthfu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STFU, "stfu", "stfu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stcu$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STCU, "stcu", "stcu", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* stdu$pack $GRk,@($GRi,$GRj) */
+/* stdu$pack $GRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDU, "stdu", "stdu", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* stdfu$pack $FRk,@($GRi,$GRj) */
+/* stdfu$pack $FRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDFU, "stdfu", "stdfu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* stdcu$pack $CPRk,@($GRi,$GRj) */
+/* stdcu$pack $CPRdoublek,@($GRi,$GRj) */
{
FRV_INSN_STDCU, "stdcu", "stdcu", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stqu$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_STQU, "stqu", "stqu", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stqfu$pack $FRintk,@($GRi,$GRj) */
{
FRV_INSN_STQFU, "stqfu", "stqfu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stqcu$pack $CPRk,@($GRi,$GRj) */
{
FRV_INSN_STQCU, "stqcu", "stqcu", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* cldsb$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSB, "cldsb", "cldsb", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldub$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUB, "cldub", "cldub", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldsh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSH, "cldsh", "cldsh", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* clduh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUH, "clduh", "clduh", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cld$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLD, "cld", "cld", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldbf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDBF, "cldbf", "cldbf", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldhf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDHF, "cldhf", "cldhf", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDF, "cldf", "cldf", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldd$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
{
FRV_INSN_CLDD, "cldd", "cldd", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* clddf$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
{
FRV_INSN_CLDDF, "clddf", "clddf", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDQ, "cldq", "cldq", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* cldsbu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSBU, "cldsbu", "cldsbu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldubu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUBU, "cldubu", "cldubu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldshu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDSHU, "cldshu", "cldshu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* clduhu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDUHU, "clduhu", "clduhu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDU, "cldu", "cldu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldbfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDBFU, "cldbfu", "cldbfu", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldhfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDHFU, "cldhfu", "cldhfu", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
{
FRV_INSN_CLDFU, "cldfu", "cldfu", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
{
FRV_INSN_CLDDU, "clddu", "clddu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
{
FRV_INSN_CLDDFU, "clddfu", "clddfu", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
},
/* cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CLDQU, "cldqu", "cldqu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
},
/* cstb$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTB, "cstb", "cstb", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* csth$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTH, "csth", "csth", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cst$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CST, "cst", "cst", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstbf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTBF, "cstbf", "cstbf", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* csthf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTHF, "csthf", "csthf", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTF, "cstf", "cstf", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* cstd$pack $GRk,@($GRi,$GRj),$CCi,$cond */
+/* cstd$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTD, "cstd", "cstd", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* cstdf$pack $FRk,@($GRi,$GRj),$CCi,$cond */
+/* cstdf$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTDF, "cstdf", "cstdf", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTQ, "cstq", "cstq", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* cstbu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTBU, "cstbu", "cstbu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* csthu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTHU, "csthu", "csthu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTU, "cstu", "cstu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstbfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTBFU, "cstbfu", "cstbfu", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* csthfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTHFU, "csthfu", "csthfu", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* cstfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTFU, "cstfu", "cstfu", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* cstdu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
+/* cstdu$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTDU, "cstdu", "cstdu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* cstdfu$pack $FRk,@($GRi,$GRj),$CCi,$cond */
+/* cstdfu$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CSTDFU, "cstdfu", "cstdfu", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stbi$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STBI, "stbi", "stbi", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sthi$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STHI, "sthi", "sthi", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sti$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STI, "sti", "sti", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stbfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STBFI, "stbfi", "stbfi", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* sthfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STHFI, "sthfi", "sthfi", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STFI, "stfi", "stfi", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* stdi$pack $GRk,@($GRi,$d12) */
+/* stdi$pack $GRdoublek,@($GRi,$d12) */
{
FRV_INSN_STDI, "stdi", "stdi", 32,
- { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
-/* stdfi$pack $FRk,@($GRi,$d12) */
+/* stdfi$pack $FRdoublek,@($GRi,$d12) */
{
FRV_INSN_STDFI, "stdfi", "stdfi", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
},
/* stqi$pack $GRk,@($GRi,$d12) */
{
FRV_INSN_STQI, "stqi", "stqi", 32,
- { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* stqfi$pack $FRintk,@($GRi,$d12) */
{
FRV_INSN_STQFI, "stqfi", "stqfi", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
},
/* swap$pack @($GRi,$GRj),$GRk */
{
FRV_INSN_SWAP, "swap", "swap", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* swapi$pack @($GRi,$d12),$GRk */
{
FRV_INSN_SWAPI, "swapi", "swapi", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond */
{
FRV_INSN_CSWAP, "cswap", "cswap", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* movgf$pack $GRj,$FRintk */
{
FRV_INSN_MOVGF, "movgf", "movgf", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* movfg$pack $FRintk,$GRj */
{
FRV_INSN_MOVFG, "movfg", "movfg", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* movgfd$pack $GRj,$FRintk */
{
FRV_INSN_MOVGFD, "movgfd", "movgfd", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* movfgd$pack $FRintk,$GRj */
{
FRV_INSN_MOVFGD, "movfgd", "movfgd", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* movgfq$pack $GRj,$FRintk */
{
FRV_INSN_MOVGFQ, "movgfq", "movgfq", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_4 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_4, FR550_MAJOR_NONE } }
},
/* movfgq$pack $FRintk,$GRj */
{
FRV_INSN_MOVFGQ, "movfgq", "movfgq", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_4 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR500_MAJOR_I_4, FR550_MAJOR_NONE } }
},
/* cmovgf$pack $GRj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMOVGF, "cmovgf", "cmovgf", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* cmovfg$pack $FRintk,$GRj,$CCi,$cond */
{
FRV_INSN_CMOVFG, "cmovfg", "cmovfg", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* cmovgfd$pack $GRj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMOVGFD, "cmovgfd", "cmovgfd", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* cmovfgd$pack $FRintk,$GRj,$CCi,$cond */
{
FRV_INSN_CMOVFGD, "cmovfgd", "cmovfgd", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
},
/* movgs$pack $GRj,$spr */
{
FRV_INSN_MOVGS, "movgs", "movgs", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* movsg$pack $spr,$GRj */
{
FRV_INSN_MOVSG, "movsg", "movsg", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* bra$pack $hint_taken$label16 */
{
FRV_INSN_BRA, "bra", "bra", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bno$pack$hint_not_taken */
{
FRV_INSN_BNO, "bno", "bno", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* beq$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BEQ, "beq", "beq", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bne$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BNE, "bne", "bne", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* ble$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BLE, "ble", "ble", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bgt$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BGT, "bgt", "bgt", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* blt$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BLT, "blt", "blt", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bge$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BGE, "bge", "bge", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bls$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BLS, "bls", "bls", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bhi$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BHI, "bhi", "bhi", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bc$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BC, "bc", "bc", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bnc$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BNC, "bnc", "bnc", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bn$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BN, "bn", "bn", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bp$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BP, "bp", "bp", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bv$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BV, "bv", "bv", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bnv$pack $ICCi_2,$hint,$label16 */
{
FRV_INSN_BNV, "bnv", "bnv", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbra$pack $hint_taken$label16 */
{
FRV_INSN_FBRA, "fbra", "fbra", 32,
- { 0|A(FR_ACCESS)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbno$pack$hint_not_taken */
{
FRV_INSN_FBNO, "fbno", "fbno", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbne$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBNE, "fbne", "fbne", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbeq$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBEQ, "fbeq", "fbeq", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fblg$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBLG, "fblg", "fblg", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbue$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUE, "fbue", "fbue", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbul$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUL, "fbul", "fbul", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbge$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBGE, "fbge", "fbge", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fblt$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBLT, "fblt", "fblt", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbuge$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUGE, "fbuge", "fbuge", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbug$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBUG, "fbug", "fbug", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fble$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBLE, "fble", "fble", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbgt$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBGT, "fbgt", "fbgt", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbule$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBULE, "fbule", "fbule", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbu$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBU, "fbu", "fbu", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* fbo$pack $FCCi_2,$hint,$label16 */
{
FRV_INSN_FBO, "fbo", "fbo", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
},
/* bctrlr$pack $ccond,$hint */
{
FRV_INSN_BCTRLR, "bctrlr", "bctrlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bralr$pack$hint_taken */
{
FRV_INSN_BRALR, "bralr", "bralr", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bnolr$pack$hint_not_taken */
{
FRV_INSN_BNOLR, "bnolr", "bnolr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* beqlr$pack $ICCi_2,$hint */
{
FRV_INSN_BEQLR, "beqlr", "beqlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bnelr$pack $ICCi_2,$hint */
{
FRV_INSN_BNELR, "bnelr", "bnelr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* blelr$pack $ICCi_2,$hint */
{
FRV_INSN_BLELR, "blelr", "blelr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bgtlr$pack $ICCi_2,$hint */
{
FRV_INSN_BGTLR, "bgtlr", "bgtlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bltlr$pack $ICCi_2,$hint */
{
FRV_INSN_BLTLR, "bltlr", "bltlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bgelr$pack $ICCi_2,$hint */
{
FRV_INSN_BGELR, "bgelr", "bgelr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* blslr$pack $ICCi_2,$hint */
{
FRV_INSN_BLSLR, "blslr", "blslr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bhilr$pack $ICCi_2,$hint */
{
FRV_INSN_BHILR, "bhilr", "bhilr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bclr$pack $ICCi_2,$hint */
{
FRV_INSN_BCLR, "bclr", "bclr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bnclr$pack $ICCi_2,$hint */
{
FRV_INSN_BNCLR, "bnclr", "bnclr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bnlr$pack $ICCi_2,$hint */
{
FRV_INSN_BNLR, "bnlr", "bnlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bplr$pack $ICCi_2,$hint */
{
FRV_INSN_BPLR, "bplr", "bplr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bvlr$pack $ICCi_2,$hint */
{
FRV_INSN_BVLR, "bvlr", "bvlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bnvlr$pack $ICCi_2,$hint */
{
FRV_INSN_BNVLR, "bnvlr", "bnvlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbralr$pack$hint_taken */
{
FRV_INSN_FBRALR, "fbralr", "fbralr", 32,
- { 0|A(FR_ACCESS)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbnolr$pack$hint_not_taken */
{
FRV_INSN_FBNOLR, "fbnolr", "fbnolr", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbeqlr$pack $FCCi_2,$hint */
{
FRV_INSN_FBEQLR, "fbeqlr", "fbeqlr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbnelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBNELR, "fbnelr", "fbnelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fblglr$pack $FCCi_2,$hint */
{
FRV_INSN_FBLGLR, "fblglr", "fblglr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbuelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBUELR, "fbuelr", "fbuelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbullr$pack $FCCi_2,$hint */
{
FRV_INSN_FBULLR, "fbullr", "fbullr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbgelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBGELR, "fbgelr", "fbgelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbltlr$pack $FCCi_2,$hint */
{
FRV_INSN_FBLTLR, "fbltlr", "fbltlr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbugelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBUGELR, "fbugelr", "fbugelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbuglr$pack $FCCi_2,$hint */
{
FRV_INSN_FBUGLR, "fbuglr", "fbuglr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fblelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBLELR, "fblelr", "fblelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbgtlr$pack $FCCi_2,$hint */
{
FRV_INSN_FBGTLR, "fbgtlr", "fbgtlr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbulelr$pack $FCCi_2,$hint */
{
FRV_INSN_FBULELR, "fbulelr", "fbulelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbulr$pack $FCCi_2,$hint */
{
FRV_INSN_FBULR, "fbulr", "fbulr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* fbolr$pack $FCCi_2,$hint */
{
FRV_INSN_FBOLR, "fbolr", "fbolr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
},
/* bcralr$pack $ccond$hint_taken */
{
FRV_INSN_BCRALR, "bcralr", "bcralr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcnolr$pack$hint_not_taken */
{
FRV_INSN_BCNOLR, "bcnolr", "bcnolr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bceqlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCEQLR, "bceqlr", "bceqlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcnelr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNELR, "bcnelr", "bcnelr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bclelr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCLELR, "bclelr", "bclelr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcgtlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCGTLR, "bcgtlr", "bcgtlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcltlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCLTLR, "bcltlr", "bcltlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcgelr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCGELR, "bcgelr", "bcgelr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bclslr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCLSLR, "bclslr", "bclslr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bchilr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCHILR, "bchilr", "bchilr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcclr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCCLR, "bcclr", "bcclr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcnclr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNCLR, "bcnclr", "bcnclr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcnlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNLR, "bcnlr", "bcnlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcplr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCPLR, "bcplr", "bcplr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcvlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCVLR, "bcvlr", "bcvlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* bcnvlr$pack $ICCi_2,$ccond,$hint */
{
FRV_INSN_BCNVLR, "bcnvlr", "bcnvlr", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbralr$pack $ccond$hint_taken */
{
FRV_INSN_FCBRALR, "fcbralr", "fcbralr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbnolr$pack$hint_not_taken */
{
FRV_INSN_FCBNOLR, "fcbnolr", "fcbnolr", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbeqlr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBEQLR, "fcbeqlr", "fcbeqlr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbnelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBNELR, "fcbnelr", "fcbnelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcblglr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBLGLR, "fcblglr", "fcblglr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbuelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBUELR, "fcbuelr", "fcbuelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbullr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBULLR, "fcbullr", "fcbullr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbgelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBGELR, "fcbgelr", "fcbgelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbltlr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBLTLR, "fcbltlr", "fcbltlr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbugelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBUGELR, "fcbugelr", "fcbugelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbuglr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBUGLR, "fcbuglr", "fcbuglr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcblelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBLELR, "fcblelr", "fcblelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbgtlr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBGTLR, "fcbgtlr", "fcbgtlr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbulelr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBULELR, "fcbulelr", "fcbulelr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbulr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBULR, "fcbulr", "fcbulr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* fcbolr$pack $FCCi_2,$ccond,$hint */
{
FRV_INSN_FCBOLR, "fcbolr", "fcbolr", 32,
- { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2 } }
+ { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
},
/* jmpl$pack @($GRi,$GRj) */
{
FRV_INSN_JMPL, "jmpl", "jmpl", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
+ { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
},
/* calll$pack @($GRi,$GRj) */
{
FRV_INSN_CALLL, "calll", "calll", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
+ { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_NONE } }
},
/* jmpil$pack @($GRi,$s12) */
{
FRV_INSN_JMPIL, "jmpil", "jmpil", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
+ { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
},
/* callil$pack @($GRi,$s12) */
{
FRV_INSN_CALLIL, "callil", "callil", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
+ { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_NONE } }
},
/* call$pack $label24 */
{
FRV_INSN_CALL, "call", "call", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_4, FR500_MAJOR_B_4 } }
+ { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_4, FR500_MAJOR_B_4, FR550_MAJOR_B_4 } }
},
/* rett$pack $debug */
{
FRV_INSN_RETT, "rett", "rett", 32,
- { 0|A(PRIVILEGED)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0|A(PRIVILEGED)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* rei$pack $eir */
{
FRV_INSN_REI, "rei", "rei", 32,
- { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_1 } }
+ { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_1, FR550_MAJOR_NONE } }
},
/* tra$pack $GRi,$GRj */
{
FRV_INSN_TRA, "tra", "tra", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tno$pack */
{
FRV_INSN_TNO, "tno", "tno", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* teq$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TEQ, "teq", "teq", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tne$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TNE, "tne", "tne", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tle$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TLE, "tle", "tle", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tgt$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TGT, "tgt", "tgt", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tlt$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TLT, "tlt", "tlt", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tge$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TGE, "tge", "tge", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tls$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TLS, "tls", "tls", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* thi$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_THI, "thi", "thi", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tc$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TC, "tc", "tc", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tnc$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TNC, "tnc", "tnc", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tn$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TN, "tn", "tn", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tp$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TP, "tp", "tp", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tv$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TV, "tv", "tv", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tnv$pack $ICCi_2,$GRi,$GRj */
{
FRV_INSN_TNV, "tnv", "tnv", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftra$pack $GRi,$GRj */
{
FRV_INSN_FTRA, "ftra", "ftra", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftno$pack */
{
FRV_INSN_FTNO, "ftno", "ftno", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftne$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTNE, "ftne", "ftne", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* fteq$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTEQ, "fteq", "fteq", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftlg$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTLG, "ftlg", "ftlg", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftue$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUE, "ftue", "ftue", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftul$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUL, "ftul", "ftul", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftge$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTGE, "ftge", "ftge", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftlt$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTLT, "ftlt", "ftlt", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftuge$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUGE, "ftuge", "ftuge", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftug$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTUG, "ftug", "ftug", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftle$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTLE, "ftle", "ftle", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftgt$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTGT, "ftgt", "ftgt", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftule$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTULE, "ftule", "ftule", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftu$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTU, "ftu", "ftu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* fto$pack $FCCi_2,$GRi,$GRj */
{
FRV_INSN_FTO, "fto", "fto", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tira$pack $GRi,$s12 */
{
FRV_INSN_TIRA, "tira", "tira", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tino$pack */
{
FRV_INSN_TINO, "tino", "tino", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tieq$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIEQ, "tieq", "tieq", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tine$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TINE, "tine", "tine", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tile$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TILE, "tile", "tile", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tigt$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIGT, "tigt", "tigt", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tilt$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TILT, "tilt", "tilt", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tige$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIGE, "tige", "tige", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tils$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TILS, "tils", "tils", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tihi$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIHI, "tihi", "tihi", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tic$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIC, "tic", "tic", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tinc$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TINC, "tinc", "tinc", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tin$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIN, "tin", "tin", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tip$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIP, "tip", "tip", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tiv$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TIV, "tiv", "tiv", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* tinv$pack $ICCi_2,$GRi,$s12 */
{
FRV_INSN_TINV, "tinv", "tinv", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftira$pack $GRi,$s12 */
{
FRV_INSN_FTIRA, "ftira", "ftira", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftino$pack */
{
FRV_INSN_FTINO, "ftino", "ftino", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftine$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTINE, "ftine", "ftine", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftieq$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIEQ, "ftieq", "ftieq", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftilg$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTILG, "ftilg", "ftilg", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiue$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUE, "ftiue", "ftiue", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiul$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUL, "ftiul", "ftiul", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftige$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIGE, "ftige", "ftige", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftilt$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTILT, "ftilt", "ftilt", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiuge$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUGE, "ftiuge", "ftiuge", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiug$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIUG, "ftiug", "ftiug", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftile$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTILE, "ftile", "ftile", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftigt$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIGT, "ftigt", "ftigt", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiule$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIULE, "ftiule", "ftiule", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftiu$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIU, "ftiu", "ftiu", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* ftio$pack $FCCi_2,$GRi,$s12 */
{
FRV_INSN_FTIO, "ftio", "ftio", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* break$pack */
{
FRV_INSN_BREAK, "break", "break", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* mtrap$pack */
{
FRV_INSN_MTRAP, "mtrap", "mtrap", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
},
/* andcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ANDCR, "andcr", "andcr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* orcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ORCR, "orcr", "orcr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* xorcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_XORCR, "xorcr", "xorcr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* nandcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NANDCR, "nandcr", "nandcr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* norcr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NORCR, "norcr", "norcr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* andncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ANDNCR, "andncr", "andncr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* orncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_ORNCR, "orncr", "orncr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* nandncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NANDNCR, "nandncr", "nandncr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* norncr$pack $CRi,$CRj,$CRk */
{
FRV_INSN_NORNCR, "norncr", "norncr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* notcr$pack $CRj,$CRk */
{
FRV_INSN_NOTCR, "notcr", "notcr", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
},
/* ckra$pack $CRj_int */
{
FRV_INSN_CKRA, "ckra", "ckra", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckno$pack $CRj_int */
{
FRV_INSN_CKNO, "ckno", "ckno", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckeq$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKEQ, "ckeq", "ckeq", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckne$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKNE, "ckne", "ckne", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckle$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKLE, "ckle", "ckle", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckgt$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKGT, "ckgt", "ckgt", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cklt$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKLT, "cklt", "cklt", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckge$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKGE, "ckge", "ckge", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckls$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKLS, "ckls", "ckls", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckhi$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKHI, "ckhi", "ckhi", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckc$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKC, "ckc", "ckc", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cknc$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKNC, "cknc", "cknc", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckn$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKN, "ckn", "ckn", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckp$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKP, "ckp", "ckp", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ckv$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKV, "ckv", "ckv", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cknv$pack $ICCi_3,$CRj_int */
{
FRV_INSN_CKNV, "cknv", "cknv", 32,
- { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckra$pack $CRj_float */
{
FRV_INSN_FCKRA, "fckra", "fckra", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckno$pack $CRj_float */
{
FRV_INSN_FCKNO, "fckno", "fckno", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckne$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKNE, "fckne", "fckne", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckeq$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKEQ, "fckeq", "fckeq", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fcklg$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKLG, "fcklg", "fcklg", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckue$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUE, "fckue", "fckue", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckul$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUL, "fckul", "fckul", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckge$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKGE, "fckge", "fckge", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fcklt$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKLT, "fcklt", "fcklt", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckuge$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUGE, "fckuge", "fckuge", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckug$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKUG, "fckug", "fckug", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckle$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKLE, "fckle", "fckle", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckgt$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKGT, "fckgt", "fckgt", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fckule$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKULE, "fckule", "fckule", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fcku$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKU, "fcku", "fcku", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* fcko$pack $FCCi_3,$CRj_float */
{
FRV_INSN_FCKO, "fcko", "fcko", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckra$pack $CRj_int,$CCi,$cond */
{
FRV_INSN_CCKRA, "cckra", "cckra", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckno$pack $CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNO, "cckno", "cckno", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckeq$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKEQ, "cckeq", "cckeq", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckne$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNE, "cckne", "cckne", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckle$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKLE, "cckle", "cckle", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckgt$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKGT, "cckgt", "cckgt", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ccklt$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKLT, "ccklt", "ccklt", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckge$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKGE, "cckge", "cckge", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckls$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKLS, "cckls", "cckls", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckhi$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKHI, "cckhi", "cckhi", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckc$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKC, "cckc", "cckc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ccknc$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNC, "ccknc", "ccknc", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckn$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKN, "cckn", "cckn", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckp$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKP, "cckp", "cckp", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cckv$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKV, "cckv", "cckv", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* ccknv$pack $ICCi_3,$CRj_int,$CCi,$cond */
{
FRV_INSN_CCKNV, "ccknv", "ccknv", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckra$pack $CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKRA, "cfckra", "cfckra", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckno$pack $CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKNO, "cfckno", "cfckno", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckne$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKNE, "cfckne", "cfckne", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckeq$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKEQ, "cfckeq", "cfckeq", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfcklg$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKLG, "cfcklg", "cfcklg", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckue$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUE, "cfckue", "cfckue", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckul$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUL, "cfckul", "cfckul", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckge$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKGE, "cfckge", "cfckge", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfcklt$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKLT, "cfcklt", "cfcklt", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckuge$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUGE, "cfckuge", "cfckuge", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckug$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKUG, "cfckug", "cfckug", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckle$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKLE, "cfckle", "cfckle", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckgt$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKGT, "cfckgt", "cfckgt", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfckule$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKULE, "cfckule", "cfckule", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfcku$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKU, "cfcku", "cfcku", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cfcko$pack $FCCi_3,$CRj_float,$CCi,$cond */
{
FRV_INSN_CFCKO, "cfcko", "cfcko", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
},
/* cjmpl$pack @($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CJMPL, "cjmpl", "cjmpl", 32,
- { 0|A(CONDITIONAL)|A(COND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
+ { 0|A(CONDITIONAL)|A(COND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
},
/* ccalll$pack @($GRi,$GRj),$CCi,$cond */
{
FRV_INSN_CCALLL, "ccalll", "ccalll", 32,
- { 0|A(CONDITIONAL)|A(COND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5 } }
+ { 0|A(CONDITIONAL)|A(COND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_NONE } }
},
/* ici$pack @($GRi,$GRj) */
{
FRV_INSN_ICI, "ici", "ici", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* dci$pack @($GRi,$GRj) */
{
FRV_INSN_DCI, "dci", "dci", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* icei$pack @($GRi,$GRj),$ae */
{
FRV_INSN_ICEI, "icei", "icei", 32,
- { 0, { (1<<MACH_FR400), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_C_2 } }
},
/* dcei$pack @($GRi,$GRj),$ae */
{
FRV_INSN_DCEI, "dcei", "dcei", 32,
- { 0, { (1<<MACH_FR400), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_C_2 } }
},
/* dcf$pack @($GRi,$GRj) */
{
FRV_INSN_DCF, "dcf", "dcf", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* dcef$pack @($GRi,$GRj),$ae */
{
FRV_INSN_DCEF, "dcef", "dcef", 32,
- { 0, { (1<<MACH_FR400), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_C_2 } }
},
/* witlb$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_WITLB, "witlb", "witlb", 32,
- { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
+ { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* wdtlb$pack $GRk,@($GRi,$GRj) */
{
FRV_INSN_WDTLB, "wdtlb", "wdtlb", 32,
- { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
+ { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* itlbi$pack @($GRi,$GRj) */
{
FRV_INSN_ITLBI, "itlbi", "itlbi", 32,
- { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
+ { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* dtlbi$pack @($GRi,$GRj) */
{
FRV_INSN_DTLBI, "dtlbi", "dtlbi", 32,
- { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
+ { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* icpl$pack $GRi,$GRj,$lock */
{
FRV_INSN_ICPL, "icpl", "icpl", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* dcpl$pack $GRi,$GRj,$lock */
{
FRV_INSN_DCPL, "dcpl", "dcpl", 32,
- { 0, { (1<<MACH_BASE), UNIT_DCPL, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_DCPL, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_I_8 } }
},
/* icul$pack $GRi */
{
FRV_INSN_ICUL, "icul", "icul", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* dcul$pack $GRi */
{
FRV_INSN_DCUL, "dcul", "dcul", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* bar$pack */
{
FRV_INSN_BAR, "bar", "bar", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* membar$pack */
{
FRV_INSN_MEMBAR, "membar", "membar", 32,
- { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
},
/* cop1$pack $s6_1,$CPRi,$CPRj,$CPRk */
{
FRV_INSN_COP1, "cop1", "cop1", 32,
- { 0, { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* cop2$pack $s6_1,$CPRi,$CPRj,$CPRk */
{
FRV_INSN_COP2, "cop2", "cop2", 32,
- { 0, { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
},
/* clrgr$pack $GRk */
{
FRV_INSN_CLRGR, "clrgr", "clrgr", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* clrfr$pack $FRk */
{
FRV_INSN_CLRFR, "clrfr", "clrfr", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* clrga$pack */
{
FRV_INSN_CLRGA, "clrga", "clrga", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* clrfa$pack */
{
FRV_INSN_CLRFA, "clrfa", "clrfa", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* commitgr$pack $GRk */
{
FRV_INSN_COMMITGR, "commitgr", "commitgr", 32,
- { 0, { (1<<MACH_FRV)|(1<<MACH_FR500), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
+ { 0, { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* commitfr$pack $FRk */
{
FRV_INSN_COMMITFR, "commitfr", "commitfr", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV)|(1<<MACH_FR500), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* commitga$pack */
{
FRV_INSN_COMMITGA, "commitga", "commitga", 32,
- { 0, { (1<<MACH_FRV)|(1<<MACH_FR500), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
+ { 0, { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* commitfa$pack */
{
FRV_INSN_COMMITFA, "commitfa", "commitfa", 32,
- { 0|A(FR_ACCESS), { (1<<MACH_FRV)|(1<<MACH_FR500), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6 } }
+ { 0|A(FR_ACCESS), { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
},
/* fitos$pack $FRintj,$FRk */
{
FRV_INSN_FITOS, "fitos", "fitos", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fstoi$pack $FRj,$FRintk */
{
FRV_INSN_FSTOI, "fstoi", "fstoi", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fitod$pack $FRintj,$FRdoublek */
{
FRV_INSN_FITOD, "fitod", "fitod", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fdtoi$pack $FRdoublej,$FRintk */
{
FRV_INSN_FDTOI, "fdtoi", "fdtoi", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fditos$pack $FRintj,$FRk */
{
FRV_INSN_FDITOS, "fditos", "fditos", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fdstoi$pack $FRj,$FRintk */
{
FRV_INSN_FDSTOI, "fdstoi", "fdstoi", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* nfditos$pack $FRintj,$FRk */
{
FRV_INSN_NFDITOS, "nfditos", "nfditos", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* nfdstoi$pack $FRj,$FRintk */
{
FRV_INSN_NFDSTOI, "nfdstoi", "nfdstoi", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* cfitos$pack $FRintj,$FRk,$CCi,$cond */
{
FRV_INSN_CFITOS, "cfitos", "cfitos", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* cfstoi$pack $FRj,$FRintk,$CCi,$cond */
{
FRV_INSN_CFSTOI, "cfstoi", "cfstoi", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* nfitos$pack $FRintj,$FRk */
{
FRV_INSN_NFITOS, "nfitos", "nfitos", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* nfstoi$pack $FRj,$FRintk */
{
FRV_INSN_NFSTOI, "nfstoi", "nfstoi", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fmovs$pack $FRj,$FRk */
{
FRV_INSN_FMOVS, "fmovs", "fmovs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fmovd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FMOVD, "fmovd", "fmovd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fdmovs$pack $FRj,$FRk */
{
FRV_INSN_FDMOVS, "fdmovs", "fdmovs", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* cfmovs$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMOVS, "cfmovs", "cfmovs", 32,
- { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fnegs$pack $FRj,$FRk */
{
FRV_INSN_FNEGS, "fnegs", "fnegs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fnegd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FNEGD, "fnegd", "fnegd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fdnegs$pack $FRj,$FRk */
{
FRV_INSN_FDNEGS, "fdnegs", "fdnegs", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* cfnegs$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFNEGS, "cfnegs", "cfnegs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fabss$pack $FRj,$FRk */
{
FRV_INSN_FABSS, "fabss", "fabss", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fabsd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FABSD, "fabsd", "fabsd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* fdabss$pack $FRj,$FRk */
{
FRV_INSN_FDABSS, "fdabss", "fdabss", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
},
/* cfabss$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFABSS, "cfabss", "cfabss", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
},
/* fsqrts$pack $FRj,$FRk */
{
FRV_INSN_FSQRTS, "fsqrts", "fsqrts", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* fdsqrts$pack $FRj,$FRk */
{
FRV_INSN_FDSQRTS, "fdsqrts", "fdsqrts", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
},
/* nfdsqrts$pack $FRj,$FRk */
{
FRV_INSN_NFDSQRTS, "nfdsqrts", "nfdsqrts", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
},
/* fsqrtd$pack $FRdoublej,$FRdoublek */
{
FRV_INSN_FSQRTD, "fsqrtd", "fsqrtd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
},
/* cfsqrts$pack $FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFSQRTS, "cfsqrts", "cfsqrts", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* nfsqrts$pack $FRj,$FRk */
{
FRV_INSN_NFSQRTS, "nfsqrts", "nfsqrts", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* fadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FADDS, "fadds", "fadds", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* fsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FSUBS, "fsubs", "fsubs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* fmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMULS, "fmuls", "fmuls", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_3 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_F_3 } }
},
/* fdivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDIVS, "fdivs", "fdivs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* faddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FADDD, "faddd", "faddd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_NONE } }
},
/* fsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FSUBD, "fsubd", "fsubd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_NONE } }
},
/* fmuld$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FMULD, "fmuld", "fmuld", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_3 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_NONE } }
},
/* fdivd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FDIVD, "fdivd", "fdivd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
},
/* cfadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFADDS, "cfadds", "cfadds", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* cfsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFSUBS, "cfsubs", "cfsubs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* cfmuls$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMULS, "cfmuls", "cfmuls", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_3 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_F_3 } }
},
/* cfdivs$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFDIVS, "cfdivs", "cfdivs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* nfadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFADDS, "nfadds", "nfadds", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* nfsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFSUBS, "nfsubs", "nfsubs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* nfmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMULS, "nfmuls", "nfmuls", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_3 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_F_3 } }
},
/* nfdivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDIVS, "nfdivs", "nfdivs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
},
/* fcmps$pack $FRi,$FRj,$FCCi_2 */
{
FRV_INSN_FCMPS, "fcmps", "fcmps", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2 */
{
FRV_INSN_FCMPD, "fcmpd", "fcmpd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_NONE } }
},
/* cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond */
{
FRV_INSN_CFCMPS, "cfcmps", "cfcmps", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
},
/* fdcmps$pack $FRi,$FRj,$FCCi_2 */
{
FRV_INSN_FDCMPS, "fdcmps", "fdcmps", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* fmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMADDS, "fmadds", "fmadds", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fmsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMSUBS, "fmsubs", "fmsubs", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fmaddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FMADDD, "fmaddd", "fmaddd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fmsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
{
FRV_INSN_FMSUBD, "fmsubd", "fmsubd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fdmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMADDS, "fdmadds", "fdmadds", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfdmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMADDS, "nfdmadds", "nfdmadds", 32,
- { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* cfmadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMADDS, "cfmadds", "cfmadds", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* cfmsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMSUBS, "cfmsubs", "cfmsubs", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfmadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMADDS, "nfmadds", "nfmadds", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfmsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMSUBS, "nfmsubs", "nfmsubs", 32,
- { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMAS, "fmas", "fmas", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* fmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMSS, "fmss", "fmss", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* fdmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMAS, "fdmas", "fdmas", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fdmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMSS, "fdmss", "fdmss", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfdmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMAS, "nfdmas", "nfdmas", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfdmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMSS, "nfdmss", "nfdmss", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* cfmas$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMAS, "cfmas", "cfmas", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* cfmss$pack $FRi,$FRj,$FRk,$CCi,$cond */
{
FRV_INSN_CFMSS, "cfmss", "cfmss", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* fmad$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMAD, "fmad", "fmad", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* fmsd$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FMSD, "fmsd", "fmsd", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
},
/* nfmas$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMAS, "nfmas", "nfmas", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* nfmss$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFMSS, "nfmss", "nfmss", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
},
/* fdadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDADDS, "fdadds", "fdadds", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* fdsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDSUBS, "fdsubs", "fdsubs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* fdmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMULS, "fdmuls", "fdmuls", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
},
/* fddivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDDIVS, "fddivs", "fddivs", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_NONE } }
},
/* fdsads$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDSADS, "fdsads", "fdsads", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* fdmulcs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_FDMULCS, "fdmulcs", "fdmulcs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
},
/* nfdmulcs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMULCS, "nfdmulcs", "nfdmulcs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
},
/* nfdadds$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDADDS, "nfdadds", "nfdadds", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* nfdsubs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDSUBS, "nfdsubs", "nfdsubs", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* nfdmuls$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDMULS, "nfdmuls", "nfdmuls", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
},
/* nfddivs$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDDIVS, "nfddivs", "nfddivs", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_NONE } }
},
/* nfdsads$pack $FRi,$FRj,$FRk */
{
FRV_INSN_NFDSADS, "nfdsads", "nfdsads", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
},
/* nfdcmps$pack $FRi,$FRj,$FCCi_2 */
{
FRV_INSN_NFDCMPS, "nfdcmps", "nfdcmps", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_NONE } }
},
/* mhsetlos$pack $u12,$FRklo */
{
FRV_INSN_MHSETLOS, "mhsetlos", "mhsetlos", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mhsethis$pack $u12,$FRkhi */
{
FRV_INSN_MHSETHIS, "mhsethis", "mhsethis", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mhdsets$pack $u12,$FRintk */
{
FRV_INSN_MHDSETS, "mhdsets", "mhdsets", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mhsetloh$pack $s5,$FRklo */
{
FRV_INSN_MHSETLOH, "mhsetloh", "mhsetloh", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mhsethih$pack $s5,$FRkhi */
{
FRV_INSN_MHSETHIH, "mhsethih", "mhsethih", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mhdseth$pack $s5,$FRintk */
{
FRV_INSN_MHDSETH, "mhdseth", "mhdseth", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
},
/* mand$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MAND, "mand", "mand", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mor$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MOR, "mor", "mor", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mxor$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MXOR, "mxor", "mxor", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmand$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMAND, "cmand", "cmand", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMOR, "cmor", "cmor", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmxor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMXOR, "cmxor", "cmxor", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mnot$pack $FRintj,$FRintk */
{
FRV_INSN_MNOT, "mnot", "mnot", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmnot$pack $FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMNOT, "cmnot", "cmnot", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mrotli$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MROTLI, "mrotli", "mrotli", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mrotri$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MROTRI, "mrotri", "mrotri", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mwcut$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MWCUT, "mwcut", "mwcut", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mwcuti$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MWCUTI, "mwcuti", "mwcuti", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mcut$pack $ACC40Si,$FRintj,$FRintk */
{
FRV_INSN_MCUT, "mcut", "mcut", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mcuti$pack $ACC40Si,$s6,$FRintk */
{
FRV_INSN_MCUTI, "mcuti", "mcuti", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mcutss$pack $ACC40Si,$FRintj,$FRintk */
{
FRV_INSN_MCUTSS, "mcutss", "mcutss", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mcutssi$pack $ACC40Si,$s6,$FRintk */
{
FRV_INSN_MCUTSSI, "mcutssi", "mcutssi", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mdcutssi$pack $ACC40Si,$s6,$FRintkeven */
{
FRV_INSN_MDCUTSSI, "mdcutssi", "mdcutssi", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMLOW, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMLOW, FR400_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
},
/* maveh$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MAVEH, "maveh", "maveh", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* msllhi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MSLLHI, "msllhi", "msllhi", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* msrlhi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MSRLHI, "msrlhi", "msrlhi", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* msrahi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MSRAHI, "msrahi", "msrahi", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mdrotli$pack $FRintieven,$s6,$FRintkeven */
{
FRV_INSN_MDROTLI, "mdrotli", "mdrotli", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMLOW, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMLOW, FR400_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
},
/* mcplhi$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MCPLHI, "mcplhi", "mcplhi", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMLOW, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMLOW, FR400_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
},
/* mcpli$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MCPLI, "mcpli", "mcpli", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMLOW, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMLOW, FR400_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
},
/* msaths$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSATHS, "msaths", "msaths", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQSATHS, "mqsaths", "mqsaths", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_2 } }
},
/* msathu$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSATHU, "msathu", "msathu", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mcmpsh$pack $FRinti,$FRintj,$FCCk */
{
FRV_INSN_MCMPSH, "mcmpsh", "mcmpsh", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mcmpuh$pack $FRinti,$FRintj,$FCCk */
{
FRV_INSN_MCMPUH, "mcmpuh", "mcmpuh", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mabshs$pack $FRintj,$FRintk */
{
FRV_INSN_MABSHS, "mabshs", "mabshs", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_2 } }
},
/* maddhss$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MADDHSS, "maddhss", "maddhss", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* maddhus$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MADDHUS, "maddhus", "maddhus", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* msubhss$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSUBHSS, "msubhss", "msubhss", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* msubhus$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MSUBHUS, "msubhus", "msubhus", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmaddhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMADDHSS, "cmaddhss", "cmaddhss", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmaddhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMADDHUS, "cmaddhus", "cmaddhus", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmsubhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMSUBHSS, "cmsubhss", "cmsubhss", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmsubhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMSUBHUS, "cmsubhus", "cmsubhus", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQADDHSS, "mqaddhss", "mqaddhss", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQADDHUS, "mqaddhus", "mqaddhus", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQSUBHSS, "mqsubhss", "mqsubhss", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* mqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MQSUBHUS, "mqsubhus", "mqsubhus", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQADDHSS, "cmqaddhss", "cmqaddhss", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQADDHUS, "cmqaddhus", "cmqaddhus", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQSUBHSS, "cmqsubhss", "cmqsubhss", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* cmqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMQSUBHUS, "cmqsubhus", "cmqsubhus", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
},
/* maddaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MADDACCS, "maddaccs", "maddaccs", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* msubaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MSUBACCS, "msubaccs", "msubaccs", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mdaddaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MDADDACCS, "mdaddaccs", "mdaddaccs", 32,
- { 0, { (1<<MACH_FR400), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mdsubaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MDSUBACCS, "mdsubaccs", "mdsubaccs", 32,
- { 0, { (1<<MACH_FR400), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* masaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MASACCS, "masaccs", "masaccs", 32,
- { 0, { (1<<MACH_FR400), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mdasaccs$pack $ACC40Si,$ACC40Sk */
{
FRV_INSN_MDASACCS, "mdasaccs", "mdasaccs", 32,
- { 0, { (1<<MACH_FR400), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mmulhs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULHS, "mmulhs", "mmulhs", 32,
- { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmulhu$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULHU, "mmulhu", "mmulhu", 32,
- { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmulxhs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULXHS, "mmulxhs", "mmulxhs", 32,
- { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmulxhu$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMULXHU, "mmulxhu", "mmulxhu", 32,
- { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmmulhs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMMULHS, "cmmulhs", "cmmulhs", 32,
- { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmmulhu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMMULHU, "cmmulhu", "cmmulhu", 32,
- { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULHS, "mqmulhs", "mqmulhs", 32,
- { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULHU, "mqmulhu", "mqmulhu", 32,
- { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmulxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULXHS, "mqmulxhs", "mqmulxhs", 32,
- { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmulxhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMULXHU, "mqmulxhu", "mqmulxhu", 32,
- { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMQMULHS, "cmqmulhs", "cmqmulhs", 32,
- { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMQMULHU, "cmqmulhu", "cmqmulhu", 32,
- { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmachs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMACHS, "mmachs", "mmachs", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmachu$pack $FRinti,$FRintj,$ACC40Uk */
{
FRV_INSN_MMACHU, "mmachu", "mmachu", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmrdhs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MMRDHS, "mmrdhs", "mmrdhs", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mmrdhu$pack $FRinti,$FRintj,$ACC40Uk */
{
FRV_INSN_MMRDHU, "mmrdhu", "mmrdhu", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmmachs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMMACHS, "cmmachs", "cmmachs", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmmachu$pack $FRinti,$FRintj,$ACC40Uk,$CCi,$cond */
{
FRV_INSN_CMMACHU, "cmmachu", "cmmachu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMACHS, "mqmachs", "mqmachs", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk */
{
FRV_INSN_MQMACHU, "mqmachu", "mqmachu", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMQMACHS, "cmqmachs", "cmqmachs", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk,$CCi,$cond */
{
FRV_INSN_CMQMACHU, "cmqmachu", "cmqmachu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqxmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQXMACHS, "mqxmachs", "mqxmachs", 32,
- { 0, { (1<<MACH_FR400), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mqxmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQXMACXHS, "mqxmacxhs", "mqxmacxhs", 32,
- { 0, { (1<<MACH_FR400), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mqmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQMACXHS, "mqmacxhs", "mqmacxhs", 32,
- { 0, { (1<<MACH_FR400), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE } }
+ { 0, { (1<<MACH_FR400)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
},
/* mcpxrs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXRS, "mcpxrs", "mcpxrs", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mcpxru$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXRU, "mcpxru", "mcpxru", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mcpxis$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXIS, "mcpxis", "mcpxis", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mcpxiu$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXIU, "mcpxiu", "mcpxiu", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmcpxrs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXRS, "cmcpxrs", "cmcpxrs", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmcpxru$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXRU, "cmcpxru", "cmcpxru", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmcpxis$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXIS, "cmcpxis", "cmcpxis", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* cmcpxiu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXIU, "cmcpxiu", "cmcpxiu", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqcpxrs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXRS, "mqcpxrs", "mqcpxrs", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqcpxru$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXRU, "mqcpxru", "mqcpxru", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqcpxis$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXIS, "mqcpxis", "mqcpxis", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mqcpxiu$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXIU, "mqcpxiu", "mqcpxiu", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
},
/* mexpdhw$pack $FRinti,$u6,$FRintk */
{
FRV_INSN_MEXPDHW, "mexpdhw", "mexpdhw", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond */
{
FRV_INSN_CMEXPDHW, "cmexpdhw", "cmexpdhw", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mexpdhd$pack $FRinti,$u6,$FRintkeven */
{
FRV_INSN_MEXPDHD, "mexpdhd", "mexpdhd", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMEXPDHD, "cmexpdhd", "cmexpdhd", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mpackh$pack $FRinti,$FRintj,$FRintk */
{
FRV_INSN_MPACKH, "mpackh", "mpackh", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven */
{
FRV_INSN_MDPACKH, "mdpackh", "mdpackh", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_5 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_5, FR550_MAJOR_M_3 } }
},
/* munpackh$pack $FRinti,$FRintkeven */
{
FRV_INSN_MUNPACKH, "munpackh", "munpackh", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mdunpackh$pack $FRintieven,$FRintk */
{
FRV_INSN_MDUNPACKH, "mdunpackh", "mdunpackh", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_7 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_7, FR550_MAJOR_NONE } }
},
/* mbtoh$pack $FRintj,$FRintkeven */
{
FRV_INSN_MBTOH, "mbtoh", "mbtoh", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond */
{
FRV_INSN_CMBTOH, "cmbtoh", "cmbtoh", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mhtob$pack $FRintjeven,$FRintk */
{
FRV_INSN_MHTOB, "mhtob", "mhtob", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond */
{
FRV_INSN_CMHTOB, "cmhtob", "cmhtob", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mbtohe$pack $FRintj,$FRintk */
{
FRV_INSN_MBTOHE, "mbtohe", "mbtohe", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_7 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_7, FR550_MAJOR_NONE } }
},
/* cmbtohe$pack $FRintj,$FRintk,$CCi,$cond */
{
FRV_INSN_CMBTOHE, "cmbtohe", "cmbtohe", 32,
- { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_7 } }
+ { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_7, FR550_MAJOR_NONE } }
},
/* mnop$pack */
{
FRV_INSN_MNOP, "mnop", "mnop", 32,
- { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_1 } }
},
/* mclracc$pack $ACC40Sk,$A0 */
{
FRV_INSN_MCLRACC_0, "mclracc-0", "mclracc", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_3, FR550_MAJOR_M_3 } }
},
/* mclracc$pack $ACC40Sk,$A1 */
{
FRV_INSN_MCLRACC_1, "mclracc-1", "mclracc", 32,
- { 0, { (1<<MACH_BASE), UNIT_MCLRACC_1, FR400_MAJOR_M_2, FR500_MAJOR_M_6 } }
+ { 0, { (1<<MACH_BASE), UNIT_MCLRACC_1, FR400_MAJOR_M_2, FR500_MAJOR_M_6, FR550_MAJOR_M_3 } }
},
/* mrdacc$pack $ACC40Si,$FRintk */
{
FRV_INSN_MRDACC, "mrdacc", "mrdacc", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mrdaccg$pack $ACCGi,$FRintk */
{
FRV_INSN_MRDACCG, "mrdaccg", "mrdaccg", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
},
/* mwtacc$pack $FRinti,$ACC40Sk */
{
FRV_INSN_MWTACC, "mwtacc", "mwtacc", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_3, FR550_MAJOR_M_3 } }
},
/* mwtaccg$pack $FRinti,$ACCGk */
{
FRV_INSN_MWTACCG, "mwtaccg", "mwtaccg", 32,
- { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_3 } }
+ { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_3, FR550_MAJOR_M_3 } }
},
/* mcop1$pack $FRi,$FRj,$FRk */
{
FRV_INSN_MCOP1, "mcop1", "mcop1", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_1, FR550_MAJOR_NONE } }
},
/* mcop2$pack $FRi,$FRj,$FRk */
{
FRV_INSN_MCOP2, "mcop2", "mcop2", 32,
- { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_1 } }
+ { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR500_MAJOR_M_1, FR550_MAJOR_NONE } }
},
/* fnop$pack */
{
FRV_INSN_FNOP, "fnop", "fnop", 32,
- { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_8 } }
+ { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR500_MAJOR_F_8, FR550_MAJOR_F_1 } }
},
};
diff --git a/opcodes/frv-desc.h b/opcodes/frv-desc.h
index 5e6b061..5f72800 100644
--- a/opcodes/frv-desc.h
+++ b/opcodes/frv-desc.h
@@ -233,240 +233,240 @@ typedef enum spr_names {
, H_SPR_HSR55 = 71, H_SPR_HSR56 = 72, H_SPR_HSR57 = 73, H_SPR_HSR58 = 74
, H_SPR_HSR59 = 75, H_SPR_HSR60 = 76, H_SPR_HSR61 = 77, H_SPR_HSR62 = 78
, H_SPR_HSR63 = 79, H_SPR_CCR = 256, H_SPR_CCCR = 263, H_SPR_LR = 272
- , H_SPR_LCR = 273, H_SPR_ISR = 288, H_SPR_NEEAR0 = 352, H_SPR_NEEAR1 = 353
- , H_SPR_NEEAR2 = 354, H_SPR_NEEAR3 = 355, H_SPR_NEEAR4 = 356, H_SPR_NEEAR5 = 357
- , H_SPR_NEEAR6 = 358, H_SPR_NEEAR7 = 359, H_SPR_NEEAR8 = 360, H_SPR_NEEAR9 = 361
- , H_SPR_NEEAR10 = 362, H_SPR_NEEAR11 = 363, H_SPR_NEEAR12 = 364, H_SPR_NEEAR13 = 365
- , H_SPR_NEEAR14 = 366, H_SPR_NEEAR15 = 367, H_SPR_NEEAR16 = 368, H_SPR_NEEAR17 = 369
- , H_SPR_NEEAR18 = 370, H_SPR_NEEAR19 = 371, H_SPR_NEEAR20 = 372, H_SPR_NEEAR21 = 373
- , H_SPR_NEEAR22 = 374, H_SPR_NEEAR23 = 375, H_SPR_NEEAR24 = 376, H_SPR_NEEAR25 = 377
- , H_SPR_NEEAR26 = 378, H_SPR_NEEAR27 = 379, H_SPR_NEEAR28 = 380, H_SPR_NEEAR29 = 381
- , H_SPR_NEEAR30 = 382, H_SPR_NEEAR31 = 383, H_SPR_NESR0 = 384, H_SPR_NESR1 = 385
- , H_SPR_NESR2 = 386, H_SPR_NESR3 = 387, H_SPR_NESR4 = 388, H_SPR_NESR5 = 389
- , H_SPR_NESR6 = 390, H_SPR_NESR7 = 391, H_SPR_NESR8 = 392, H_SPR_NESR9 = 393
- , H_SPR_NESR10 = 394, H_SPR_NESR11 = 395, H_SPR_NESR12 = 396, H_SPR_NESR13 = 397
- , H_SPR_NESR14 = 398, H_SPR_NESR15 = 399, H_SPR_NESR16 = 400, H_SPR_NESR17 = 401
- , H_SPR_NESR18 = 402, H_SPR_NESR19 = 403, H_SPR_NESR20 = 404, H_SPR_NESR21 = 405
- , H_SPR_NESR22 = 406, H_SPR_NESR23 = 407, H_SPR_NESR24 = 408, H_SPR_NESR25 = 409
- , H_SPR_NESR26 = 410, H_SPR_NESR27 = 411, H_SPR_NESR28 = 412, H_SPR_NESR29 = 413
- , H_SPR_NESR30 = 414, H_SPR_NESR31 = 415, H_SPR_NECR = 416, H_SPR_GNER0 = 432
- , H_SPR_GNER1 = 433, H_SPR_FNER0 = 434, H_SPR_FNER1 = 435, H_SPR_EPCR0 = 512
- , H_SPR_EPCR1 = 513, H_SPR_EPCR2 = 514, H_SPR_EPCR3 = 515, H_SPR_EPCR4 = 516
- , H_SPR_EPCR5 = 517, H_SPR_EPCR6 = 518, H_SPR_EPCR7 = 519, H_SPR_EPCR8 = 520
- , H_SPR_EPCR9 = 521, H_SPR_EPCR10 = 522, H_SPR_EPCR11 = 523, H_SPR_EPCR12 = 524
- , H_SPR_EPCR13 = 525, H_SPR_EPCR14 = 526, H_SPR_EPCR15 = 527, H_SPR_EPCR16 = 528
- , H_SPR_EPCR17 = 529, H_SPR_EPCR18 = 530, H_SPR_EPCR19 = 531, H_SPR_EPCR20 = 532
- , H_SPR_EPCR21 = 533, H_SPR_EPCR22 = 534, H_SPR_EPCR23 = 535, H_SPR_EPCR24 = 536
- , H_SPR_EPCR25 = 537, H_SPR_EPCR26 = 538, H_SPR_EPCR27 = 539, H_SPR_EPCR28 = 540
- , H_SPR_EPCR29 = 541, H_SPR_EPCR30 = 542, H_SPR_EPCR31 = 543, H_SPR_EPCR32 = 544
- , H_SPR_EPCR33 = 545, H_SPR_EPCR34 = 546, H_SPR_EPCR35 = 547, H_SPR_EPCR36 = 548
- , H_SPR_EPCR37 = 549, H_SPR_EPCR38 = 550, H_SPR_EPCR39 = 551, H_SPR_EPCR40 = 552
- , H_SPR_EPCR41 = 553, H_SPR_EPCR42 = 554, H_SPR_EPCR43 = 555, H_SPR_EPCR44 = 556
- , H_SPR_EPCR45 = 557, H_SPR_EPCR46 = 558, H_SPR_EPCR47 = 559, H_SPR_EPCR48 = 560
- , H_SPR_EPCR49 = 561, H_SPR_EPCR50 = 562, H_SPR_EPCR51 = 563, H_SPR_EPCR52 = 564
- , H_SPR_EPCR53 = 565, H_SPR_EPCR54 = 566, H_SPR_EPCR55 = 567, H_SPR_EPCR56 = 568
- , H_SPR_EPCR57 = 569, H_SPR_EPCR58 = 570, H_SPR_EPCR59 = 571, H_SPR_EPCR60 = 572
- , H_SPR_EPCR61 = 573, H_SPR_EPCR62 = 574, H_SPR_EPCR63 = 575, H_SPR_ESR0 = 576
- , H_SPR_ESR1 = 577, H_SPR_ESR2 = 578, H_SPR_ESR3 = 579, H_SPR_ESR4 = 580
- , H_SPR_ESR5 = 581, H_SPR_ESR6 = 582, H_SPR_ESR7 = 583, H_SPR_ESR8 = 584
- , H_SPR_ESR9 = 585, H_SPR_ESR10 = 586, H_SPR_ESR11 = 587, H_SPR_ESR12 = 588
- , H_SPR_ESR13 = 589, H_SPR_ESR14 = 590, H_SPR_ESR15 = 591, H_SPR_ESR16 = 592
- , H_SPR_ESR17 = 593, H_SPR_ESR18 = 594, H_SPR_ESR19 = 595, H_SPR_ESR20 = 596
- , H_SPR_ESR21 = 597, H_SPR_ESR22 = 598, H_SPR_ESR23 = 599, H_SPR_ESR24 = 600
- , H_SPR_ESR25 = 601, H_SPR_ESR26 = 602, H_SPR_ESR27 = 603, H_SPR_ESR28 = 604
- , H_SPR_ESR29 = 605, H_SPR_ESR30 = 606, H_SPR_ESR31 = 607, H_SPR_ESR32 = 608
- , H_SPR_ESR33 = 609, H_SPR_ESR34 = 610, H_SPR_ESR35 = 611, H_SPR_ESR36 = 612
- , H_SPR_ESR37 = 613, H_SPR_ESR38 = 614, H_SPR_ESR39 = 615, H_SPR_ESR40 = 616
- , H_SPR_ESR41 = 617, H_SPR_ESR42 = 618, H_SPR_ESR43 = 619, H_SPR_ESR44 = 620
- , H_SPR_ESR45 = 621, H_SPR_ESR46 = 622, H_SPR_ESR47 = 623, H_SPR_ESR48 = 624
- , H_SPR_ESR49 = 625, H_SPR_ESR50 = 626, H_SPR_ESR51 = 627, H_SPR_ESR52 = 628
- , H_SPR_ESR53 = 629, H_SPR_ESR54 = 630, H_SPR_ESR55 = 631, H_SPR_ESR56 = 632
- , H_SPR_ESR57 = 633, H_SPR_ESR58 = 634, H_SPR_ESR59 = 635, H_SPR_ESR60 = 636
- , H_SPR_ESR61 = 637, H_SPR_ESR62 = 638, H_SPR_ESR63 = 639, H_SPR_EIR0 = 640
- , H_SPR_EIR1 = 641, H_SPR_EIR2 = 642, H_SPR_EIR3 = 643, H_SPR_EIR4 = 644
- , H_SPR_EIR5 = 645, H_SPR_EIR6 = 646, H_SPR_EIR7 = 647, H_SPR_EIR8 = 648
- , H_SPR_EIR9 = 649, H_SPR_EIR10 = 650, H_SPR_EIR11 = 651, H_SPR_EIR12 = 652
- , H_SPR_EIR13 = 653, H_SPR_EIR14 = 654, H_SPR_EIR15 = 655, H_SPR_EIR16 = 656
- , H_SPR_EIR17 = 657, H_SPR_EIR18 = 658, H_SPR_EIR19 = 659, H_SPR_EIR20 = 660
- , H_SPR_EIR21 = 661, H_SPR_EIR22 = 662, H_SPR_EIR23 = 663, H_SPR_EIR24 = 664
- , H_SPR_EIR25 = 665, H_SPR_EIR26 = 666, H_SPR_EIR27 = 667, H_SPR_EIR28 = 668
- , H_SPR_EIR29 = 669, H_SPR_EIR30 = 670, H_SPR_EIR31 = 671, H_SPR_ESFR0 = 672
- , H_SPR_ESFR1 = 673, H_SPR_SR0 = 768, H_SPR_SR1 = 769, H_SPR_SR2 = 770
- , H_SPR_SR3 = 771, H_SPR_FSR0 = 1024, H_SPR_FSR1 = 1025, H_SPR_FSR2 = 1026
- , H_SPR_FSR3 = 1027, H_SPR_FSR4 = 1028, H_SPR_FSR5 = 1029, H_SPR_FSR6 = 1030
- , H_SPR_FSR7 = 1031, H_SPR_FSR8 = 1032, H_SPR_FSR9 = 1033, H_SPR_FSR10 = 1034
- , H_SPR_FSR11 = 1035, H_SPR_FSR12 = 1036, H_SPR_FSR13 = 1037, H_SPR_FSR14 = 1038
- , H_SPR_FSR15 = 1039, H_SPR_FSR16 = 1040, H_SPR_FSR17 = 1041, H_SPR_FSR18 = 1042
- , H_SPR_FSR19 = 1043, H_SPR_FSR20 = 1044, H_SPR_FSR21 = 1045, H_SPR_FSR22 = 1046
- , H_SPR_FSR23 = 1047, H_SPR_FSR24 = 1048, H_SPR_FSR25 = 1049, H_SPR_FSR26 = 1050
- , H_SPR_FSR27 = 1051, H_SPR_FSR28 = 1052, H_SPR_FSR29 = 1053, H_SPR_FSR30 = 1054
- , H_SPR_FSR31 = 1055, H_SPR_FSR32 = 1056, H_SPR_FSR33 = 1057, H_SPR_FSR34 = 1058
- , H_SPR_FSR35 = 1059, H_SPR_FSR36 = 1060, H_SPR_FSR37 = 1061, H_SPR_FSR38 = 1062
- , H_SPR_FSR39 = 1063, H_SPR_FSR40 = 1064, H_SPR_FSR41 = 1065, H_SPR_FSR42 = 1066
- , H_SPR_FSR43 = 1067, H_SPR_FSR44 = 1068, H_SPR_FSR45 = 1069, H_SPR_FSR46 = 1070
- , H_SPR_FSR47 = 1071, H_SPR_FSR48 = 1072, H_SPR_FSR49 = 1073, H_SPR_FSR50 = 1074
- , H_SPR_FSR51 = 1075, H_SPR_FSR52 = 1076, H_SPR_FSR53 = 1077, H_SPR_FSR54 = 1078
- , H_SPR_FSR55 = 1079, H_SPR_FSR56 = 1080, H_SPR_FSR57 = 1081, H_SPR_FSR58 = 1082
- , H_SPR_FSR59 = 1083, H_SPR_FSR60 = 1084, H_SPR_FSR61 = 1085, H_SPR_FSR62 = 1086
- , H_SPR_FSR63 = 1087, H_SPR_FQOP0 = 1088, H_SPR_FQOP1 = 1090, H_SPR_FQOP2 = 1092
- , H_SPR_FQOP3 = 1094, H_SPR_FQOP4 = 1096, H_SPR_FQOP5 = 1098, H_SPR_FQOP6 = 1100
- , H_SPR_FQOP7 = 1102, H_SPR_FQOP8 = 1104, H_SPR_FQOP9 = 1106, H_SPR_FQOP10 = 1108
- , H_SPR_FQOP11 = 1110, H_SPR_FQOP12 = 1112, H_SPR_FQOP13 = 1114, H_SPR_FQOP14 = 1116
- , H_SPR_FQOP15 = 1118, H_SPR_FQOP16 = 1120, H_SPR_FQOP17 = 1122, H_SPR_FQOP18 = 1124
- , H_SPR_FQOP19 = 1126, H_SPR_FQOP20 = 1128, H_SPR_FQOP21 = 1130, H_SPR_FQOP22 = 1132
- , H_SPR_FQOP23 = 1134, H_SPR_FQOP24 = 1136, H_SPR_FQOP25 = 1138, H_SPR_FQOP26 = 1140
- , H_SPR_FQOP27 = 1142, H_SPR_FQOP28 = 1144, H_SPR_FQOP29 = 1146, H_SPR_FQOP30 = 1148
- , H_SPR_FQOP31 = 1150, H_SPR_FQST0 = 1089, H_SPR_FQST1 = 1091, H_SPR_FQST2 = 1093
- , H_SPR_FQST3 = 1095, H_SPR_FQST4 = 1097, H_SPR_FQST5 = 1099, H_SPR_FQST6 = 1101
- , H_SPR_FQST7 = 1103, H_SPR_FQST8 = 1105, H_SPR_FQST9 = 1107, H_SPR_FQST10 = 1109
- , H_SPR_FQST11 = 1111, H_SPR_FQST12 = 1113, H_SPR_FQST13 = 1115, H_SPR_FQST14 = 1117
- , H_SPR_FQST15 = 1119, H_SPR_FQST16 = 1121, H_SPR_FQST17 = 1123, H_SPR_FQST18 = 1125
- , H_SPR_FQST19 = 1127, H_SPR_FQST20 = 1129, H_SPR_FQST21 = 1131, H_SPR_FQST22 = 1133
- , H_SPR_FQST23 = 1135, H_SPR_FQST24 = 1137, H_SPR_FQST25 = 1139, H_SPR_FQST26 = 1141
- , H_SPR_FQST27 = 1143, H_SPR_FQST28 = 1145, H_SPR_FQST29 = 1147, H_SPR_FQST30 = 1149
- , H_SPR_FQST31 = 1151, H_SPR_MCILR0 = 1272, H_SPR_MCILR1 = 1273, H_SPR_MSR0 = 1280
- , H_SPR_MSR1 = 1281, H_SPR_MSR2 = 1282, H_SPR_MSR3 = 1283, H_SPR_MSR4 = 1284
- , H_SPR_MSR5 = 1285, H_SPR_MSR6 = 1286, H_SPR_MSR7 = 1287, H_SPR_MSR8 = 1288
- , H_SPR_MSR9 = 1289, H_SPR_MSR10 = 1290, H_SPR_MSR11 = 1291, H_SPR_MSR12 = 1292
- , H_SPR_MSR13 = 1293, H_SPR_MSR14 = 1294, H_SPR_MSR15 = 1295, H_SPR_MSR16 = 1296
- , H_SPR_MSR17 = 1297, H_SPR_MSR18 = 1298, H_SPR_MSR19 = 1299, H_SPR_MSR20 = 1300
- , H_SPR_MSR21 = 1301, H_SPR_MSR22 = 1302, H_SPR_MSR23 = 1303, H_SPR_MSR24 = 1304
- , H_SPR_MSR25 = 1305, H_SPR_MSR26 = 1306, H_SPR_MSR27 = 1307, H_SPR_MSR28 = 1308
- , H_SPR_MSR29 = 1309, H_SPR_MSR30 = 1310, H_SPR_MSR31 = 1311, H_SPR_MSR32 = 1312
- , H_SPR_MSR33 = 1313, H_SPR_MSR34 = 1314, H_SPR_MSR35 = 1315, H_SPR_MSR36 = 1316
- , H_SPR_MSR37 = 1317, H_SPR_MSR38 = 1318, H_SPR_MSR39 = 1319, H_SPR_MSR40 = 1320
- , H_SPR_MSR41 = 1321, H_SPR_MSR42 = 1322, H_SPR_MSR43 = 1323, H_SPR_MSR44 = 1324
- , H_SPR_MSR45 = 1325, H_SPR_MSR46 = 1326, H_SPR_MSR47 = 1327, H_SPR_MSR48 = 1328
- , H_SPR_MSR49 = 1329, H_SPR_MSR50 = 1330, H_SPR_MSR51 = 1331, H_SPR_MSR52 = 1332
- , H_SPR_MSR53 = 1333, H_SPR_MSR54 = 1334, H_SPR_MSR55 = 1335, H_SPR_MSR56 = 1336
- , H_SPR_MSR57 = 1337, H_SPR_MSR58 = 1338, H_SPR_MSR59 = 1339, H_SPR_MSR60 = 1340
- , H_SPR_MSR61 = 1341, H_SPR_MSR62 = 1342, H_SPR_MSR63 = 1343, H_SPR_MQOP0 = 1344
- , H_SPR_MQOP1 = 1346, H_SPR_MQOP2 = 1348, H_SPR_MQOP3 = 1350, H_SPR_MQOP4 = 1352
- , H_SPR_MQOP5 = 1354, H_SPR_MQOP6 = 1356, H_SPR_MQOP7 = 1358, H_SPR_MQOP8 = 1360
- , H_SPR_MQOP9 = 1362, H_SPR_MQOP10 = 1364, H_SPR_MQOP11 = 1366, H_SPR_MQOP12 = 1368
- , H_SPR_MQOP13 = 1370, H_SPR_MQOP14 = 1372, H_SPR_MQOP15 = 1374, H_SPR_MQOP16 = 1376
- , H_SPR_MQOP17 = 1378, H_SPR_MQOP18 = 1380, H_SPR_MQOP19 = 1382, H_SPR_MQOP20 = 1384
- , H_SPR_MQOP21 = 1386, H_SPR_MQOP22 = 1388, H_SPR_MQOP23 = 1390, H_SPR_MQOP24 = 1392
- , H_SPR_MQOP25 = 1394, H_SPR_MQOP26 = 1396, H_SPR_MQOP27 = 1398, H_SPR_MQOP28 = 1400
- , H_SPR_MQOP29 = 1402, H_SPR_MQOP30 = 1404, H_SPR_MQOP31 = 1406, H_SPR_MQST0 = 1345
- , H_SPR_MQST1 = 1347, H_SPR_MQST2 = 1349, H_SPR_MQST3 = 1351, H_SPR_MQST4 = 1353
- , H_SPR_MQST5 = 1355, H_SPR_MQST6 = 1357, H_SPR_MQST7 = 1359, H_SPR_MQST8 = 1361
- , H_SPR_MQST9 = 1363, H_SPR_MQST10 = 1365, H_SPR_MQST11 = 1367, H_SPR_MQST12 = 1369
- , H_SPR_MQST13 = 1371, H_SPR_MQST14 = 1373, H_SPR_MQST15 = 1375, H_SPR_MQST16 = 1377
- , H_SPR_MQST17 = 1379, H_SPR_MQST18 = 1381, H_SPR_MQST19 = 1383, H_SPR_MQST20 = 1385
- , H_SPR_MQST21 = 1387, H_SPR_MQST22 = 1389, H_SPR_MQST23 = 1391, H_SPR_MQST24 = 1393
- , H_SPR_MQST25 = 1395, H_SPR_MQST26 = 1397, H_SPR_MQST27 = 1399, H_SPR_MQST28 = 1401
- , H_SPR_MQST29 = 1403, H_SPR_MQST30 = 1405, H_SPR_MQST31 = 1407, H_SPR_EAR0 = 1536
- , H_SPR_EAR1 = 1537, H_SPR_EAR2 = 1538, H_SPR_EAR3 = 1539, H_SPR_EAR4 = 1540
- , H_SPR_EAR5 = 1541, H_SPR_EAR6 = 1542, H_SPR_EAR7 = 1543, H_SPR_EAR8 = 1544
- , H_SPR_EAR9 = 1545, H_SPR_EAR10 = 1546, H_SPR_EAR11 = 1547, H_SPR_EAR12 = 1548
- , H_SPR_EAR13 = 1549, H_SPR_EAR14 = 1550, H_SPR_EAR15 = 1551, H_SPR_EAR16 = 1552
- , H_SPR_EAR17 = 1553, H_SPR_EAR18 = 1554, H_SPR_EAR19 = 1555, H_SPR_EAR20 = 1556
- , H_SPR_EAR21 = 1557, H_SPR_EAR22 = 1558, H_SPR_EAR23 = 1559, H_SPR_EAR24 = 1560
- , H_SPR_EAR25 = 1561, H_SPR_EAR26 = 1562, H_SPR_EAR27 = 1563, H_SPR_EAR28 = 1564
- , H_SPR_EAR29 = 1565, H_SPR_EAR30 = 1566, H_SPR_EAR31 = 1567, H_SPR_EAR32 = 1568
- , H_SPR_EAR33 = 1569, H_SPR_EAR34 = 1570, H_SPR_EAR35 = 1571, H_SPR_EAR36 = 1572
- , H_SPR_EAR37 = 1573, H_SPR_EAR38 = 1574, H_SPR_EAR39 = 1575, H_SPR_EAR40 = 1576
- , H_SPR_EAR41 = 1577, H_SPR_EAR42 = 1578, H_SPR_EAR43 = 1579, H_SPR_EAR44 = 1580
- , H_SPR_EAR45 = 1581, H_SPR_EAR46 = 1582, H_SPR_EAR47 = 1583, H_SPR_EAR48 = 1584
- , H_SPR_EAR49 = 1585, H_SPR_EAR50 = 1586, H_SPR_EAR51 = 1587, H_SPR_EAR52 = 1588
- , H_SPR_EAR53 = 1589, H_SPR_EAR54 = 1590, H_SPR_EAR55 = 1591, H_SPR_EAR56 = 1592
- , H_SPR_EAR57 = 1593, H_SPR_EAR58 = 1594, H_SPR_EAR59 = 1595, H_SPR_EAR60 = 1596
- , H_SPR_EAR61 = 1597, H_SPR_EAR62 = 1598, H_SPR_EAR63 = 1599, H_SPR_EDR0 = 1600
- , H_SPR_EDR1 = 1601, H_SPR_EDR2 = 1602, H_SPR_EDR3 = 1603, H_SPR_EDR4 = 1604
- , H_SPR_EDR5 = 1605, H_SPR_EDR6 = 1606, H_SPR_EDR7 = 1607, H_SPR_EDR8 = 1608
- , H_SPR_EDR9 = 1609, H_SPR_EDR10 = 1610, H_SPR_EDR11 = 1611, H_SPR_EDR12 = 1612
- , H_SPR_EDR13 = 1613, H_SPR_EDR14 = 1614, H_SPR_EDR15 = 1615, H_SPR_EDR16 = 1616
- , H_SPR_EDR17 = 1617, H_SPR_EDR18 = 1618, H_SPR_EDR19 = 1619, H_SPR_EDR20 = 1620
- , H_SPR_EDR21 = 1621, H_SPR_EDR22 = 1622, H_SPR_EDR23 = 1623, H_SPR_EDR24 = 1624
- , H_SPR_EDR25 = 1625, H_SPR_EDR26 = 1626, H_SPR_EDR27 = 1627, H_SPR_EDR28 = 1628
- , H_SPR_EDR29 = 1629, H_SPR_EDR30 = 1630, H_SPR_EDR31 = 1631, H_SPR_EDR32 = 1632
- , H_SPR_EDR33 = 1636, H_SPR_EDR34 = 1634, H_SPR_EDR35 = 1635, H_SPR_EDR36 = 1636
- , H_SPR_EDR37 = 1637, H_SPR_EDR38 = 1638, H_SPR_EDR39 = 1639, H_SPR_EDR40 = 1640
- , H_SPR_EDR41 = 1641, H_SPR_EDR42 = 1642, H_SPR_EDR43 = 1643, H_SPR_EDR44 = 1644
- , H_SPR_EDR45 = 1645, H_SPR_EDR46 = 1646, H_SPR_EDR47 = 1647, H_SPR_EDR48 = 1648
- , H_SPR_EDR49 = 1649, H_SPR_EDR50 = 1650, H_SPR_EDR51 = 1651, H_SPR_EDR52 = 1652
- , H_SPR_EDR53 = 1653, H_SPR_EDR54 = 1654, H_SPR_EDR55 = 1655, H_SPR_EDR56 = 1656
- , H_SPR_EDR57 = 1657, H_SPR_EDR58 = 1658, H_SPR_EDR59 = 1659, H_SPR_EDR60 = 1660
- , H_SPR_EDR61 = 1661, H_SPR_EDR62 = 1662, H_SPR_EDR63 = 1663, H_SPR_IAMLR0 = 1664
- , H_SPR_IAMLR1 = 1665, H_SPR_IAMLR2 = 1666, H_SPR_IAMLR3 = 1667, H_SPR_IAMLR4 = 1668
- , H_SPR_IAMLR5 = 1669, H_SPR_IAMLR6 = 1670, H_SPR_IAMLR7 = 1671, H_SPR_IAMLR8 = 1672
- , H_SPR_IAMLR9 = 1673, H_SPR_IAMLR10 = 1674, H_SPR_IAMLR11 = 1675, H_SPR_IAMLR12 = 1676
- , H_SPR_IAMLR13 = 1677, H_SPR_IAMLR14 = 1678, H_SPR_IAMLR15 = 1679, H_SPR_IAMLR16 = 1680
- , H_SPR_IAMLR17 = 1681, H_SPR_IAMLR18 = 1682, H_SPR_IAMLR19 = 1683, H_SPR_IAMLR20 = 1684
- , H_SPR_IAMLR21 = 1685, H_SPR_IAMLR22 = 1686, H_SPR_IAMLR23 = 1687, H_SPR_IAMLR24 = 1688
- , H_SPR_IAMLR25 = 1689, H_SPR_IAMLR26 = 1690, H_SPR_IAMLR27 = 1691, H_SPR_IAMLR28 = 1692
- , H_SPR_IAMLR29 = 1693, H_SPR_IAMLR30 = 1694, H_SPR_IAMLR31 = 1695, H_SPR_IAMLR32 = 1696
- , H_SPR_IAMLR33 = 1697, H_SPR_IAMLR34 = 1698, H_SPR_IAMLR35 = 1699, H_SPR_IAMLR36 = 1700
- , H_SPR_IAMLR37 = 1701, H_SPR_IAMLR38 = 1702, H_SPR_IAMLR39 = 1703, H_SPR_IAMLR40 = 1704
- , H_SPR_IAMLR41 = 1705, H_SPR_IAMLR42 = 1706, H_SPR_IAMLR43 = 1707, H_SPR_IAMLR44 = 1708
- , H_SPR_IAMLR45 = 1709, H_SPR_IAMLR46 = 1710, H_SPR_IAMLR47 = 1711, H_SPR_IAMLR48 = 1712
- , H_SPR_IAMLR49 = 1713, H_SPR_IAMLR50 = 1714, H_SPR_IAMLR51 = 1715, H_SPR_IAMLR52 = 1716
- , H_SPR_IAMLR53 = 1717, H_SPR_IAMLR54 = 1718, H_SPR_IAMLR55 = 1719, H_SPR_IAMLR56 = 1720
- , H_SPR_IAMLR57 = 1721, H_SPR_IAMLR58 = 1722, H_SPR_IAMLR59 = 1723, H_SPR_IAMLR60 = 1724
- , H_SPR_IAMLR61 = 1725, H_SPR_IAMLR62 = 1726, H_SPR_IAMLR63 = 1727, H_SPR_IAMPR0 = 1728
- , H_SPR_IAMPR1 = 1729, H_SPR_IAMPR2 = 1730, H_SPR_IAMPR3 = 1731, H_SPR_IAMPR4 = 1732
- , H_SPR_IAMPR5 = 1733, H_SPR_IAMPR6 = 1734, H_SPR_IAMPR7 = 1735, H_SPR_IAMPR8 = 1736
- , H_SPR_IAMPR9 = 1737, H_SPR_IAMPR10 = 1738, H_SPR_IAMPR11 = 1739, H_SPR_IAMPR12 = 1740
- , H_SPR_IAMPR13 = 1741, H_SPR_IAMPR14 = 1742, H_SPR_IAMPR15 = 1743, H_SPR_IAMPR16 = 1744
- , H_SPR_IAMPR17 = 1745, H_SPR_IAMPR18 = 1746, H_SPR_IAMPR19 = 1747, H_SPR_IAMPR20 = 1748
- , H_SPR_IAMPR21 = 1749, H_SPR_IAMPR22 = 1750, H_SPR_IAMPR23 = 1751, H_SPR_IAMPR24 = 1752
- , H_SPR_IAMPR25 = 1753, H_SPR_IAMPR26 = 1754, H_SPR_IAMPR27 = 1755, H_SPR_IAMPR28 = 1756
- , H_SPR_IAMPR29 = 1757, H_SPR_IAMPR30 = 1758, H_SPR_IAMPR31 = 1759, H_SPR_IAMPR32 = 1760
- , H_SPR_IAMPR33 = 1761, H_SPR_IAMPR34 = 1762, H_SPR_IAMPR35 = 1763, H_SPR_IAMPR36 = 1764
- , H_SPR_IAMPR37 = 1765, H_SPR_IAMPR38 = 1766, H_SPR_IAMPR39 = 1767, H_SPR_IAMPR40 = 1768
- , H_SPR_IAMPR41 = 1769, H_SPR_IAMPR42 = 1770, H_SPR_IAMPR43 = 1771, H_SPR_IAMPR44 = 1772
- , H_SPR_IAMPR45 = 1773, H_SPR_IAMPR46 = 1774, H_SPR_IAMPR47 = 1775, H_SPR_IAMPR48 = 1776
- , H_SPR_IAMPR49 = 1777, H_SPR_IAMPR50 = 1778, H_SPR_IAMPR51 = 1779, H_SPR_IAMPR52 = 1780
- , H_SPR_IAMPR53 = 1781, H_SPR_IAMPR54 = 1782, H_SPR_IAMPR55 = 1783, H_SPR_IAMPR56 = 1784
- , H_SPR_IAMPR57 = 1785, H_SPR_IAMPR58 = 1786, H_SPR_IAMPR59 = 1787, H_SPR_IAMPR60 = 1788
- , H_SPR_IAMPR61 = 1789, H_SPR_IAMPR62 = 1790, H_SPR_IAMPR63 = 1791, H_SPR_DAMLR0 = 1792
- , H_SPR_DAMLR1 = 1793, H_SPR_DAMLR2 = 1794, H_SPR_DAMLR3 = 1795, H_SPR_DAMLR4 = 1796
- , H_SPR_DAMLR5 = 1797, H_SPR_DAMLR6 = 1798, H_SPR_DAMLR7 = 1799, H_SPR_DAMLR8 = 1800
- , H_SPR_DAMLR9 = 1801, H_SPR_DAMLR10 = 1802, H_SPR_DAMLR11 = 1803, H_SPR_DAMLR12 = 1804
- , H_SPR_DAMLR13 = 1805, H_SPR_DAMLR14 = 1806, H_SPR_DAMLR15 = 1807, H_SPR_DAMLR16 = 1808
- , H_SPR_DAMLR17 = 1809, H_SPR_DAMLR18 = 1810, H_SPR_DAMLR19 = 1811, H_SPR_DAMLR20 = 1812
- , H_SPR_DAMLR21 = 1813, H_SPR_DAMLR22 = 1814, H_SPR_DAMLR23 = 1815, H_SPR_DAMLR24 = 1816
- , H_SPR_DAMLR25 = 1817, H_SPR_DAMLR26 = 1818, H_SPR_DAMLR27 = 1819, H_SPR_DAMLR28 = 1820
- , H_SPR_DAMLR29 = 1821, H_SPR_DAMLR30 = 1822, H_SPR_DAMLR31 = 1823, H_SPR_DAMLR32 = 1824
- , H_SPR_DAMLR33 = 1825, H_SPR_DAMLR34 = 1826, H_SPR_DAMLR35 = 1827, H_SPR_DAMLR36 = 1828
- , H_SPR_DAMLR37 = 1829, H_SPR_DAMLR38 = 1830, H_SPR_DAMLR39 = 1831, H_SPR_DAMLR40 = 1832
- , H_SPR_DAMLR41 = 1833, H_SPR_DAMLR42 = 1834, H_SPR_DAMLR43 = 1835, H_SPR_DAMLR44 = 1836
- , H_SPR_DAMLR45 = 1837, H_SPR_DAMLR46 = 1838, H_SPR_DAMLR47 = 1839, H_SPR_DAMLR48 = 1840
- , H_SPR_DAMLR49 = 1841, H_SPR_DAMLR50 = 1842, H_SPR_DAMLR51 = 1843, H_SPR_DAMLR52 = 1844
- , H_SPR_DAMLR53 = 1845, H_SPR_DAMLR54 = 1846, H_SPR_DAMLR55 = 1847, H_SPR_DAMLR56 = 1848
- , H_SPR_DAMLR57 = 1849, H_SPR_DAMLR58 = 1850, H_SPR_DAMLR59 = 1851, H_SPR_DAMLR60 = 1852
- , H_SPR_DAMLR61 = 1853, H_SPR_DAMLR62 = 1854, H_SPR_DAMLR63 = 1855, H_SPR_DAMPR0 = 1856
- , H_SPR_DAMPR1 = 1857, H_SPR_DAMPR2 = 1858, H_SPR_DAMPR3 = 1859, H_SPR_DAMPR4 = 1860
- , H_SPR_DAMPR5 = 1861, H_SPR_DAMPR6 = 1862, H_SPR_DAMPR7 = 1863, H_SPR_DAMPR8 = 1864
- , H_SPR_DAMPR9 = 1865, H_SPR_DAMPR10 = 1866, H_SPR_DAMPR11 = 1867, H_SPR_DAMPR12 = 1868
- , H_SPR_DAMPR13 = 1869, H_SPR_DAMPR14 = 1870, H_SPR_DAMPR15 = 1871, H_SPR_DAMPR16 = 1872
- , H_SPR_DAMPR17 = 1873, H_SPR_DAMPR18 = 1874, H_SPR_DAMPR19 = 1875, H_SPR_DAMPR20 = 1876
- , H_SPR_DAMPR21 = 1877, H_SPR_DAMPR22 = 1878, H_SPR_DAMPR23 = 1879, H_SPR_DAMPR24 = 1880
- , H_SPR_DAMPR25 = 1881, H_SPR_DAMPR26 = 1882, H_SPR_DAMPR27 = 1883, H_SPR_DAMPR28 = 1884
- , H_SPR_DAMPR29 = 1885, H_SPR_DAMPR30 = 1886, H_SPR_DAMPR31 = 1887, H_SPR_DAMPR32 = 1888
- , H_SPR_DAMPR33 = 1889, H_SPR_DAMPR34 = 1890, H_SPR_DAMPR35 = 1891, H_SPR_DAMPR36 = 1892
- , H_SPR_DAMPR37 = 1893, H_SPR_DAMPR38 = 1894, H_SPR_DAMPR39 = 1895, H_SPR_DAMPR40 = 1896
- , H_SPR_DAMPR41 = 1897, H_SPR_DAMPR42 = 1898, H_SPR_DAMPR43 = 1899, H_SPR_DAMPR44 = 1900
- , H_SPR_DAMPR45 = 1901, H_SPR_DAMPR46 = 1902, H_SPR_DAMPR47 = 1903, H_SPR_DAMPR48 = 1904
- , H_SPR_DAMPR49 = 1905, H_SPR_DAMPR50 = 1906, H_SPR_DAMPR51 = 1907, H_SPR_DAMPR52 = 1908
- , H_SPR_DAMPR53 = 1909, H_SPR_DAMPR54 = 1910, H_SPR_DAMPR55 = 1911, H_SPR_DAMPR56 = 1912
- , H_SPR_DAMPR57 = 1913, H_SPR_DAMPR58 = 1914, H_SPR_DAMPR59 = 1915, H_SPR_DAMPR60 = 1916
- , H_SPR_DAMPR61 = 1917, H_SPR_DAMPR62 = 1918, H_SPR_DAMPR63 = 1919, H_SPR_AMCR = 1920
- , H_SPR_STBAR = 1921, H_SPR_MMCR = 1922, H_SPR_DCR = 2048, H_SPR_BRR = 2049
- , H_SPR_NMAR = 2050, H_SPR_IBAR0 = 2052, H_SPR_IBAR1 = 2053, H_SPR_IBAR2 = 2054
- , H_SPR_IBAR3 = 2055, H_SPR_DBAR0 = 2056, H_SPR_DBAR1 = 2057, H_SPR_DBAR2 = 2058
- , H_SPR_DBAR3 = 2059, H_SPR_DBDR00 = 2060, H_SPR_DBDR01 = 2061, H_SPR_DBDR02 = 2062
- , H_SPR_DBDR03 = 2063, H_SPR_DBDR10 = 2064, H_SPR_DBDR11 = 2065, H_SPR_DBDR12 = 2066
- , H_SPR_DBDR13 = 2067, H_SPR_DBDR20 = 2068, H_SPR_DBDR21 = 2069, H_SPR_DBDR22 = 2070
- , H_SPR_DBDR23 = 2071, H_SPR_DBDR30 = 2072, H_SPR_DBDR31 = 2073, H_SPR_DBDR32 = 2074
- , H_SPR_DBDR33 = 2075, H_SPR_DBMR00 = 2076, H_SPR_DBMR01 = 2077, H_SPR_DBMR02 = 2078
- , H_SPR_DBMR03 = 2079, H_SPR_DBMR10 = 2080, H_SPR_DBMR11 = 2081, H_SPR_DBMR12 = 2082
- , H_SPR_DBMR13 = 2083, H_SPR_DBMR20 = 2084, H_SPR_DBMR21 = 2085, H_SPR_DBMR22 = 2086
- , H_SPR_DBMR23 = 2087, H_SPR_DBMR30 = 2088, H_SPR_DBMR31 = 2089, H_SPR_DBMR32 = 2090
- , H_SPR_DBMR33 = 2091, H_SPR_CPCFR = 2092, H_SPR_CPCR = 2093, H_SPR_CPSR = 2094
- , H_SPR_CPESR0 = 2096, H_SPR_CPESR1 = 2097, H_SPR_CPEMR0 = 2098, H_SPR_CPEMR1 = 2099
- , H_SPR_IHSR8 = 3848
+ , H_SPR_LCR = 273, H_SPR_IACC0H = 280, H_SPR_IACC0L = 281, H_SPR_ISR = 288
+ , H_SPR_NEEAR0 = 352, H_SPR_NEEAR1 = 353, H_SPR_NEEAR2 = 354, H_SPR_NEEAR3 = 355
+ , H_SPR_NEEAR4 = 356, H_SPR_NEEAR5 = 357, H_SPR_NEEAR6 = 358, H_SPR_NEEAR7 = 359
+ , H_SPR_NEEAR8 = 360, H_SPR_NEEAR9 = 361, H_SPR_NEEAR10 = 362, H_SPR_NEEAR11 = 363
+ , H_SPR_NEEAR12 = 364, H_SPR_NEEAR13 = 365, H_SPR_NEEAR14 = 366, H_SPR_NEEAR15 = 367
+ , H_SPR_NEEAR16 = 368, H_SPR_NEEAR17 = 369, H_SPR_NEEAR18 = 370, H_SPR_NEEAR19 = 371
+ , H_SPR_NEEAR20 = 372, H_SPR_NEEAR21 = 373, H_SPR_NEEAR22 = 374, H_SPR_NEEAR23 = 375
+ , H_SPR_NEEAR24 = 376, H_SPR_NEEAR25 = 377, H_SPR_NEEAR26 = 378, H_SPR_NEEAR27 = 379
+ , H_SPR_NEEAR28 = 380, H_SPR_NEEAR29 = 381, H_SPR_NEEAR30 = 382, H_SPR_NEEAR31 = 383
+ , H_SPR_NESR0 = 384, H_SPR_NESR1 = 385, H_SPR_NESR2 = 386, H_SPR_NESR3 = 387
+ , H_SPR_NESR4 = 388, H_SPR_NESR5 = 389, H_SPR_NESR6 = 390, H_SPR_NESR7 = 391
+ , H_SPR_NESR8 = 392, H_SPR_NESR9 = 393, H_SPR_NESR10 = 394, H_SPR_NESR11 = 395
+ , H_SPR_NESR12 = 396, H_SPR_NESR13 = 397, H_SPR_NESR14 = 398, H_SPR_NESR15 = 399
+ , H_SPR_NESR16 = 400, H_SPR_NESR17 = 401, H_SPR_NESR18 = 402, H_SPR_NESR19 = 403
+ , H_SPR_NESR20 = 404, H_SPR_NESR21 = 405, H_SPR_NESR22 = 406, H_SPR_NESR23 = 407
+ , H_SPR_NESR24 = 408, H_SPR_NESR25 = 409, H_SPR_NESR26 = 410, H_SPR_NESR27 = 411
+ , H_SPR_NESR28 = 412, H_SPR_NESR29 = 413, H_SPR_NESR30 = 414, H_SPR_NESR31 = 415
+ , H_SPR_NECR = 416, H_SPR_GNER0 = 432, H_SPR_GNER1 = 433, H_SPR_FNER0 = 434
+ , H_SPR_FNER1 = 435, H_SPR_EPCR0 = 512, H_SPR_EPCR1 = 513, H_SPR_EPCR2 = 514
+ , H_SPR_EPCR3 = 515, H_SPR_EPCR4 = 516, H_SPR_EPCR5 = 517, H_SPR_EPCR6 = 518
+ , H_SPR_EPCR7 = 519, H_SPR_EPCR8 = 520, H_SPR_EPCR9 = 521, H_SPR_EPCR10 = 522
+ , H_SPR_EPCR11 = 523, H_SPR_EPCR12 = 524, H_SPR_EPCR13 = 525, H_SPR_EPCR14 = 526
+ , H_SPR_EPCR15 = 527, H_SPR_EPCR16 = 528, H_SPR_EPCR17 = 529, H_SPR_EPCR18 = 530
+ , H_SPR_EPCR19 = 531, H_SPR_EPCR20 = 532, H_SPR_EPCR21 = 533, H_SPR_EPCR22 = 534
+ , H_SPR_EPCR23 = 535, H_SPR_EPCR24 = 536, H_SPR_EPCR25 = 537, H_SPR_EPCR26 = 538
+ , H_SPR_EPCR27 = 539, H_SPR_EPCR28 = 540, H_SPR_EPCR29 = 541, H_SPR_EPCR30 = 542
+ , H_SPR_EPCR31 = 543, H_SPR_EPCR32 = 544, H_SPR_EPCR33 = 545, H_SPR_EPCR34 = 546
+ , H_SPR_EPCR35 = 547, H_SPR_EPCR36 = 548, H_SPR_EPCR37 = 549, H_SPR_EPCR38 = 550
+ , H_SPR_EPCR39 = 551, H_SPR_EPCR40 = 552, H_SPR_EPCR41 = 553, H_SPR_EPCR42 = 554
+ , H_SPR_EPCR43 = 555, H_SPR_EPCR44 = 556, H_SPR_EPCR45 = 557, H_SPR_EPCR46 = 558
+ , H_SPR_EPCR47 = 559, H_SPR_EPCR48 = 560, H_SPR_EPCR49 = 561, H_SPR_EPCR50 = 562
+ , H_SPR_EPCR51 = 563, H_SPR_EPCR52 = 564, H_SPR_EPCR53 = 565, H_SPR_EPCR54 = 566
+ , H_SPR_EPCR55 = 567, H_SPR_EPCR56 = 568, H_SPR_EPCR57 = 569, H_SPR_EPCR58 = 570
+ , H_SPR_EPCR59 = 571, H_SPR_EPCR60 = 572, H_SPR_EPCR61 = 573, H_SPR_EPCR62 = 574
+ , H_SPR_EPCR63 = 575, H_SPR_ESR0 = 576, H_SPR_ESR1 = 577, H_SPR_ESR2 = 578
+ , H_SPR_ESR3 = 579, H_SPR_ESR4 = 580, H_SPR_ESR5 = 581, H_SPR_ESR6 = 582
+ , H_SPR_ESR7 = 583, H_SPR_ESR8 = 584, H_SPR_ESR9 = 585, H_SPR_ESR10 = 586
+ , H_SPR_ESR11 = 587, H_SPR_ESR12 = 588, H_SPR_ESR13 = 589, H_SPR_ESR14 = 590
+ , H_SPR_ESR15 = 591, H_SPR_ESR16 = 592, H_SPR_ESR17 = 593, H_SPR_ESR18 = 594
+ , H_SPR_ESR19 = 595, H_SPR_ESR20 = 596, H_SPR_ESR21 = 597, H_SPR_ESR22 = 598
+ , H_SPR_ESR23 = 599, H_SPR_ESR24 = 600, H_SPR_ESR25 = 601, H_SPR_ESR26 = 602
+ , H_SPR_ESR27 = 603, H_SPR_ESR28 = 604, H_SPR_ESR29 = 605, H_SPR_ESR30 = 606
+ , H_SPR_ESR31 = 607, H_SPR_ESR32 = 608, H_SPR_ESR33 = 609, H_SPR_ESR34 = 610
+ , H_SPR_ESR35 = 611, H_SPR_ESR36 = 612, H_SPR_ESR37 = 613, H_SPR_ESR38 = 614
+ , H_SPR_ESR39 = 615, H_SPR_ESR40 = 616, H_SPR_ESR41 = 617, H_SPR_ESR42 = 618
+ , H_SPR_ESR43 = 619, H_SPR_ESR44 = 620, H_SPR_ESR45 = 621, H_SPR_ESR46 = 622
+ , H_SPR_ESR47 = 623, H_SPR_ESR48 = 624, H_SPR_ESR49 = 625, H_SPR_ESR50 = 626
+ , H_SPR_ESR51 = 627, H_SPR_ESR52 = 628, H_SPR_ESR53 = 629, H_SPR_ESR54 = 630
+ , H_SPR_ESR55 = 631, H_SPR_ESR56 = 632, H_SPR_ESR57 = 633, H_SPR_ESR58 = 634
+ , H_SPR_ESR59 = 635, H_SPR_ESR60 = 636, H_SPR_ESR61 = 637, H_SPR_ESR62 = 638
+ , H_SPR_ESR63 = 639, H_SPR_EIR0 = 640, H_SPR_EIR1 = 641, H_SPR_EIR2 = 642
+ , H_SPR_EIR3 = 643, H_SPR_EIR4 = 644, H_SPR_EIR5 = 645, H_SPR_EIR6 = 646
+ , H_SPR_EIR7 = 647, H_SPR_EIR8 = 648, H_SPR_EIR9 = 649, H_SPR_EIR10 = 650
+ , H_SPR_EIR11 = 651, H_SPR_EIR12 = 652, H_SPR_EIR13 = 653, H_SPR_EIR14 = 654
+ , H_SPR_EIR15 = 655, H_SPR_EIR16 = 656, H_SPR_EIR17 = 657, H_SPR_EIR18 = 658
+ , H_SPR_EIR19 = 659, H_SPR_EIR20 = 660, H_SPR_EIR21 = 661, H_SPR_EIR22 = 662
+ , H_SPR_EIR23 = 663, H_SPR_EIR24 = 664, H_SPR_EIR25 = 665, H_SPR_EIR26 = 666
+ , H_SPR_EIR27 = 667, H_SPR_EIR28 = 668, H_SPR_EIR29 = 669, H_SPR_EIR30 = 670
+ , H_SPR_EIR31 = 671, H_SPR_ESFR0 = 672, H_SPR_ESFR1 = 673, H_SPR_SR0 = 768
+ , H_SPR_SR1 = 769, H_SPR_SR2 = 770, H_SPR_SR3 = 771, H_SPR_FSR0 = 1024
+ , H_SPR_FSR1 = 1025, H_SPR_FSR2 = 1026, H_SPR_FSR3 = 1027, H_SPR_FSR4 = 1028
+ , H_SPR_FSR5 = 1029, H_SPR_FSR6 = 1030, H_SPR_FSR7 = 1031, H_SPR_FSR8 = 1032
+ , H_SPR_FSR9 = 1033, H_SPR_FSR10 = 1034, H_SPR_FSR11 = 1035, H_SPR_FSR12 = 1036
+ , H_SPR_FSR13 = 1037, H_SPR_FSR14 = 1038, H_SPR_FSR15 = 1039, H_SPR_FSR16 = 1040
+ , H_SPR_FSR17 = 1041, H_SPR_FSR18 = 1042, H_SPR_FSR19 = 1043, H_SPR_FSR20 = 1044
+ , H_SPR_FSR21 = 1045, H_SPR_FSR22 = 1046, H_SPR_FSR23 = 1047, H_SPR_FSR24 = 1048
+ , H_SPR_FSR25 = 1049, H_SPR_FSR26 = 1050, H_SPR_FSR27 = 1051, H_SPR_FSR28 = 1052
+ , H_SPR_FSR29 = 1053, H_SPR_FSR30 = 1054, H_SPR_FSR31 = 1055, H_SPR_FSR32 = 1056
+ , H_SPR_FSR33 = 1057, H_SPR_FSR34 = 1058, H_SPR_FSR35 = 1059, H_SPR_FSR36 = 1060
+ , H_SPR_FSR37 = 1061, H_SPR_FSR38 = 1062, H_SPR_FSR39 = 1063, H_SPR_FSR40 = 1064
+ , H_SPR_FSR41 = 1065, H_SPR_FSR42 = 1066, H_SPR_FSR43 = 1067, H_SPR_FSR44 = 1068
+ , H_SPR_FSR45 = 1069, H_SPR_FSR46 = 1070, H_SPR_FSR47 = 1071, H_SPR_FSR48 = 1072
+ , H_SPR_FSR49 = 1073, H_SPR_FSR50 = 1074, H_SPR_FSR51 = 1075, H_SPR_FSR52 = 1076
+ , H_SPR_FSR53 = 1077, H_SPR_FSR54 = 1078, H_SPR_FSR55 = 1079, H_SPR_FSR56 = 1080
+ , H_SPR_FSR57 = 1081, H_SPR_FSR58 = 1082, H_SPR_FSR59 = 1083, H_SPR_FSR60 = 1084
+ , H_SPR_FSR61 = 1085, H_SPR_FSR62 = 1086, H_SPR_FSR63 = 1087, H_SPR_FQOP0 = 1088
+ , H_SPR_FQOP1 = 1090, H_SPR_FQOP2 = 1092, H_SPR_FQOP3 = 1094, H_SPR_FQOP4 = 1096
+ , H_SPR_FQOP5 = 1098, H_SPR_FQOP6 = 1100, H_SPR_FQOP7 = 1102, H_SPR_FQOP8 = 1104
+ , H_SPR_FQOP9 = 1106, H_SPR_FQOP10 = 1108, H_SPR_FQOP11 = 1110, H_SPR_FQOP12 = 1112
+ , H_SPR_FQOP13 = 1114, H_SPR_FQOP14 = 1116, H_SPR_FQOP15 = 1118, H_SPR_FQOP16 = 1120
+ , H_SPR_FQOP17 = 1122, H_SPR_FQOP18 = 1124, H_SPR_FQOP19 = 1126, H_SPR_FQOP20 = 1128
+ , H_SPR_FQOP21 = 1130, H_SPR_FQOP22 = 1132, H_SPR_FQOP23 = 1134, H_SPR_FQOP24 = 1136
+ , H_SPR_FQOP25 = 1138, H_SPR_FQOP26 = 1140, H_SPR_FQOP27 = 1142, H_SPR_FQOP28 = 1144
+ , H_SPR_FQOP29 = 1146, H_SPR_FQOP30 = 1148, H_SPR_FQOP31 = 1150, H_SPR_FQST0 = 1089
+ , H_SPR_FQST1 = 1091, H_SPR_FQST2 = 1093, H_SPR_FQST3 = 1095, H_SPR_FQST4 = 1097
+ , H_SPR_FQST5 = 1099, H_SPR_FQST6 = 1101, H_SPR_FQST7 = 1103, H_SPR_FQST8 = 1105
+ , H_SPR_FQST9 = 1107, H_SPR_FQST10 = 1109, H_SPR_FQST11 = 1111, H_SPR_FQST12 = 1113
+ , H_SPR_FQST13 = 1115, H_SPR_FQST14 = 1117, H_SPR_FQST15 = 1119, H_SPR_FQST16 = 1121
+ , H_SPR_FQST17 = 1123, H_SPR_FQST18 = 1125, H_SPR_FQST19 = 1127, H_SPR_FQST20 = 1129
+ , H_SPR_FQST21 = 1131, H_SPR_FQST22 = 1133, H_SPR_FQST23 = 1135, H_SPR_FQST24 = 1137
+ , H_SPR_FQST25 = 1139, H_SPR_FQST26 = 1141, H_SPR_FQST27 = 1143, H_SPR_FQST28 = 1145
+ , H_SPR_FQST29 = 1147, H_SPR_FQST30 = 1149, H_SPR_FQST31 = 1151, H_SPR_MCILR0 = 1272
+ , H_SPR_MCILR1 = 1273, H_SPR_MSR0 = 1280, H_SPR_MSR1 = 1281, H_SPR_MSR2 = 1282
+ , H_SPR_MSR3 = 1283, H_SPR_MSR4 = 1284, H_SPR_MSR5 = 1285, H_SPR_MSR6 = 1286
+ , H_SPR_MSR7 = 1287, H_SPR_MSR8 = 1288, H_SPR_MSR9 = 1289, H_SPR_MSR10 = 1290
+ , H_SPR_MSR11 = 1291, H_SPR_MSR12 = 1292, H_SPR_MSR13 = 1293, H_SPR_MSR14 = 1294
+ , H_SPR_MSR15 = 1295, H_SPR_MSR16 = 1296, H_SPR_MSR17 = 1297, H_SPR_MSR18 = 1298
+ , H_SPR_MSR19 = 1299, H_SPR_MSR20 = 1300, H_SPR_MSR21 = 1301, H_SPR_MSR22 = 1302
+ , H_SPR_MSR23 = 1303, H_SPR_MSR24 = 1304, H_SPR_MSR25 = 1305, H_SPR_MSR26 = 1306
+ , H_SPR_MSR27 = 1307, H_SPR_MSR28 = 1308, H_SPR_MSR29 = 1309, H_SPR_MSR30 = 1310
+ , H_SPR_MSR31 = 1311, H_SPR_MSR32 = 1312, H_SPR_MSR33 = 1313, H_SPR_MSR34 = 1314
+ , H_SPR_MSR35 = 1315, H_SPR_MSR36 = 1316, H_SPR_MSR37 = 1317, H_SPR_MSR38 = 1318
+ , H_SPR_MSR39 = 1319, H_SPR_MSR40 = 1320, H_SPR_MSR41 = 1321, H_SPR_MSR42 = 1322
+ , H_SPR_MSR43 = 1323, H_SPR_MSR44 = 1324, H_SPR_MSR45 = 1325, H_SPR_MSR46 = 1326
+ , H_SPR_MSR47 = 1327, H_SPR_MSR48 = 1328, H_SPR_MSR49 = 1329, H_SPR_MSR50 = 1330
+ , H_SPR_MSR51 = 1331, H_SPR_MSR52 = 1332, H_SPR_MSR53 = 1333, H_SPR_MSR54 = 1334
+ , H_SPR_MSR55 = 1335, H_SPR_MSR56 = 1336, H_SPR_MSR57 = 1337, H_SPR_MSR58 = 1338
+ , H_SPR_MSR59 = 1339, H_SPR_MSR60 = 1340, H_SPR_MSR61 = 1341, H_SPR_MSR62 = 1342
+ , H_SPR_MSR63 = 1343, H_SPR_MQOP0 = 1344, H_SPR_MQOP1 = 1346, H_SPR_MQOP2 = 1348
+ , H_SPR_MQOP3 = 1350, H_SPR_MQOP4 = 1352, H_SPR_MQOP5 = 1354, H_SPR_MQOP6 = 1356
+ , H_SPR_MQOP7 = 1358, H_SPR_MQOP8 = 1360, H_SPR_MQOP9 = 1362, H_SPR_MQOP10 = 1364
+ , H_SPR_MQOP11 = 1366, H_SPR_MQOP12 = 1368, H_SPR_MQOP13 = 1370, H_SPR_MQOP14 = 1372
+ , H_SPR_MQOP15 = 1374, H_SPR_MQOP16 = 1376, H_SPR_MQOP17 = 1378, H_SPR_MQOP18 = 1380
+ , H_SPR_MQOP19 = 1382, H_SPR_MQOP20 = 1384, H_SPR_MQOP21 = 1386, H_SPR_MQOP22 = 1388
+ , H_SPR_MQOP23 = 1390, H_SPR_MQOP24 = 1392, H_SPR_MQOP25 = 1394, H_SPR_MQOP26 = 1396
+ , H_SPR_MQOP27 = 1398, H_SPR_MQOP28 = 1400, H_SPR_MQOP29 = 1402, H_SPR_MQOP30 = 1404
+ , H_SPR_MQOP31 = 1406, H_SPR_MQST0 = 1345, H_SPR_MQST1 = 1347, H_SPR_MQST2 = 1349
+ , H_SPR_MQST3 = 1351, H_SPR_MQST4 = 1353, H_SPR_MQST5 = 1355, H_SPR_MQST6 = 1357
+ , H_SPR_MQST7 = 1359, H_SPR_MQST8 = 1361, H_SPR_MQST9 = 1363, H_SPR_MQST10 = 1365
+ , H_SPR_MQST11 = 1367, H_SPR_MQST12 = 1369, H_SPR_MQST13 = 1371, H_SPR_MQST14 = 1373
+ , H_SPR_MQST15 = 1375, H_SPR_MQST16 = 1377, H_SPR_MQST17 = 1379, H_SPR_MQST18 = 1381
+ , H_SPR_MQST19 = 1383, H_SPR_MQST20 = 1385, H_SPR_MQST21 = 1387, H_SPR_MQST22 = 1389
+ , H_SPR_MQST23 = 1391, H_SPR_MQST24 = 1393, H_SPR_MQST25 = 1395, H_SPR_MQST26 = 1397
+ , H_SPR_MQST27 = 1399, H_SPR_MQST28 = 1401, H_SPR_MQST29 = 1403, H_SPR_MQST30 = 1405
+ , H_SPR_MQST31 = 1407, H_SPR_EAR0 = 1536, H_SPR_EAR1 = 1537, H_SPR_EAR2 = 1538
+ , H_SPR_EAR3 = 1539, H_SPR_EAR4 = 1540, H_SPR_EAR5 = 1541, H_SPR_EAR6 = 1542
+ , H_SPR_EAR7 = 1543, H_SPR_EAR8 = 1544, H_SPR_EAR9 = 1545, H_SPR_EAR10 = 1546
+ , H_SPR_EAR11 = 1547, H_SPR_EAR12 = 1548, H_SPR_EAR13 = 1549, H_SPR_EAR14 = 1550
+ , H_SPR_EAR15 = 1551, H_SPR_EAR16 = 1552, H_SPR_EAR17 = 1553, H_SPR_EAR18 = 1554
+ , H_SPR_EAR19 = 1555, H_SPR_EAR20 = 1556, H_SPR_EAR21 = 1557, H_SPR_EAR22 = 1558
+ , H_SPR_EAR23 = 1559, H_SPR_EAR24 = 1560, H_SPR_EAR25 = 1561, H_SPR_EAR26 = 1562
+ , H_SPR_EAR27 = 1563, H_SPR_EAR28 = 1564, H_SPR_EAR29 = 1565, H_SPR_EAR30 = 1566
+ , H_SPR_EAR31 = 1567, H_SPR_EAR32 = 1568, H_SPR_EAR33 = 1569, H_SPR_EAR34 = 1570
+ , H_SPR_EAR35 = 1571, H_SPR_EAR36 = 1572, H_SPR_EAR37 = 1573, H_SPR_EAR38 = 1574
+ , H_SPR_EAR39 = 1575, H_SPR_EAR40 = 1576, H_SPR_EAR41 = 1577, H_SPR_EAR42 = 1578
+ , H_SPR_EAR43 = 1579, H_SPR_EAR44 = 1580, H_SPR_EAR45 = 1581, H_SPR_EAR46 = 1582
+ , H_SPR_EAR47 = 1583, H_SPR_EAR48 = 1584, H_SPR_EAR49 = 1585, H_SPR_EAR50 = 1586
+ , H_SPR_EAR51 = 1587, H_SPR_EAR52 = 1588, H_SPR_EAR53 = 1589, H_SPR_EAR54 = 1590
+ , H_SPR_EAR55 = 1591, H_SPR_EAR56 = 1592, H_SPR_EAR57 = 1593, H_SPR_EAR58 = 1594
+ , H_SPR_EAR59 = 1595, H_SPR_EAR60 = 1596, H_SPR_EAR61 = 1597, H_SPR_EAR62 = 1598
+ , H_SPR_EAR63 = 1599, H_SPR_EDR0 = 1600, H_SPR_EDR1 = 1601, H_SPR_EDR2 = 1602
+ , H_SPR_EDR3 = 1603, H_SPR_EDR4 = 1604, H_SPR_EDR5 = 1605, H_SPR_EDR6 = 1606
+ , H_SPR_EDR7 = 1607, H_SPR_EDR8 = 1608, H_SPR_EDR9 = 1609, H_SPR_EDR10 = 1610
+ , H_SPR_EDR11 = 1611, H_SPR_EDR12 = 1612, H_SPR_EDR13 = 1613, H_SPR_EDR14 = 1614
+ , H_SPR_EDR15 = 1615, H_SPR_EDR16 = 1616, H_SPR_EDR17 = 1617, H_SPR_EDR18 = 1618
+ , H_SPR_EDR19 = 1619, H_SPR_EDR20 = 1620, H_SPR_EDR21 = 1621, H_SPR_EDR22 = 1622
+ , H_SPR_EDR23 = 1623, H_SPR_EDR24 = 1624, H_SPR_EDR25 = 1625, H_SPR_EDR26 = 1626
+ , H_SPR_EDR27 = 1627, H_SPR_EDR28 = 1628, H_SPR_EDR29 = 1629, H_SPR_EDR30 = 1630
+ , H_SPR_EDR31 = 1631, H_SPR_EDR32 = 1632, H_SPR_EDR33 = 1636, H_SPR_EDR34 = 1634
+ , H_SPR_EDR35 = 1635, H_SPR_EDR36 = 1636, H_SPR_EDR37 = 1637, H_SPR_EDR38 = 1638
+ , H_SPR_EDR39 = 1639, H_SPR_EDR40 = 1640, H_SPR_EDR41 = 1641, H_SPR_EDR42 = 1642
+ , H_SPR_EDR43 = 1643, H_SPR_EDR44 = 1644, H_SPR_EDR45 = 1645, H_SPR_EDR46 = 1646
+ , H_SPR_EDR47 = 1647, H_SPR_EDR48 = 1648, H_SPR_EDR49 = 1649, H_SPR_EDR50 = 1650
+ , H_SPR_EDR51 = 1651, H_SPR_EDR52 = 1652, H_SPR_EDR53 = 1653, H_SPR_EDR54 = 1654
+ , H_SPR_EDR55 = 1655, H_SPR_EDR56 = 1656, H_SPR_EDR57 = 1657, H_SPR_EDR58 = 1658
+ , H_SPR_EDR59 = 1659, H_SPR_EDR60 = 1660, H_SPR_EDR61 = 1661, H_SPR_EDR62 = 1662
+ , H_SPR_EDR63 = 1663, H_SPR_IAMLR0 = 1664, H_SPR_IAMLR1 = 1665, H_SPR_IAMLR2 = 1666
+ , H_SPR_IAMLR3 = 1667, H_SPR_IAMLR4 = 1668, H_SPR_IAMLR5 = 1669, H_SPR_IAMLR6 = 1670
+ , H_SPR_IAMLR7 = 1671, H_SPR_IAMLR8 = 1672, H_SPR_IAMLR9 = 1673, H_SPR_IAMLR10 = 1674
+ , H_SPR_IAMLR11 = 1675, H_SPR_IAMLR12 = 1676, H_SPR_IAMLR13 = 1677, H_SPR_IAMLR14 = 1678
+ , H_SPR_IAMLR15 = 1679, H_SPR_IAMLR16 = 1680, H_SPR_IAMLR17 = 1681, H_SPR_IAMLR18 = 1682
+ , H_SPR_IAMLR19 = 1683, H_SPR_IAMLR20 = 1684, H_SPR_IAMLR21 = 1685, H_SPR_IAMLR22 = 1686
+ , H_SPR_IAMLR23 = 1687, H_SPR_IAMLR24 = 1688, H_SPR_IAMLR25 = 1689, H_SPR_IAMLR26 = 1690
+ , H_SPR_IAMLR27 = 1691, H_SPR_IAMLR28 = 1692, H_SPR_IAMLR29 = 1693, H_SPR_IAMLR30 = 1694
+ , H_SPR_IAMLR31 = 1695, H_SPR_IAMLR32 = 1696, H_SPR_IAMLR33 = 1697, H_SPR_IAMLR34 = 1698
+ , H_SPR_IAMLR35 = 1699, H_SPR_IAMLR36 = 1700, H_SPR_IAMLR37 = 1701, H_SPR_IAMLR38 = 1702
+ , H_SPR_IAMLR39 = 1703, H_SPR_IAMLR40 = 1704, H_SPR_IAMLR41 = 1705, H_SPR_IAMLR42 = 1706
+ , H_SPR_IAMLR43 = 1707, H_SPR_IAMLR44 = 1708, H_SPR_IAMLR45 = 1709, H_SPR_IAMLR46 = 1710
+ , H_SPR_IAMLR47 = 1711, H_SPR_IAMLR48 = 1712, H_SPR_IAMLR49 = 1713, H_SPR_IAMLR50 = 1714
+ , H_SPR_IAMLR51 = 1715, H_SPR_IAMLR52 = 1716, H_SPR_IAMLR53 = 1717, H_SPR_IAMLR54 = 1718
+ , H_SPR_IAMLR55 = 1719, H_SPR_IAMLR56 = 1720, H_SPR_IAMLR57 = 1721, H_SPR_IAMLR58 = 1722
+ , H_SPR_IAMLR59 = 1723, H_SPR_IAMLR60 = 1724, H_SPR_IAMLR61 = 1725, H_SPR_IAMLR62 = 1726
+ , H_SPR_IAMLR63 = 1727, H_SPR_IAMPR0 = 1728, H_SPR_IAMPR1 = 1729, H_SPR_IAMPR2 = 1730
+ , H_SPR_IAMPR3 = 1731, H_SPR_IAMPR4 = 1732, H_SPR_IAMPR5 = 1733, H_SPR_IAMPR6 = 1734
+ , H_SPR_IAMPR7 = 1735, H_SPR_IAMPR8 = 1736, H_SPR_IAMPR9 = 1737, H_SPR_IAMPR10 = 1738
+ , H_SPR_IAMPR11 = 1739, H_SPR_IAMPR12 = 1740, H_SPR_IAMPR13 = 1741, H_SPR_IAMPR14 = 1742
+ , H_SPR_IAMPR15 = 1743, H_SPR_IAMPR16 = 1744, H_SPR_IAMPR17 = 1745, H_SPR_IAMPR18 = 1746
+ , H_SPR_IAMPR19 = 1747, H_SPR_IAMPR20 = 1748, H_SPR_IAMPR21 = 1749, H_SPR_IAMPR22 = 1750
+ , H_SPR_IAMPR23 = 1751, H_SPR_IAMPR24 = 1752, H_SPR_IAMPR25 = 1753, H_SPR_IAMPR26 = 1754
+ , H_SPR_IAMPR27 = 1755, H_SPR_IAMPR28 = 1756, H_SPR_IAMPR29 = 1757, H_SPR_IAMPR30 = 1758
+ , H_SPR_IAMPR31 = 1759, H_SPR_IAMPR32 = 1760, H_SPR_IAMPR33 = 1761, H_SPR_IAMPR34 = 1762
+ , H_SPR_IAMPR35 = 1763, H_SPR_IAMPR36 = 1764, H_SPR_IAMPR37 = 1765, H_SPR_IAMPR38 = 1766
+ , H_SPR_IAMPR39 = 1767, H_SPR_IAMPR40 = 1768, H_SPR_IAMPR41 = 1769, H_SPR_IAMPR42 = 1770
+ , H_SPR_IAMPR43 = 1771, H_SPR_IAMPR44 = 1772, H_SPR_IAMPR45 = 1773, H_SPR_IAMPR46 = 1774
+ , H_SPR_IAMPR47 = 1775, H_SPR_IAMPR48 = 1776, H_SPR_IAMPR49 = 1777, H_SPR_IAMPR50 = 1778
+ , H_SPR_IAMPR51 = 1779, H_SPR_IAMPR52 = 1780, H_SPR_IAMPR53 = 1781, H_SPR_IAMPR54 = 1782
+ , H_SPR_IAMPR55 = 1783, H_SPR_IAMPR56 = 1784, H_SPR_IAMPR57 = 1785, H_SPR_IAMPR58 = 1786
+ , H_SPR_IAMPR59 = 1787, H_SPR_IAMPR60 = 1788, H_SPR_IAMPR61 = 1789, H_SPR_IAMPR62 = 1790
+ , H_SPR_IAMPR63 = 1791, H_SPR_DAMLR0 = 1792, H_SPR_DAMLR1 = 1793, H_SPR_DAMLR2 = 1794
+ , H_SPR_DAMLR3 = 1795, H_SPR_DAMLR4 = 1796, H_SPR_DAMLR5 = 1797, H_SPR_DAMLR6 = 1798
+ , H_SPR_DAMLR7 = 1799, H_SPR_DAMLR8 = 1800, H_SPR_DAMLR9 = 1801, H_SPR_DAMLR10 = 1802
+ , H_SPR_DAMLR11 = 1803, H_SPR_DAMLR12 = 1804, H_SPR_DAMLR13 = 1805, H_SPR_DAMLR14 = 1806
+ , H_SPR_DAMLR15 = 1807, H_SPR_DAMLR16 = 1808, H_SPR_DAMLR17 = 1809, H_SPR_DAMLR18 = 1810
+ , H_SPR_DAMLR19 = 1811, H_SPR_DAMLR20 = 1812, H_SPR_DAMLR21 = 1813, H_SPR_DAMLR22 = 1814
+ , H_SPR_DAMLR23 = 1815, H_SPR_DAMLR24 = 1816, H_SPR_DAMLR25 = 1817, H_SPR_DAMLR26 = 1818
+ , H_SPR_DAMLR27 = 1819, H_SPR_DAMLR28 = 1820, H_SPR_DAMLR29 = 1821, H_SPR_DAMLR30 = 1822
+ , H_SPR_DAMLR31 = 1823, H_SPR_DAMLR32 = 1824, H_SPR_DAMLR33 = 1825, H_SPR_DAMLR34 = 1826
+ , H_SPR_DAMLR35 = 1827, H_SPR_DAMLR36 = 1828, H_SPR_DAMLR37 = 1829, H_SPR_DAMLR38 = 1830
+ , H_SPR_DAMLR39 = 1831, H_SPR_DAMLR40 = 1832, H_SPR_DAMLR41 = 1833, H_SPR_DAMLR42 = 1834
+ , H_SPR_DAMLR43 = 1835, H_SPR_DAMLR44 = 1836, H_SPR_DAMLR45 = 1837, H_SPR_DAMLR46 = 1838
+ , H_SPR_DAMLR47 = 1839, H_SPR_DAMLR48 = 1840, H_SPR_DAMLR49 = 1841, H_SPR_DAMLR50 = 1842
+ , H_SPR_DAMLR51 = 1843, H_SPR_DAMLR52 = 1844, H_SPR_DAMLR53 = 1845, H_SPR_DAMLR54 = 1846
+ , H_SPR_DAMLR55 = 1847, H_SPR_DAMLR56 = 1848, H_SPR_DAMLR57 = 1849, H_SPR_DAMLR58 = 1850
+ , H_SPR_DAMLR59 = 1851, H_SPR_DAMLR60 = 1852, H_SPR_DAMLR61 = 1853, H_SPR_DAMLR62 = 1854
+ , H_SPR_DAMLR63 = 1855, H_SPR_DAMPR0 = 1856, H_SPR_DAMPR1 = 1857, H_SPR_DAMPR2 = 1858
+ , H_SPR_DAMPR3 = 1859, H_SPR_DAMPR4 = 1860, H_SPR_DAMPR5 = 1861, H_SPR_DAMPR6 = 1862
+ , H_SPR_DAMPR7 = 1863, H_SPR_DAMPR8 = 1864, H_SPR_DAMPR9 = 1865, H_SPR_DAMPR10 = 1866
+ , H_SPR_DAMPR11 = 1867, H_SPR_DAMPR12 = 1868, H_SPR_DAMPR13 = 1869, H_SPR_DAMPR14 = 1870
+ , H_SPR_DAMPR15 = 1871, H_SPR_DAMPR16 = 1872, H_SPR_DAMPR17 = 1873, H_SPR_DAMPR18 = 1874
+ , H_SPR_DAMPR19 = 1875, H_SPR_DAMPR20 = 1876, H_SPR_DAMPR21 = 1877, H_SPR_DAMPR22 = 1878
+ , H_SPR_DAMPR23 = 1879, H_SPR_DAMPR24 = 1880, H_SPR_DAMPR25 = 1881, H_SPR_DAMPR26 = 1882
+ , H_SPR_DAMPR27 = 1883, H_SPR_DAMPR28 = 1884, H_SPR_DAMPR29 = 1885, H_SPR_DAMPR30 = 1886
+ , H_SPR_DAMPR31 = 1887, H_SPR_DAMPR32 = 1888, H_SPR_DAMPR33 = 1889, H_SPR_DAMPR34 = 1890
+ , H_SPR_DAMPR35 = 1891, H_SPR_DAMPR36 = 1892, H_SPR_DAMPR37 = 1893, H_SPR_DAMPR38 = 1894
+ , H_SPR_DAMPR39 = 1895, H_SPR_DAMPR40 = 1896, H_SPR_DAMPR41 = 1897, H_SPR_DAMPR42 = 1898
+ , H_SPR_DAMPR43 = 1899, H_SPR_DAMPR44 = 1900, H_SPR_DAMPR45 = 1901, H_SPR_DAMPR46 = 1902
+ , H_SPR_DAMPR47 = 1903, H_SPR_DAMPR48 = 1904, H_SPR_DAMPR49 = 1905, H_SPR_DAMPR50 = 1906
+ , H_SPR_DAMPR51 = 1907, H_SPR_DAMPR52 = 1908, H_SPR_DAMPR53 = 1909, H_SPR_DAMPR54 = 1910
+ , H_SPR_DAMPR55 = 1911, H_SPR_DAMPR56 = 1912, H_SPR_DAMPR57 = 1913, H_SPR_DAMPR58 = 1914
+ , H_SPR_DAMPR59 = 1915, H_SPR_DAMPR60 = 1916, H_SPR_DAMPR61 = 1917, H_SPR_DAMPR62 = 1918
+ , H_SPR_DAMPR63 = 1919, H_SPR_AMCR = 1920, H_SPR_STBAR = 1921, H_SPR_MMCR = 1922
+ , H_SPR_DCR = 2048, H_SPR_BRR = 2049, H_SPR_NMAR = 2050, H_SPR_IBAR0 = 2052
+ , H_SPR_IBAR1 = 2053, H_SPR_IBAR2 = 2054, H_SPR_IBAR3 = 2055, H_SPR_DBAR0 = 2056
+ , H_SPR_DBAR1 = 2057, H_SPR_DBAR2 = 2058, H_SPR_DBAR3 = 2059, H_SPR_DBDR00 = 2060
+ , H_SPR_DBDR01 = 2061, H_SPR_DBDR02 = 2062, H_SPR_DBDR03 = 2063, H_SPR_DBDR10 = 2064
+ , H_SPR_DBDR11 = 2065, H_SPR_DBDR12 = 2066, H_SPR_DBDR13 = 2067, H_SPR_DBDR20 = 2068
+ , H_SPR_DBDR21 = 2069, H_SPR_DBDR22 = 2070, H_SPR_DBDR23 = 2071, H_SPR_DBDR30 = 2072
+ , H_SPR_DBDR31 = 2073, H_SPR_DBDR32 = 2074, H_SPR_DBDR33 = 2075, H_SPR_DBMR00 = 2076
+ , H_SPR_DBMR01 = 2077, H_SPR_DBMR02 = 2078, H_SPR_DBMR03 = 2079, H_SPR_DBMR10 = 2080
+ , H_SPR_DBMR11 = 2081, H_SPR_DBMR12 = 2082, H_SPR_DBMR13 = 2083, H_SPR_DBMR20 = 2084
+ , H_SPR_DBMR21 = 2085, H_SPR_DBMR22 = 2086, H_SPR_DBMR23 = 2087, H_SPR_DBMR30 = 2088
+ , H_SPR_DBMR31 = 2089, H_SPR_DBMR32 = 2090, H_SPR_DBMR33 = 2091, H_SPR_CPCFR = 2092
+ , H_SPR_CPCR = 2093, H_SPR_CPSR = 2094, H_SPR_CPESR0 = 2096, H_SPR_CPESR1 = 2097
+ , H_SPR_CPEMR0 = 2098, H_SPR_CPEMR1 = 2099, H_SPR_IHSR8 = 3848
} SPR_NAMES;
/* Enum declaration for . */
@@ -510,6 +510,11 @@ typedef enum acc_names {
} ACC_NAMES;
/* Enum declaration for . */
+typedef enum iacc0_names {
+ H_IACC0_IACC0
+} IACC0_NAMES;
+
+/* Enum declaration for . */
typedef enum iccr_names {
H_ICCR_ICC0, H_ICCR_ICC1, H_ICCR_ICC2, H_ICCR_ICC3
} ICCR_NAMES;
@@ -529,8 +534,8 @@ typedef enum cccr_names {
/* Enum declaration for machine type selection. */
typedef enum mach_attr {
- MACH_BASE, MACH_FRV, MACH_FR500, MACH_FR400
- , MACH_TOMCAT, MACH_SIMPLE, MACH_MAX
+ MACH_BASE, MACH_FRV, MACH_FR550, MACH_FR500
+ , MACH_FR400, MACH_TOMCAT, MACH_SIMPLE, MACH_MAX
} MACH_ATTR;
/* Enum declaration for instruction set selection. */
@@ -541,7 +546,8 @@ typedef enum isa_attr {
/* Enum declaration for parallel execution pipeline selection. */
typedef enum unit_attr {
UNIT_NIL, UNIT_I0, UNIT_I1, UNIT_I01
- , UNIT_IALL, UNIT_FM0, UNIT_FM1, UNIT_FM01
+ , UNIT_I2, UNIT_I3, UNIT_IALL, UNIT_FM0
+ , UNIT_FM1, UNIT_FM01, UNIT_FM2, UNIT_FM3
, UNIT_FMALL, UNIT_FMLOW, UNIT_B0, UNIT_B1
, UNIT_B01, UNIT_C, UNIT_MULT_DIV, UNIT_LOAD
, UNIT_STORE, UNIT_SCAN, UNIT_DCPL, UNIT_MDUALACC
@@ -568,6 +574,17 @@ typedef enum fr500_major_attr {
, FR500_MAJOR_M_6, FR500_MAJOR_M_7, FR500_MAJOR_M_8
} FR500_MAJOR_ATTR;
+/* Enum declaration for fr550 major insn categories. */
+typedef enum fr550_major_attr {
+ FR550_MAJOR_NONE, FR550_MAJOR_I_1, FR550_MAJOR_I_2, FR550_MAJOR_I_3
+ , FR550_MAJOR_I_4, FR550_MAJOR_I_5, FR550_MAJOR_I_6, FR550_MAJOR_I_7
+ , FR550_MAJOR_I_8, FR550_MAJOR_B_1, FR550_MAJOR_B_2, FR550_MAJOR_B_3
+ , FR550_MAJOR_B_4, FR550_MAJOR_B_5, FR550_MAJOR_B_6, FR550_MAJOR_C_1
+ , FR550_MAJOR_C_2, FR550_MAJOR_F_1, FR550_MAJOR_F_2, FR550_MAJOR_F_3
+ , FR550_MAJOR_F_4, FR550_MAJOR_M_1, FR550_MAJOR_M_2, FR550_MAJOR_M_3
+ , FR550_MAJOR_M_4, FR550_MAJOR_M_5
+} FR550_MAJOR_ATTR;
+
/* Number of architecture variants. */
#define MAX_ISAS 1
#define MAX_MACHS ((int) MACH_MAX)
@@ -642,9 +659,9 @@ typedef enum cgen_hw_type {
, HW_H_FR_DOUBLE, HW_H_FR_INT, HW_H_FR_HI, HW_H_FR_LO
, HW_H_FR_0, HW_H_FR_1, HW_H_FR_2, HW_H_FR_3
, HW_H_CPR, HW_H_CPR_DOUBLE, HW_H_SPR, HW_H_ACCG
- , HW_H_ACC40S, HW_H_ACC40U, HW_H_ICCR, HW_H_FCCR
- , HW_H_CCCR, HW_H_PACK, HW_H_HINT_TAKEN, HW_H_HINT_NOT_TAKEN
- , HW_MAX
+ , HW_H_ACC40S, HW_H_ACC40U, HW_H_IACC0, HW_H_ICCR
+ , HW_H_FCCR, HW_H_CCCR, HW_H_PACK, HW_H_HINT_TAKEN
+ , HW_H_HINT_NOT_TAKEN, HW_MAX
} CGEN_HW_TYPE;
#define MAX_HW ((int) HW_MAX)
@@ -702,7 +719,7 @@ typedef enum cgen_insn_attr {
, CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_PRIVILEGED, CGEN_INSN_NON_EXCEPTING
, CGEN_INSN_CONDITIONAL, CGEN_INSN_FR_ACCESS, CGEN_INSN_PRESERVE_OVF, CGEN_INSN_END_BOOLS
, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_UNIT, CGEN_INSN_FR400_MAJOR
- , CGEN_INSN_FR500_MAJOR, CGEN_INSN_END_NBOOLS
+ , CGEN_INSN_FR500_MAJOR, CGEN_INSN_FR550_MAJOR, CGEN_INSN_END_NBOOLS
} CGEN_INSN_ATTR;
/* Number of non-boolean elements in cgen_insn_attr. */
@@ -738,6 +755,7 @@ extern CGEN_KEYWORD frv_cgen_opval_spr_names;
extern CGEN_KEYWORD frv_cgen_opval_accg_names;
extern CGEN_KEYWORD frv_cgen_opval_acc_names;
extern CGEN_KEYWORD frv_cgen_opval_acc_names;
+extern CGEN_KEYWORD frv_cgen_opval_iacc0_names;
extern CGEN_KEYWORD frv_cgen_opval_iccr_names;
extern CGEN_KEYWORD frv_cgen_opval_fccr_names;
extern CGEN_KEYWORD frv_cgen_opval_cccr_names;
@@ -745,6 +763,7 @@ extern CGEN_KEYWORD frv_cgen_opval_h_pack;
extern CGEN_KEYWORD frv_cgen_opval_h_hint_taken;
extern CGEN_KEYWORD frv_cgen_opval_h_hint_not_taken;
+extern const CGEN_HW_ENTRY frv_cgen_hw_table[];
diff --git a/opcodes/frv-opc.c b/opcodes/frv-opc.c
index 7143a0e..61bdb45 100644
--- a/opcodes/frv-opc.c
+++ b/opcodes/frv-opc.c
@@ -32,6 +32,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
/* -- opc.c */
#include "elf/frv.h"
+#include <stdio.h>
static int match_unit
PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE, CGEN_ATTR_VALUE_TYPE));
@@ -45,8 +46,10 @@ static int fr400_check_insn_major_constraints
PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE));
static int fr500_check_insn_major_constraints
PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE));
+static int fr550_check_insn_major_constraints
+ PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE, const CGEN_INSN *));
static int check_insn_major_constraints
- PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE));
+ PARAMS ((FRV_VLIW *, CGEN_ATTR_VALUE_TYPE, const CGEN_INSN *));
int
frv_is_branch_major (CGEN_ATTR_VALUE_TYPE major, unsigned long mach)
@@ -146,32 +149,69 @@ frv_is_media_insn (const CGEN_INSN *insn)
static VLIW_COMBO fr400_allowed_vliw[] =
{
/* slot0 slot1 slot2 slot3 */
- { UNIT_I0, UNIT_I1, UNIT_NIL, UNIT_NIL },
- { UNIT_I0, UNIT_FM0, UNIT_NIL, UNIT_NIL },
- { UNIT_I0, UNIT_B0, UNIT_NIL, UNIT_NIL },
- { UNIT_FM0, UNIT_FM1, UNIT_NIL, UNIT_NIL },
- { UNIT_FM0, UNIT_B0, UNIT_NIL, UNIT_NIL },
- { UNIT_B0, UNIT_NIL, UNIT_NIL, UNIT_NIL },
- { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL },
- { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }
+ { UNIT_I0, UNIT_I1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_FM0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_B0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_FM0, UNIT_FM1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_FM0, UNIT_B0, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_B0, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }
};
/* This table represents the allowable packing for vliw insns for the fr500.
+ The fr500 has only 4 vliw slots. Represent this by not allowing any insns
+ in the extra slots.
Subsets of any given row are also allowed. */
static VLIW_COMBO fr500_allowed_vliw[] =
{
/* slot0 slot1 slot2 slot3 */
- { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1 },
- { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_B0 },
- { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_B0 },
- { UNIT_I0, UNIT_FM0, UNIT_B0, UNIT_B1 },
- { UNIT_I0, UNIT_I1, UNIT_B0, UNIT_B1 },
- { UNIT_I0, UNIT_B0, UNIT_B1, UNIT_NIL },
- { UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1 },
- { UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL },
- { UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
- { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL },
- { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1 PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_B0 PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_B0 PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_FM0, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_I1, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO },
+ { UNIT_I0, UNIT_B0, UNIT_B1, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1 PAD_VLIW_COMBO },
+ { UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO },
+ { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL PAD_VLIW_COMBO }
+};
+
+/* This table represents the allowable packing for vliw insns for the fr550.
+ Subsets of any given row are also allowed. */
+static VLIW_COMBO fr550_allowed_vliw[] =
+{
+ /* slot0 slot1 slot2 slot3 slot4 slot5 slot6 slot7 */
+ { UNIT_I0, UNIT_I1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_I1, UNIT_I2, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_I1, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_B0, UNIT_B1 , UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_I3, UNIT_FM3 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_I3, UNIT_B0 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_FM3, UNIT_B0 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_FM2, UNIT_B0, UNIT_B1 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_I2, UNIT_B0, UNIT_B1, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1 },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_I2, UNIT_I3, UNIT_B0, UNIT_B1, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_I2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_I1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_I0, UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_C, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_FM3, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL },
+ { UNIT_FM0, UNIT_FM1, UNIT_FM2, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_FM0, UNIT_FM1, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_FM0, UNIT_B0, UNIT_B1, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL },
+ { UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL, UNIT_NIL }
};
/* Some insns are assigned specialized implementation units which map to
@@ -184,10 +224,14 @@ static CGEN_ATTR_VALUE_TYPE fr400_unit_mapping[] =
/* I0 */ UNIT_I0,
/* I1 */ UNIT_I1,
/* I01 */ UNIT_I01,
+/* I2 */ UNIT_NIL, /* no I2 or I3 unit */
+/* I3 */ UNIT_NIL,
/* IALL */ UNIT_I01, /* only I0 and I1 units */
/* FM0 */ UNIT_FM0,
/* FM1 */ UNIT_FM1,
/* FM01 */ UNIT_FM01,
+/* FM2 */ UNIT_NIL, /* no F2 or M2 units */
+/* FM3 */ UNIT_NIL, /* no F3 or M3 units */
/* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */
/* FMLOW */ UNIT_FM0, /* Only F0,M0 units */
/* B0 */ UNIT_B0, /* branches only in B0 unit. */
@@ -210,10 +254,14 @@ static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] =
/* I0 */ UNIT_I0,
/* I1 */ UNIT_I1,
/* I01 */ UNIT_I01,
+/* I2 */ UNIT_NIL, /* no I2 or I3 unit */
+/* I3 */ UNIT_NIL,
/* IALL */ UNIT_I01, /* only I0 and I1 units */
/* FM0 */ UNIT_FM0,
/* FM1 */ UNIT_FM1,
/* FM01 */ UNIT_FM01,
+/* FM2 */ UNIT_NIL, /* no F2 or M2 units */
+/* FM3 */ UNIT_NIL, /* no F3 or M2 units */
/* FMALL */ UNIT_FM01,/* Only F0,F1,M0,M1 units */
/* FMLOW */ UNIT_FM0, /* Only F0,M0 units */
/* B0 */ UNIT_B0,
@@ -229,6 +277,36 @@ static CGEN_ATTR_VALUE_TYPE fr500_unit_mapping[] =
/* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */
};
+static CGEN_ATTR_VALUE_TYPE fr550_unit_mapping[] =
+{
+/* unit in insn actual unit */
+/* NIL */ UNIT_NIL,
+/* I0 */ UNIT_I0,
+/* I1 */ UNIT_I1,
+/* I01 */ UNIT_I01,
+/* I2 */ UNIT_I2,
+/* I3 */ UNIT_I3,
+/* IALL */ UNIT_IALL,
+/* FM0 */ UNIT_FM0,
+/* FM1 */ UNIT_FM1,
+/* FM01 */ UNIT_FM01,
+/* FM2 */ UNIT_FM2,
+/* FM3 */ UNIT_FM3,
+/* FMALL */ UNIT_FMALL,
+/* FMLOW */ UNIT_FM01, /* Only F0,F1,M0,M1 units */
+/* B0 */ UNIT_B0,
+/* B1 */ UNIT_B1,
+/* B01 */ UNIT_B01,
+/* C */ UNIT_C,
+/* MULT-DIV */ UNIT_I01, /* multiply and divide in I0 or I1 unit. */
+/* LOAD */ UNIT_I01, /* load in I0 or I1 unit. */
+/* STORE */ UNIT_I01, /* store in I0 or I1 unit. */
+/* SCAN */ UNIT_IALL, /* scan in any integer unit. */
+/* DCPL */ UNIT_I0, /* dcpl only in I0 unit. */
+/* MDUALACC */ UNIT_FMALL,/* media dual acc insn in all media units */
+/* MCLRACC-1*/ UNIT_FM01 /* mclracc,A==1 in FM0 or FM1 unit. */
+};
+
void
frv_vliw_reset (FRV_VLIW *vliw, unsigned long mach, unsigned long elf_flags)
{
@@ -243,6 +321,10 @@ frv_vliw_reset (FRV_VLIW *vliw, unsigned long mach, unsigned long elf_flags)
vliw->current_vliw = fr400_allowed_vliw;
vliw->unit_mapping = fr400_unit_mapping;
break;
+ case bfd_mach_fr550:
+ vliw->current_vliw = fr550_allowed_vliw;
+ vliw->unit_mapping = fr550_unit_mapping;
+ break;
default:
vliw->current_vliw = fr500_allowed_vliw;
vliw->unit_mapping = fr500_unit_mapping;
@@ -275,6 +357,13 @@ match_unit (FRV_VLIW *vliw,
if (unit1 - unit2 <= 2)
return 1;
break;
+ case UNIT_IALL:
+ case UNIT_FMALL:
+ /* The ALL versions of these units are within 5 enums of the 0, 1, 2 or 3
+ versions. */
+ if (unit1 - unit2 <= 5)
+ return 1;
+ break;
default:
break;
}
@@ -309,7 +398,11 @@ add_next_to_vliw (FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit)
VLIW_COMBO *potential;
if (next <= 0)
- abort (); /* Should never happen */
+ {
+ fprintf (stderr, "frv-opc.c line %d: bad vliw->next_slot value.\n",
+ __LINE__);
+ abort (); /* Should never happen */
+ }
/* The table is sorted by units allowed within slots, so vliws with
identical starting sequences are together. */
@@ -364,6 +457,123 @@ fr400_check_insn_major_constraints (
}
static int
+find_unit_in_vliw (
+ FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE unit
+)
+{
+ int i;
+ for (i = 0; i < vliw->next_slot; ++i)
+ if (CGEN_INSN_ATTR_VALUE (vliw->insn[i], CGEN_INSN_UNIT) == unit)
+ return 1;
+
+ return 0; /* not found */
+}
+
+static int
+find_major_in_slot (
+ FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major, CGEN_ATTR_VALUE_TYPE slot
+)
+{
+ int i;
+
+ for (i = 0; i < vliw->next_slot; ++i)
+ if (vliw->major[i] == major && (*vliw->current_vliw)[i] == slot)
+ return 1;
+
+ return 0;
+}
+
+static int
+fr550_find_media_in_vliw (FRV_VLIW *vliw)
+{
+ int i;
+
+ for (i = 0; i < vliw->next_slot; ++i)
+ {
+ if (vliw->major[i] < FR550_MAJOR_M_1 || vliw->major[i] > FR550_MAJOR_M_5)
+ continue;
+
+ /* Found a media insn, however, MNOP and MCLRACC don't count. */
+ if (CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MNOP
+ || CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MCLRACC_0
+ || CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_MCLRACC_1)
+ continue;
+
+ return 1; /* found one */
+ }
+
+ return 0;
+}
+
+static int
+fr550_find_float_in_vliw (FRV_VLIW *vliw)
+{
+ int i;
+
+ for (i = 0; i < vliw->next_slot; ++i)
+ {
+ if (vliw->major[i] < FR550_MAJOR_F_1 || vliw->major[i] > FR550_MAJOR_F_4)
+ continue;
+
+ /* Found a floating point insn, however, FNOP doesn't count. */
+ if (CGEN_INSN_NUM (vliw->insn[i]) == FRV_INSN_FNOP)
+ continue;
+
+ return 1; /* found one */
+ }
+
+ return 0;
+}
+
+static int
+fr550_check_insn_major_constraints (
+ FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major, const CGEN_INSN *insn
+)
+{
+ CGEN_ATTR_VALUE_TYPE unit;
+ CGEN_ATTR_VALUE_TYPE slot = (*vliw->current_vliw)[vliw->next_slot];
+ switch (slot)
+ {
+ case UNIT_I2:
+ /* If it's a store, then there must be another store in I1 */
+ unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT);
+ if (unit == UNIT_STORE)
+ return find_unit_in_vliw (vliw, UNIT_STORE);
+ break;
+ case UNIT_FM2:
+ case UNIT_FM3:
+ /* Floating point insns other than FNOP in slot f2 or f3 cannot coexist with
+ media insns. */
+ if (major >= FR550_MAJOR_F_1 && major <= FR550_MAJOR_F_4
+ && CGEN_INSN_NUM (insn) != FRV_INSN_FNOP)
+ return ! fr550_find_media_in_vliw (vliw);
+ /* Media insns other than MNOP in slot m2 or m3 cannot coexist with
+ floating point insns. */
+ if (major >= FR550_MAJOR_M_1 && major <= FR550_MAJOR_M_5
+ && CGEN_INSN_NUM (insn) != FRV_INSN_MNOP)
+ return ! fr550_find_float_in_vliw (vliw);
+ /* F-2 in slot f2 or f3 cannot coexist with F-2 or F-4 in slot f1 or f2
+ respectively.
+ */
+ if (major == FR550_MAJOR_F_2)
+ return ! find_major_in_slot (vliw, FR550_MAJOR_F_2, slot - (UNIT_FM2 - UNIT_FM0))
+ && ! find_major_in_slot (vliw, FR550_MAJOR_F_4, slot - (UNIT_FM2 - UNIT_FM0));
+ /* M-2 or M-5 in slot m2 or m3 cannot coexist with M-2 in slot m1 or m2
+ respectively. */
+ if (major == FR550_MAJOR_M_2 || major == FR550_MAJOR_M_5)
+ return ! find_major_in_slot (vliw, FR550_MAJOR_M_2, slot - (UNIT_FM2 - UNIT_FM0));
+ /* M-4 in slot m2 or m3 cannot coexist with M-4 in slot m1 or m2
+ respectively. */
+ if (major == FR550_MAJOR_M_4)
+ return ! find_major_in_slot (vliw, FR550_MAJOR_M_4, slot - (UNIT_FM2 - UNIT_FM0));
+ break;
+ default:
+ break;
+ }
+ return 1; /* all ok */
+}
+
+static int
fr500_check_insn_major_constraints (
FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major
)
@@ -464,6 +674,8 @@ fr500_check_insn_major_constraints (
&& ! find_major_in_vliw (vliw, FR500_MAJOR_F_6)
&& ! find_major_in_vliw (vliw, FR500_MAJOR_F_7);
default:
+ fprintf (stderr, "frv-opc.c, line %d: bad major code, aborting.\n",
+ __LINE__);
abort ();
break;
}
@@ -472,7 +684,7 @@ fr500_check_insn_major_constraints (
static int
check_insn_major_constraints (
- FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major
+ FRV_VLIW *vliw, CGEN_ATTR_VALUE_TYPE major, const CGEN_INSN *insn
)
{
int rc;
@@ -481,6 +693,9 @@ check_insn_major_constraints (
case bfd_mach_fr400:
rc = fr400_check_insn_major_constraints (vliw, major);
break;
+ case bfd_mach_fr550:
+ rc = fr550_check_insn_major_constraints (vliw, major, insn);
+ break;
default:
rc = fr500_check_insn_major_constraints (vliw, major);
break;
@@ -507,13 +722,20 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
unit = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_UNIT);
if (unit == UNIT_NIL)
- abort (); /* no UNIT specified for this insn in frv.cpu */
+ {
+ fprintf (stderr, "frv-opc.c line %d: bad insn unit.\n",
+ __LINE__);
+ abort (); /* no UNIT specified for this insn in frv.cpu */
+ }
switch (vliw->mach)
{
case bfd_mach_fr400:
major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR400_MAJOR);
break;
+ case bfd_mach_fr550:
+ major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR550_MAJOR);
+ break;
default:
major = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_FR500_MAJOR);
break;
@@ -525,6 +747,7 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
while (! match_unit (vliw, unit, (*vliw->current_vliw)[0]))
++vliw->current_vliw;
vliw->major[0] = major;
+ vliw->insn[0] = insn;
vliw->next_slot = 1;
return 0;
}
@@ -535,10 +758,11 @@ frv_vliw_add_insn (FRV_VLIW *vliw, const CGEN_INSN *insn)
if (! (vliw->elf_flags & EF_FRV_NOPACK))
{
new_vliw = add_next_to_vliw (vliw, unit);
- if (new_vliw && check_insn_major_constraints (vliw, major))
+ if (new_vliw && check_insn_major_constraints (vliw, major, insn))
{
vliw->current_vliw = new_vliw;
vliw->major[index] = major;
+ vliw->insn[index] = insn;
vliw->next_slot++;
return 0;
}
@@ -594,6 +818,18 @@ static const CGEN_IFMT ifmt_smul = {
32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_ICCI_1_NULL) }, { F (F_OPE2) }, { F (F_GRJ) }, { 0 } }
};
+static const CGEN_IFMT ifmt_smu = {
+ 32, 32, 0x7ffc0fc0, { { F (F_PACK) }, { F (F_RD_NULL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_slass = {
+ 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_scutss = {
+ 32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } }
+};
+
static const CGEN_IFMT ifmt_cadd = {
32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } }
};
@@ -646,10 +882,6 @@ static const CGEN_IFMT ifmt_setlos = {
32, 32, 0x1ff0000, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_MISC_NULL_4) }, { F (F_S16) }, { 0 } }
};
-static const CGEN_IFMT ifmt_ldsb = {
- 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } }
-};
-
static const CGEN_IFMT ifmt_ldbf = {
32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } }
};
@@ -686,10 +918,6 @@ static const CGEN_IFMT ifmt_lddfi = {
32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } }
};
-static const CGEN_IFMT ifmt_stdf = {
- 32, 32, 0x1fc0fc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } }
-};
-
static const CGEN_IFMT ifmt_cldbf = {
32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } }
};
@@ -698,14 +926,6 @@ static const CGEN_IFMT ifmt_clddf = {
32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } }
};
-static const CGEN_IFMT ifmt_cstdf = {
- 32, 32, 0x1fc00c0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } }
-};
-
-static const CGEN_IFMT ifmt_stdfi = {
- 32, 32, 0x1fc0000, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } }
-};
-
static const CGEN_IFMT ifmt_movgf = {
32, 32, 0x1ffffc0, { { F (F_PACK) }, { F (F_FRK) }, { F (F_OP) }, { F (F_RS_NULL) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } }
};
@@ -910,10 +1130,6 @@ static const CGEN_IFMT ifmt_ccalll = {
32, 32, 0x7ffc00c0, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_LI_ON) }, { F (F_OP) }, { F (F_GRI) }, { F (F_CCI) }, { F (F_COND) }, { F (F_OPE4) }, { F (F_GRJ) }, { 0 } }
};
-static const CGEN_IFMT ifmt_ici = {
- 32, 32, 0x7ffc0fc0, { { F (F_PACK) }, { F (F_RD_NULL) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } }
-};
-
static const CGEN_IFMT ifmt_icei = {
32, 32, 0x7dfc0fc0, { { F (F_PACK) }, { F (F_MISC_NULL_1) }, { F (F_AE) }, { F (F_OP) }, { F (F_GRI) }, { F (F_OPE1) }, { F (F_GRJ) }, { 0 } }
};
@@ -1277,6 +1493,24 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRDOUBLEK), 0 } },
& ifmt_smul, { 0x280 }
},
+/* smu$pack $GRi,$GRj */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), 0 } },
+ & ifmt_smu, { 0x1180140 }
+ },
+/* smass$pack $GRi,$GRj */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), 0 } },
+ & ifmt_smu, { 0x1180180 }
+ },
+/* smsss$pack $GRi,$GRj */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), 0 } },
+ & ifmt_smu, { 0x11801c0 }
+ },
/* sll$pack $GRi,$GRj,$GRk */
{
{ 0, 0, 0, 0 },
@@ -1295,6 +1529,18 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } },
& ifmt_add, { 0x40300 }
},
+/* slass$pack $GRi,$GRj,$GRk */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } },
+ & ifmt_slass, { 0x1180080 }
+ },
+/* scutss$pack $GRj,$GRk */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (PACK), ' ', OP (GRJ), ',', OP (GRK), 0 } },
+ & ifmt_scutss, { 0x1180100 }
+ },
/* scan$pack $GRi,$GRj,$GRk */
{
{ 0, 0, 0, 0 },
@@ -1517,6 +1763,18 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), ',', OP (ICCI_1), 0 } },
& ifmt_addcc, { 0x1c0 }
},
+/* addss$pack $GRi,$GRj,$GRk */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } },
+ & ifmt_slass, { 0x1180000 }
+ },
+/* subss$pack $GRi,$GRj,$GRk */
+ {
+ { 0, 0, 0, 0 },
+ { { MNEM, OP (PACK), ' ', OP (GRI), ',', OP (GRJ), ',', OP (GRK), 0 } },
+ & ifmt_slass, { 0x1180040 }
+ },
/* addi$pack $GRi,$s12,$GRk */
{
{ 0, 0, 0, 0 },
@@ -1725,31 +1983,31 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80000 }
+ & ifmt_slass, { 0x80000 }
},
/* ldub$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80040 }
+ & ifmt_slass, { 0x80040 }
},
/* ldsh$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80080 }
+ & ifmt_slass, { 0x80080 }
},
/* lduh$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x800c0 }
+ & ifmt_slass, { 0x800c0 }
},
/* ld$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80100 }
+ & ifmt_slass, { 0x80100 }
},
/* ldbf$pack @($GRi,$GRj),$FRintk */
{
@@ -1779,31 +2037,31 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80800 }
+ & ifmt_slass, { 0x80800 }
},
/* nldub$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80840 }
+ & ifmt_slass, { 0x80840 }
},
/* nldsh$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80880 }
+ & ifmt_slass, { 0x80880 }
},
/* nlduh$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x808c0 }
+ & ifmt_slass, { 0x808c0 }
},
/* nld$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80900 }
+ & ifmt_slass, { 0x80900 }
},
/* nldbf$pack @($GRi,$GRj),$FRintk */
{
@@ -1857,7 +2115,7 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80180 }
+ & ifmt_slass, { 0x80180 }
},
/* ldqf$pack @($GRi,$GRj),$FRintk */
{
@@ -1875,7 +2133,7 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80980 }
+ & ifmt_slass, { 0x80980 }
},
/* nldqf$pack @($GRi,$GRj),$FRintk */
{
@@ -1887,61 +2145,61 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80400 }
+ & ifmt_slass, { 0x80400 }
},
/* ldubu$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80440 }
+ & ifmt_slass, { 0x80440 }
},
/* ldshu$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80480 }
+ & ifmt_slass, { 0x80480 }
},
/* lduhu$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x804c0 }
+ & ifmt_slass, { 0x804c0 }
},
/* ldu$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80500 }
+ & ifmt_slass, { 0x80500 }
},
/* nldsbu$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80c00 }
+ & ifmt_slass, { 0x80c00 }
},
/* nldubu$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80c40 }
+ & ifmt_slass, { 0x80c40 }
},
/* nldshu$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80c80 }
+ & ifmt_slass, { 0x80c80 }
},
/* nlduhu$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80cc0 }
+ & ifmt_slass, { 0x80cc0 }
},
/* nldu$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80d00 }
+ & ifmt_slass, { 0x80d00 }
},
/* ldbfu$pack @($GRi,$GRj),$FRintk */
{
@@ -2019,13 +2277,13 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80580 }
+ & ifmt_slass, { 0x80580 }
},
/* nldqu$pack @($GRi,$GRj),$GRk */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0x80d80 }
+ & ifmt_slass, { 0x80d80 }
},
/* ldqfu$pack @($GRi,$GRj),$FRintk */
{
@@ -2177,12 +2435,6 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (D12), ')', ',', OP (FRINTK), 0 } },
& ifmt_ldbfi, { 0xf00000 }
},
-/* nldqi$pack @($GRi,$d12),$GRk */
- {
- { 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (D12), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsbi, { 0x1180000 }
- },
/* nldqfi$pack @($GRi,$d12),$FRintk */
{
{ 0, 0, 0, 0 },
@@ -2193,19 +2445,19 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0000 }
+ & ifmt_slass, { 0xc0000 }
},
/* sth$pack $GRk,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0040 }
+ & ifmt_slass, { 0xc0040 }
},
/* st$pack $GRk,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0080 }
+ & ifmt_slass, { 0xc0080 }
},
/* stbf$pack $FRintk,@($GRi,$GRj) */
{
@@ -2235,19 +2487,19 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0800 }
+ & ifmt_slass, { 0xc0800 }
},
/* rsth$pack $GRk,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0840 }
+ & ifmt_slass, { 0xc0840 }
},
/* rst$pack $GRk,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0880 }
+ & ifmt_slass, { 0xc0880 }
},
/* rstbf$pack $FRintk,@($GRi,$GRj) */
{
@@ -2267,41 +2519,41 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, OP (PACK), ' ', OP (FRINTK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
& ifmt_ldbf, { 0xc0a80 }
},
-/* std$pack $GRk,@($GRi,$GRj) */
+/* std$pack $GRdoublek,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc00c0 }
+ { { MNEM, OP (PACK), ' ', OP (GRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
+ & ifmt_ldd, { 0xc00c0 }
},
-/* stdf$pack $FRk,@($GRi,$GRj) */
+/* stdf$pack $FRdoublek,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (FRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_stdf, { 0xc02c0 }
+ { { MNEM, OP (PACK), ' ', OP (FRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
+ & ifmt_lddf, { 0xc02c0 }
},
-/* stdc$pack $CPRk,@($GRi,$GRj) */
+/* stdc$pack $CPRdoublek,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (CPRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldc, { 0xc0980 }
+ { { MNEM, OP (PACK), ' ', OP (CPRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
+ & ifmt_lddc, { 0xc0980 }
},
-/* rstd$pack $GRk,@($GRi,$GRj) */
+/* rstd$pack $GRdoublek,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc08c0 }
+ { { MNEM, OP (PACK), ' ', OP (GRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
+ & ifmt_ldd, { 0xc08c0 }
},
-/* rstdf$pack $FRk,@($GRi,$GRj) */
+/* rstdf$pack $FRdoublek,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (FRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_stdf, { 0xc0ac0 }
+ { { MNEM, OP (PACK), ' ', OP (FRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
+ & ifmt_lddf, { 0xc0ac0 }
},
/* stq$pack $GRk,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0100 }
+ & ifmt_slass, { 0xc0100 }
},
/* stqf$pack $FRintk,@($GRi,$GRj) */
{
@@ -2319,7 +2571,7 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0900 }
+ & ifmt_slass, { 0xc0900 }
},
/* rstqf$pack $FRintk,@($GRi,$GRj) */
{
@@ -2331,19 +2583,19 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0400 }
+ & ifmt_slass, { 0xc0400 }
},
/* sthu$pack $GRk,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0440 }
+ & ifmt_slass, { 0xc0440 }
},
/* stu$pack $GRk,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0480 }
+ & ifmt_slass, { 0xc0480 }
},
/* stbfu$pack $FRintk,@($GRi,$GRj) */
{
@@ -2369,29 +2621,29 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, OP (PACK), ' ', OP (CPRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
& ifmt_ldc, { 0xc0b40 }
},
-/* stdu$pack $GRk,@($GRi,$GRj) */
+/* stdu$pack $GRdoublek,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc04c0 }
+ { { MNEM, OP (PACK), ' ', OP (GRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
+ & ifmt_ldd, { 0xc04c0 }
},
-/* stdfu$pack $FRk,@($GRi,$GRj) */
+/* stdfu$pack $FRdoublek,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (FRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_stdf, { 0xc06c0 }
+ { { MNEM, OP (PACK), ' ', OP (FRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
+ & ifmt_lddf, { 0xc06c0 }
},
-/* stdcu$pack $CPRk,@($GRi,$GRj) */
+/* stdcu$pack $CPRdoublek,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (CPRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldc, { 0xc0b80 }
+ { { MNEM, OP (PACK), ' ', OP (CPRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
+ & ifmt_lddc, { 0xc0b80 }
},
/* stqu$pack $GRk,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0500 }
+ & ifmt_slass, { 0xc0500 }
},
/* stqfu$pack $FRintk,@($GRi,$GRj) */
{
@@ -2573,17 +2825,17 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, OP (PACK), ' ', OP (FRINTK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (CCI), ',', OP (COND), 0 } },
& ifmt_cldbf, { 0x1980080 }
},
-/* cstd$pack $GRk,@($GRi,$GRj),$CCi,$cond */
+/* cstd$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (CCI), ',', OP (COND), 0 } },
- & ifmt_cadd, { 0x19000c0 }
+ { { MNEM, OP (PACK), ' ', OP (GRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (CCI), ',', OP (COND), 0 } },
+ & ifmt_csmul, { 0x19000c0 }
},
-/* cstdf$pack $FRk,@($GRi,$GRj),$CCi,$cond */
+/* cstdf$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (FRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (CCI), ',', OP (COND), 0 } },
- & ifmt_cstdf, { 0x19800c0 }
+ { { MNEM, OP (PACK), ' ', OP (FRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (CCI), ',', OP (COND), 0 } },
+ & ifmt_clddf, { 0x19800c0 }
},
/* cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond */
{
@@ -2627,17 +2879,17 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, OP (PACK), ' ', OP (FRINTK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (CCI), ',', OP (COND), 0 } },
& ifmt_cldbf, { 0x1a00080 }
},
-/* cstdu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
+/* cstdu$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (CCI), ',', OP (COND), 0 } },
- & ifmt_cadd, { 0x19c00c0 }
+ { { MNEM, OP (PACK), ' ', OP (GRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (CCI), ',', OP (COND), 0 } },
+ & ifmt_csmul, { 0x19c00c0 }
},
-/* cstdfu$pack $FRk,@($GRi,$GRj),$CCi,$cond */
+/* cstdfu$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (FRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (CCI), ',', OP (COND), 0 } },
- & ifmt_cstdf, { 0x1a000c0 }
+ { { MNEM, OP (PACK), ' ', OP (FRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (CCI), ',', OP (COND), 0 } },
+ & ifmt_clddf, { 0x1a000c0 }
},
/* stbi$pack $GRk,@($GRi,$d12) */
{
@@ -2675,17 +2927,17 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, OP (PACK), ' ', OP (FRINTK), ',', '@', '(', OP (GRI), ',', OP (D12), ')', 0 } },
& ifmt_ldbfi, { 0x1540000 }
},
-/* stdi$pack $GRk,@($GRi,$d12) */
+/* stdi$pack $GRdoublek,@($GRi,$d12) */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (D12), ')', 0 } },
- & ifmt_ldsbi, { 0x14c0000 }
+ { { MNEM, OP (PACK), ' ', OP (GRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (D12), ')', 0 } },
+ & ifmt_lddi, { 0x14c0000 }
},
-/* stdfi$pack $FRk,@($GRi,$d12) */
+/* stdfi$pack $FRdoublek,@($GRi,$d12) */
{
{ 0, 0, 0, 0 },
- { { MNEM, OP (PACK), ' ', OP (FRK), ',', '@', '(', OP (GRI), ',', OP (D12), ')', 0 } },
- & ifmt_stdfi, { 0x1580000 }
+ { { MNEM, OP (PACK), ' ', OP (FRDOUBLEK), ',', '@', '(', OP (GRI), ',', OP (D12), ')', 0 } },
+ & ifmt_lddfi, { 0x1580000 }
},
/* stqi$pack $GRk,@($GRi,$d12) */
{
@@ -2703,7 +2955,7 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', ',', OP (GRK), 0 } },
- & ifmt_ldsb, { 0xc0140 }
+ & ifmt_slass, { 0xc0140 }
},
/* swapi$pack @($GRi,$d12),$GRk */
{
@@ -4269,13 +4521,13 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ici, { 0xc0e00 }
+ & ifmt_smu, { 0xc0e00 }
},
/* dci$pack @($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ici, { 0xc0f00 }
+ & ifmt_smu, { 0xc0f00 }
},
/* icei$pack @($GRi,$GRj),$ae */
{
@@ -4293,7 +4545,7 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ici, { 0xc0f40 }
+ & ifmt_smu, { 0xc0f40 }
},
/* dcef$pack @($GRi,$GRj),$ae */
{
@@ -4305,25 +4557,25 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0c80 }
+ & ifmt_slass, { 0xc0c80 }
},
/* wdtlb$pack $GRk,@($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', OP (GRK), ',', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ldsb, { 0xc0d80 }
+ & ifmt_slass, { 0xc0d80 }
},
/* itlbi$pack @($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ici, { 0xc0cc0 }
+ & ifmt_smu, { 0xc0cc0 }
},
/* dtlbi$pack @($GRi,$GRj) */
{
{ 0, 0, 0, 0 },
{ { MNEM, OP (PACK), ' ', '@', '(', OP (GRI), ',', OP (GRJ), ')', 0 } },
- & ifmt_ici, { 0xc0dc0 }
+ & ifmt_smu, { 0xc0dc0 }
},
/* icpl$pack $GRi,$GRj,$lock */
{
@@ -5711,37 +5963,37 @@ static const CGEN_IBASE frv_cgen_macro_insn_table[] =
/* nop$pack */
{
-1, "nop", "nop", 32,
- { 0|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
/* ret$pack */
{
-1, "ret", "ret", 32,
- { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3 } }
+ { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_NONE } }
},
/* cmp$pack $GRi,$GRj,$ICCi_1 */
{
-1, "cmp", "cmp", 32,
- { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
/* cmpi$pack $GRi,$s10,$ICCi_1 */
{
-1, "cmpi", "cmpi", 32,
- { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
/* ccmp$pack $GRi,$GRj,$CCi,$cond */
{
-1, "ccmp", "ccmp", 32,
- { 0|A(CONDITIONAL)|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL)|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
/* mov$pack $GRi,$GRk */
{
-1, "mov", "mov", 32,
- { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
/* cmov$pack $GRi,$GRk,$CCi,$cond */
{
-1, "cmov", "cmov", 32,
- { 0|A(CONDITIONAL)|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1 } }
+ { 0|A(CONDITIONAL)|A(NO_DIS)|A(ALIAS), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_NONE } }
},
};
diff --git a/opcodes/frv-opc.h b/opcodes/frv-opc.h
index eb0b902..e166fa2 100644
--- a/opcodes/frv-opc.h
+++ b/opcodes/frv-opc.h
@@ -36,7 +36,8 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#define CGEN_VERBOSE_ASSEMBLER_ERRORS
/* Vliw support. */
-#define FRV_VLIW_SIZE 4 /* fr500 has largest vliw size of 4. */
+#define FRV_VLIW_SIZE 8 /* fr550 has largest vliw size of 8. */
+#define PAD_VLIW_COMBO ,UNIT_NIL,UNIT_NIL,UNIT_NIL,UNIT_NIL
typedef CGEN_ATTR_VALUE_TYPE VLIW_COMBO[FRV_VLIW_SIZE];
typedef struct
@@ -48,6 +49,7 @@ typedef struct
CGEN_ATTR_VALUE_TYPE *unit_mapping;
VLIW_COMBO *current_vliw;
CGEN_ATTR_VALUE_TYPE major[FRV_VLIW_SIZE];
+ const CGEN_INSN* insn[FRV_VLIW_SIZE];
} FRV_VLIW;
int frv_is_branch_major PARAMS ((CGEN_ATTR_VALUE_TYPE, unsigned long));
@@ -65,189 +67,190 @@ typedef enum cgen_insn_type {
FRV_INSN_INVALID, FRV_INSN_ADD, FRV_INSN_SUB, FRV_INSN_AND
, FRV_INSN_OR, FRV_INSN_XOR, FRV_INSN_NOT, FRV_INSN_SDIV
, FRV_INSN_NSDIV, FRV_INSN_UDIV, FRV_INSN_NUDIV, FRV_INSN_SMUL
- , FRV_INSN_UMUL, FRV_INSN_SLL, FRV_INSN_SRL, FRV_INSN_SRA
- , FRV_INSN_SCAN, FRV_INSN_CADD, FRV_INSN_CSUB, FRV_INSN_CAND
- , FRV_INSN_COR, FRV_INSN_CXOR, FRV_INSN_CNOT, FRV_INSN_CSMUL
- , FRV_INSN_CSDIV, FRV_INSN_CUDIV, FRV_INSN_CSLL, FRV_INSN_CSRL
- , FRV_INSN_CSRA, FRV_INSN_CSCAN, FRV_INSN_ADDCC, FRV_INSN_SUBCC
- , FRV_INSN_ANDCC, FRV_INSN_ORCC, FRV_INSN_XORCC, FRV_INSN_SLLCC
- , FRV_INSN_SRLCC, FRV_INSN_SRACC, FRV_INSN_SMULCC, FRV_INSN_UMULCC
- , FRV_INSN_CADDCC, FRV_INSN_CSUBCC, FRV_INSN_CSMULCC, FRV_INSN_CANDCC
- , FRV_INSN_CORCC, FRV_INSN_CXORCC, FRV_INSN_CSLLCC, FRV_INSN_CSRLCC
- , FRV_INSN_CSRACC, FRV_INSN_ADDX, FRV_INSN_SUBX, FRV_INSN_ADDXCC
- , FRV_INSN_SUBXCC, FRV_INSN_ADDI, FRV_INSN_SUBI, FRV_INSN_ANDI
- , FRV_INSN_ORI, FRV_INSN_XORI, FRV_INSN_SDIVI, FRV_INSN_NSDIVI
- , FRV_INSN_UDIVI, FRV_INSN_NUDIVI, FRV_INSN_SMULI, FRV_INSN_UMULI
- , FRV_INSN_SLLI, FRV_INSN_SRLI, FRV_INSN_SRAI, FRV_INSN_SCANI
- , FRV_INSN_ADDICC, FRV_INSN_SUBICC, FRV_INSN_ANDICC, FRV_INSN_ORICC
- , FRV_INSN_XORICC, FRV_INSN_SMULICC, FRV_INSN_UMULICC, FRV_INSN_SLLICC
- , FRV_INSN_SRLICC, FRV_INSN_SRAICC, FRV_INSN_ADDXI, FRV_INSN_SUBXI
- , FRV_INSN_ADDXICC, FRV_INSN_SUBXICC, FRV_INSN_CMPB, FRV_INSN_CMPBA
- , FRV_INSN_SETLO, FRV_INSN_SETHI, FRV_INSN_SETLOS, FRV_INSN_LDSB
- , FRV_INSN_LDUB, FRV_INSN_LDSH, FRV_INSN_LDUH, FRV_INSN_LD
- , FRV_INSN_LDBF, FRV_INSN_LDHF, FRV_INSN_LDF, FRV_INSN_LDC
- , FRV_INSN_NLDSB, FRV_INSN_NLDUB, FRV_INSN_NLDSH, FRV_INSN_NLDUH
- , FRV_INSN_NLD, FRV_INSN_NLDBF, FRV_INSN_NLDHF, FRV_INSN_NLDF
- , FRV_INSN_LDD, FRV_INSN_LDDF, FRV_INSN_LDDC, FRV_INSN_NLDD
- , FRV_INSN_NLDDF, FRV_INSN_LDQ, FRV_INSN_LDQF, FRV_INSN_LDQC
- , FRV_INSN_NLDQ, FRV_INSN_NLDQF, FRV_INSN_LDSBU, FRV_INSN_LDUBU
- , FRV_INSN_LDSHU, FRV_INSN_LDUHU, FRV_INSN_LDU, FRV_INSN_NLDSBU
- , FRV_INSN_NLDUBU, FRV_INSN_NLDSHU, FRV_INSN_NLDUHU, FRV_INSN_NLDU
- , FRV_INSN_LDBFU, FRV_INSN_LDHFU, FRV_INSN_LDFU, FRV_INSN_LDCU
- , FRV_INSN_NLDBFU, FRV_INSN_NLDHFU, FRV_INSN_NLDFU, FRV_INSN_LDDU
- , FRV_INSN_NLDDU, FRV_INSN_LDDFU, FRV_INSN_LDDCU, FRV_INSN_NLDDFU
- , FRV_INSN_LDQU, FRV_INSN_NLDQU, FRV_INSN_LDQFU, FRV_INSN_LDQCU
- , FRV_INSN_NLDQFU, FRV_INSN_LDSBI, FRV_INSN_LDSHI, FRV_INSN_LDI
- , FRV_INSN_LDUBI, FRV_INSN_LDUHI, FRV_INSN_LDBFI, FRV_INSN_LDHFI
- , FRV_INSN_LDFI, FRV_INSN_NLDSBI, FRV_INSN_NLDUBI, FRV_INSN_NLDSHI
- , FRV_INSN_NLDUHI, FRV_INSN_NLDI, FRV_INSN_NLDBFI, FRV_INSN_NLDHFI
- , FRV_INSN_NLDFI, FRV_INSN_LDDI, FRV_INSN_LDDFI, FRV_INSN_NLDDI
- , FRV_INSN_NLDDFI, FRV_INSN_LDQI, FRV_INSN_LDQFI, FRV_INSN_NLDQI
- , FRV_INSN_NLDQFI, FRV_INSN_STB, FRV_INSN_STH, FRV_INSN_ST
- , FRV_INSN_STBF, FRV_INSN_STHF, FRV_INSN_STF, FRV_INSN_STC
- , FRV_INSN_RSTB, FRV_INSN_RSTH, FRV_INSN_RST, FRV_INSN_RSTBF
- , FRV_INSN_RSTHF, FRV_INSN_RSTF, FRV_INSN_STD, FRV_INSN_STDF
- , FRV_INSN_STDC, FRV_INSN_RSTD, FRV_INSN_RSTDF, FRV_INSN_STQ
- , FRV_INSN_STQF, FRV_INSN_STQC, FRV_INSN_RSTQ, FRV_INSN_RSTQF
- , FRV_INSN_STBU, FRV_INSN_STHU, FRV_INSN_STU, FRV_INSN_STBFU
- , FRV_INSN_STHFU, FRV_INSN_STFU, FRV_INSN_STCU, FRV_INSN_STDU
- , FRV_INSN_STDFU, FRV_INSN_STDCU, FRV_INSN_STQU, FRV_INSN_STQFU
- , FRV_INSN_STQCU, FRV_INSN_CLDSB, FRV_INSN_CLDUB, FRV_INSN_CLDSH
- , FRV_INSN_CLDUH, FRV_INSN_CLD, FRV_INSN_CLDBF, FRV_INSN_CLDHF
- , FRV_INSN_CLDF, FRV_INSN_CLDD, FRV_INSN_CLDDF, FRV_INSN_CLDQ
- , FRV_INSN_CLDSBU, FRV_INSN_CLDUBU, FRV_INSN_CLDSHU, FRV_INSN_CLDUHU
- , FRV_INSN_CLDU, FRV_INSN_CLDBFU, FRV_INSN_CLDHFU, FRV_INSN_CLDFU
- , FRV_INSN_CLDDU, FRV_INSN_CLDDFU, FRV_INSN_CLDQU, FRV_INSN_CSTB
- , FRV_INSN_CSTH, FRV_INSN_CST, FRV_INSN_CSTBF, FRV_INSN_CSTHF
- , FRV_INSN_CSTF, FRV_INSN_CSTD, FRV_INSN_CSTDF, FRV_INSN_CSTQ
- , FRV_INSN_CSTBU, FRV_INSN_CSTHU, FRV_INSN_CSTU, FRV_INSN_CSTBFU
- , FRV_INSN_CSTHFU, FRV_INSN_CSTFU, FRV_INSN_CSTDU, FRV_INSN_CSTDFU
- , FRV_INSN_STBI, FRV_INSN_STHI, FRV_INSN_STI, FRV_INSN_STBFI
- , FRV_INSN_STHFI, FRV_INSN_STFI, FRV_INSN_STDI, FRV_INSN_STDFI
- , FRV_INSN_STQI, FRV_INSN_STQFI, FRV_INSN_SWAP, FRV_INSN_SWAPI
- , FRV_INSN_CSWAP, FRV_INSN_MOVGF, FRV_INSN_MOVFG, FRV_INSN_MOVGFD
- , FRV_INSN_MOVFGD, FRV_INSN_MOVGFQ, FRV_INSN_MOVFGQ, FRV_INSN_CMOVGF
- , FRV_INSN_CMOVFG, FRV_INSN_CMOVGFD, FRV_INSN_CMOVFGD, FRV_INSN_MOVGS
- , FRV_INSN_MOVSG, FRV_INSN_BRA, FRV_INSN_BNO, FRV_INSN_BEQ
- , FRV_INSN_BNE, FRV_INSN_BLE, FRV_INSN_BGT, FRV_INSN_BLT
- , FRV_INSN_BGE, FRV_INSN_BLS, FRV_INSN_BHI, FRV_INSN_BC
- , FRV_INSN_BNC, FRV_INSN_BN, FRV_INSN_BP, FRV_INSN_BV
- , FRV_INSN_BNV, FRV_INSN_FBRA, FRV_INSN_FBNO, FRV_INSN_FBNE
- , FRV_INSN_FBEQ, FRV_INSN_FBLG, FRV_INSN_FBUE, FRV_INSN_FBUL
- , FRV_INSN_FBGE, FRV_INSN_FBLT, FRV_INSN_FBUGE, FRV_INSN_FBUG
- , FRV_INSN_FBLE, FRV_INSN_FBGT, FRV_INSN_FBULE, FRV_INSN_FBU
- , FRV_INSN_FBO, FRV_INSN_BCTRLR, FRV_INSN_BRALR, FRV_INSN_BNOLR
- , FRV_INSN_BEQLR, FRV_INSN_BNELR, FRV_INSN_BLELR, FRV_INSN_BGTLR
- , FRV_INSN_BLTLR, FRV_INSN_BGELR, FRV_INSN_BLSLR, FRV_INSN_BHILR
- , FRV_INSN_BCLR, FRV_INSN_BNCLR, FRV_INSN_BNLR, FRV_INSN_BPLR
- , FRV_INSN_BVLR, FRV_INSN_BNVLR, FRV_INSN_FBRALR, FRV_INSN_FBNOLR
- , FRV_INSN_FBEQLR, FRV_INSN_FBNELR, FRV_INSN_FBLGLR, FRV_INSN_FBUELR
- , FRV_INSN_FBULLR, FRV_INSN_FBGELR, FRV_INSN_FBLTLR, FRV_INSN_FBUGELR
- , FRV_INSN_FBUGLR, FRV_INSN_FBLELR, FRV_INSN_FBGTLR, FRV_INSN_FBULELR
- , FRV_INSN_FBULR, FRV_INSN_FBOLR, FRV_INSN_BCRALR, FRV_INSN_BCNOLR
- , FRV_INSN_BCEQLR, FRV_INSN_BCNELR, FRV_INSN_BCLELR, FRV_INSN_BCGTLR
- , FRV_INSN_BCLTLR, FRV_INSN_BCGELR, FRV_INSN_BCLSLR, FRV_INSN_BCHILR
- , FRV_INSN_BCCLR, FRV_INSN_BCNCLR, FRV_INSN_BCNLR, FRV_INSN_BCPLR
- , FRV_INSN_BCVLR, FRV_INSN_BCNVLR, FRV_INSN_FCBRALR, FRV_INSN_FCBNOLR
- , FRV_INSN_FCBEQLR, FRV_INSN_FCBNELR, FRV_INSN_FCBLGLR, FRV_INSN_FCBUELR
- , FRV_INSN_FCBULLR, FRV_INSN_FCBGELR, FRV_INSN_FCBLTLR, FRV_INSN_FCBUGELR
- , FRV_INSN_FCBUGLR, FRV_INSN_FCBLELR, FRV_INSN_FCBGTLR, FRV_INSN_FCBULELR
- , FRV_INSN_FCBULR, FRV_INSN_FCBOLR, FRV_INSN_JMPL, FRV_INSN_CALLL
- , FRV_INSN_JMPIL, FRV_INSN_CALLIL, FRV_INSN_CALL, FRV_INSN_RETT
- , FRV_INSN_REI, FRV_INSN_TRA, FRV_INSN_TNO, FRV_INSN_TEQ
- , FRV_INSN_TNE, FRV_INSN_TLE, FRV_INSN_TGT, FRV_INSN_TLT
- , FRV_INSN_TGE, FRV_INSN_TLS, FRV_INSN_THI, FRV_INSN_TC
- , FRV_INSN_TNC, FRV_INSN_TN, FRV_INSN_TP, FRV_INSN_TV
- , FRV_INSN_TNV, FRV_INSN_FTRA, FRV_INSN_FTNO, FRV_INSN_FTNE
- , FRV_INSN_FTEQ, FRV_INSN_FTLG, FRV_INSN_FTUE, FRV_INSN_FTUL
- , FRV_INSN_FTGE, FRV_INSN_FTLT, FRV_INSN_FTUGE, FRV_INSN_FTUG
- , FRV_INSN_FTLE, FRV_INSN_FTGT, FRV_INSN_FTULE, FRV_INSN_FTU
- , FRV_INSN_FTO, FRV_INSN_TIRA, FRV_INSN_TINO, FRV_INSN_TIEQ
- , FRV_INSN_TINE, FRV_INSN_TILE, FRV_INSN_TIGT, FRV_INSN_TILT
- , FRV_INSN_TIGE, FRV_INSN_TILS, FRV_INSN_TIHI, FRV_INSN_TIC
- , FRV_INSN_TINC, FRV_INSN_TIN, FRV_INSN_TIP, FRV_INSN_TIV
- , FRV_INSN_TINV, FRV_INSN_FTIRA, FRV_INSN_FTINO, FRV_INSN_FTINE
- , FRV_INSN_FTIEQ, FRV_INSN_FTILG, FRV_INSN_FTIUE, FRV_INSN_FTIUL
- , FRV_INSN_FTIGE, FRV_INSN_FTILT, FRV_INSN_FTIUGE, FRV_INSN_FTIUG
- , FRV_INSN_FTILE, FRV_INSN_FTIGT, FRV_INSN_FTIULE, FRV_INSN_FTIU
- , FRV_INSN_FTIO, FRV_INSN_BREAK, FRV_INSN_MTRAP, FRV_INSN_ANDCR
- , FRV_INSN_ORCR, FRV_INSN_XORCR, FRV_INSN_NANDCR, FRV_INSN_NORCR
- , FRV_INSN_ANDNCR, FRV_INSN_ORNCR, FRV_INSN_NANDNCR, FRV_INSN_NORNCR
- , FRV_INSN_NOTCR, FRV_INSN_CKRA, FRV_INSN_CKNO, FRV_INSN_CKEQ
- , FRV_INSN_CKNE, FRV_INSN_CKLE, FRV_INSN_CKGT, FRV_INSN_CKLT
- , FRV_INSN_CKGE, FRV_INSN_CKLS, FRV_INSN_CKHI, FRV_INSN_CKC
- , FRV_INSN_CKNC, FRV_INSN_CKN, FRV_INSN_CKP, FRV_INSN_CKV
- , FRV_INSN_CKNV, FRV_INSN_FCKRA, FRV_INSN_FCKNO, FRV_INSN_FCKNE
- , FRV_INSN_FCKEQ, FRV_INSN_FCKLG, FRV_INSN_FCKUE, FRV_INSN_FCKUL
- , FRV_INSN_FCKGE, FRV_INSN_FCKLT, FRV_INSN_FCKUGE, FRV_INSN_FCKUG
- , FRV_INSN_FCKLE, FRV_INSN_FCKGT, FRV_INSN_FCKULE, FRV_INSN_FCKU
- , FRV_INSN_FCKO, FRV_INSN_CCKRA, FRV_INSN_CCKNO, FRV_INSN_CCKEQ
- , FRV_INSN_CCKNE, FRV_INSN_CCKLE, FRV_INSN_CCKGT, FRV_INSN_CCKLT
- , FRV_INSN_CCKGE, FRV_INSN_CCKLS, FRV_INSN_CCKHI, FRV_INSN_CCKC
- , FRV_INSN_CCKNC, FRV_INSN_CCKN, FRV_INSN_CCKP, FRV_INSN_CCKV
- , FRV_INSN_CCKNV, FRV_INSN_CFCKRA, FRV_INSN_CFCKNO, FRV_INSN_CFCKNE
- , FRV_INSN_CFCKEQ, FRV_INSN_CFCKLG, FRV_INSN_CFCKUE, FRV_INSN_CFCKUL
- , FRV_INSN_CFCKGE, FRV_INSN_CFCKLT, FRV_INSN_CFCKUGE, FRV_INSN_CFCKUG
- , FRV_INSN_CFCKLE, FRV_INSN_CFCKGT, FRV_INSN_CFCKULE, FRV_INSN_CFCKU
- , FRV_INSN_CFCKO, FRV_INSN_CJMPL, FRV_INSN_CCALLL, FRV_INSN_ICI
- , FRV_INSN_DCI, FRV_INSN_ICEI, FRV_INSN_DCEI, FRV_INSN_DCF
- , FRV_INSN_DCEF, FRV_INSN_WITLB, FRV_INSN_WDTLB, FRV_INSN_ITLBI
- , FRV_INSN_DTLBI, FRV_INSN_ICPL, FRV_INSN_DCPL, FRV_INSN_ICUL
- , FRV_INSN_DCUL, FRV_INSN_BAR, FRV_INSN_MEMBAR, FRV_INSN_COP1
- , FRV_INSN_COP2, FRV_INSN_CLRGR, FRV_INSN_CLRFR, FRV_INSN_CLRGA
- , FRV_INSN_CLRFA, FRV_INSN_COMMITGR, FRV_INSN_COMMITFR, FRV_INSN_COMMITGA
- , FRV_INSN_COMMITFA, FRV_INSN_FITOS, FRV_INSN_FSTOI, FRV_INSN_FITOD
- , FRV_INSN_FDTOI, FRV_INSN_FDITOS, FRV_INSN_FDSTOI, FRV_INSN_NFDITOS
- , FRV_INSN_NFDSTOI, FRV_INSN_CFITOS, FRV_INSN_CFSTOI, FRV_INSN_NFITOS
- , FRV_INSN_NFSTOI, FRV_INSN_FMOVS, FRV_INSN_FMOVD, FRV_INSN_FDMOVS
- , FRV_INSN_CFMOVS, FRV_INSN_FNEGS, FRV_INSN_FNEGD, FRV_INSN_FDNEGS
- , FRV_INSN_CFNEGS, FRV_INSN_FABSS, FRV_INSN_FABSD, FRV_INSN_FDABSS
- , FRV_INSN_CFABSS, FRV_INSN_FSQRTS, FRV_INSN_FDSQRTS, FRV_INSN_NFDSQRTS
- , FRV_INSN_FSQRTD, FRV_INSN_CFSQRTS, FRV_INSN_NFSQRTS, FRV_INSN_FADDS
- , FRV_INSN_FSUBS, FRV_INSN_FMULS, FRV_INSN_FDIVS, FRV_INSN_FADDD
- , FRV_INSN_FSUBD, FRV_INSN_FMULD, FRV_INSN_FDIVD, FRV_INSN_CFADDS
- , FRV_INSN_CFSUBS, FRV_INSN_CFMULS, FRV_INSN_CFDIVS, FRV_INSN_NFADDS
- , FRV_INSN_NFSUBS, FRV_INSN_NFMULS, FRV_INSN_NFDIVS, FRV_INSN_FCMPS
- , FRV_INSN_FCMPD, FRV_INSN_CFCMPS, FRV_INSN_FDCMPS, FRV_INSN_FMADDS
- , FRV_INSN_FMSUBS, FRV_INSN_FMADDD, FRV_INSN_FMSUBD, FRV_INSN_FDMADDS
- , FRV_INSN_NFDMADDS, FRV_INSN_CFMADDS, FRV_INSN_CFMSUBS, FRV_INSN_NFMADDS
- , FRV_INSN_NFMSUBS, FRV_INSN_FMAS, FRV_INSN_FMSS, FRV_INSN_FDMAS
- , FRV_INSN_FDMSS, FRV_INSN_NFDMAS, FRV_INSN_NFDMSS, FRV_INSN_CFMAS
- , FRV_INSN_CFMSS, FRV_INSN_FMAD, FRV_INSN_FMSD, FRV_INSN_NFMAS
- , FRV_INSN_NFMSS, FRV_INSN_FDADDS, FRV_INSN_FDSUBS, FRV_INSN_FDMULS
- , FRV_INSN_FDDIVS, FRV_INSN_FDSADS, FRV_INSN_FDMULCS, FRV_INSN_NFDMULCS
- , FRV_INSN_NFDADDS, FRV_INSN_NFDSUBS, FRV_INSN_NFDMULS, FRV_INSN_NFDDIVS
- , FRV_INSN_NFDSADS, FRV_INSN_NFDCMPS, FRV_INSN_MHSETLOS, FRV_INSN_MHSETHIS
- , FRV_INSN_MHDSETS, FRV_INSN_MHSETLOH, FRV_INSN_MHSETHIH, FRV_INSN_MHDSETH
- , FRV_INSN_MAND, FRV_INSN_MOR, FRV_INSN_MXOR, FRV_INSN_CMAND
- , FRV_INSN_CMOR, FRV_INSN_CMXOR, FRV_INSN_MNOT, FRV_INSN_CMNOT
- , FRV_INSN_MROTLI, FRV_INSN_MROTRI, FRV_INSN_MWCUT, FRV_INSN_MWCUTI
- , FRV_INSN_MCUT, FRV_INSN_MCUTI, FRV_INSN_MCUTSS, FRV_INSN_MCUTSSI
- , FRV_INSN_MDCUTSSI, FRV_INSN_MAVEH, FRV_INSN_MSLLHI, FRV_INSN_MSRLHI
- , FRV_INSN_MSRAHI, FRV_INSN_MDROTLI, FRV_INSN_MCPLHI, FRV_INSN_MCPLI
- , FRV_INSN_MSATHS, FRV_INSN_MQSATHS, FRV_INSN_MSATHU, FRV_INSN_MCMPSH
- , FRV_INSN_MCMPUH, FRV_INSN_MABSHS, FRV_INSN_MADDHSS, FRV_INSN_MADDHUS
- , FRV_INSN_MSUBHSS, FRV_INSN_MSUBHUS, FRV_INSN_CMADDHSS, FRV_INSN_CMADDHUS
- , FRV_INSN_CMSUBHSS, FRV_INSN_CMSUBHUS, FRV_INSN_MQADDHSS, FRV_INSN_MQADDHUS
- , FRV_INSN_MQSUBHSS, FRV_INSN_MQSUBHUS, FRV_INSN_CMQADDHSS, FRV_INSN_CMQADDHUS
- , FRV_INSN_CMQSUBHSS, FRV_INSN_CMQSUBHUS, FRV_INSN_MADDACCS, FRV_INSN_MSUBACCS
- , FRV_INSN_MDADDACCS, FRV_INSN_MDSUBACCS, FRV_INSN_MASACCS, FRV_INSN_MDASACCS
- , FRV_INSN_MMULHS, FRV_INSN_MMULHU, FRV_INSN_MMULXHS, FRV_INSN_MMULXHU
- , FRV_INSN_CMMULHS, FRV_INSN_CMMULHU, FRV_INSN_MQMULHS, FRV_INSN_MQMULHU
- , FRV_INSN_MQMULXHS, FRV_INSN_MQMULXHU, FRV_INSN_CMQMULHS, FRV_INSN_CMQMULHU
- , FRV_INSN_MMACHS, FRV_INSN_MMACHU, FRV_INSN_MMRDHS, FRV_INSN_MMRDHU
- , FRV_INSN_CMMACHS, FRV_INSN_CMMACHU, FRV_INSN_MQMACHS, FRV_INSN_MQMACHU
- , FRV_INSN_CMQMACHS, FRV_INSN_CMQMACHU, FRV_INSN_MQXMACHS, FRV_INSN_MQXMACXHS
- , FRV_INSN_MQMACXHS, FRV_INSN_MCPXRS, FRV_INSN_MCPXRU, FRV_INSN_MCPXIS
- , FRV_INSN_MCPXIU, FRV_INSN_CMCPXRS, FRV_INSN_CMCPXRU, FRV_INSN_CMCPXIS
- , FRV_INSN_CMCPXIU, FRV_INSN_MQCPXRS, FRV_INSN_MQCPXRU, FRV_INSN_MQCPXIS
- , FRV_INSN_MQCPXIU, FRV_INSN_MEXPDHW, FRV_INSN_CMEXPDHW, FRV_INSN_MEXPDHD
- , FRV_INSN_CMEXPDHD, FRV_INSN_MPACKH, FRV_INSN_MDPACKH, FRV_INSN_MUNPACKH
- , FRV_INSN_MDUNPACKH, FRV_INSN_MBTOH, FRV_INSN_CMBTOH, FRV_INSN_MHTOB
- , FRV_INSN_CMHTOB, FRV_INSN_MBTOHE, FRV_INSN_CMBTOHE, FRV_INSN_MNOP
- , FRV_INSN_MCLRACC_0, FRV_INSN_MCLRACC_1, FRV_INSN_MRDACC, FRV_INSN_MRDACCG
- , FRV_INSN_MWTACC, FRV_INSN_MWTACCG, FRV_INSN_MCOP1, FRV_INSN_MCOP2
- , FRV_INSN_FNOP
+ , FRV_INSN_UMUL, FRV_INSN_SMU, FRV_INSN_SMASS, FRV_INSN_SMSSS
+ , FRV_INSN_SLL, FRV_INSN_SRL, FRV_INSN_SRA, FRV_INSN_SLASS
+ , FRV_INSN_SCUTSS, FRV_INSN_SCAN, FRV_INSN_CADD, FRV_INSN_CSUB
+ , FRV_INSN_CAND, FRV_INSN_COR, FRV_INSN_CXOR, FRV_INSN_CNOT
+ , FRV_INSN_CSMUL, FRV_INSN_CSDIV, FRV_INSN_CUDIV, FRV_INSN_CSLL
+ , FRV_INSN_CSRL, FRV_INSN_CSRA, FRV_INSN_CSCAN, FRV_INSN_ADDCC
+ , FRV_INSN_SUBCC, FRV_INSN_ANDCC, FRV_INSN_ORCC, FRV_INSN_XORCC
+ , FRV_INSN_SLLCC, FRV_INSN_SRLCC, FRV_INSN_SRACC, FRV_INSN_SMULCC
+ , FRV_INSN_UMULCC, FRV_INSN_CADDCC, FRV_INSN_CSUBCC, FRV_INSN_CSMULCC
+ , FRV_INSN_CANDCC, FRV_INSN_CORCC, FRV_INSN_CXORCC, FRV_INSN_CSLLCC
+ , FRV_INSN_CSRLCC, FRV_INSN_CSRACC, FRV_INSN_ADDX, FRV_INSN_SUBX
+ , FRV_INSN_ADDXCC, FRV_INSN_SUBXCC, FRV_INSN_ADDSS, FRV_INSN_SUBSS
+ , FRV_INSN_ADDI, FRV_INSN_SUBI, FRV_INSN_ANDI, FRV_INSN_ORI
+ , FRV_INSN_XORI, FRV_INSN_SDIVI, FRV_INSN_NSDIVI, FRV_INSN_UDIVI
+ , FRV_INSN_NUDIVI, FRV_INSN_SMULI, FRV_INSN_UMULI, FRV_INSN_SLLI
+ , FRV_INSN_SRLI, FRV_INSN_SRAI, FRV_INSN_SCANI, FRV_INSN_ADDICC
+ , FRV_INSN_SUBICC, FRV_INSN_ANDICC, FRV_INSN_ORICC, FRV_INSN_XORICC
+ , FRV_INSN_SMULICC, FRV_INSN_UMULICC, FRV_INSN_SLLICC, FRV_INSN_SRLICC
+ , FRV_INSN_SRAICC, FRV_INSN_ADDXI, FRV_INSN_SUBXI, FRV_INSN_ADDXICC
+ , FRV_INSN_SUBXICC, FRV_INSN_CMPB, FRV_INSN_CMPBA, FRV_INSN_SETLO
+ , FRV_INSN_SETHI, FRV_INSN_SETLOS, FRV_INSN_LDSB, FRV_INSN_LDUB
+ , FRV_INSN_LDSH, FRV_INSN_LDUH, FRV_INSN_LD, FRV_INSN_LDBF
+ , FRV_INSN_LDHF, FRV_INSN_LDF, FRV_INSN_LDC, FRV_INSN_NLDSB
+ , FRV_INSN_NLDUB, FRV_INSN_NLDSH, FRV_INSN_NLDUH, FRV_INSN_NLD
+ , FRV_INSN_NLDBF, FRV_INSN_NLDHF, FRV_INSN_NLDF, FRV_INSN_LDD
+ , FRV_INSN_LDDF, FRV_INSN_LDDC, FRV_INSN_NLDD, FRV_INSN_NLDDF
+ , FRV_INSN_LDQ, FRV_INSN_LDQF, FRV_INSN_LDQC, FRV_INSN_NLDQ
+ , FRV_INSN_NLDQF, FRV_INSN_LDSBU, FRV_INSN_LDUBU, FRV_INSN_LDSHU
+ , FRV_INSN_LDUHU, FRV_INSN_LDU, FRV_INSN_NLDSBU, FRV_INSN_NLDUBU
+ , FRV_INSN_NLDSHU, FRV_INSN_NLDUHU, FRV_INSN_NLDU, FRV_INSN_LDBFU
+ , FRV_INSN_LDHFU, FRV_INSN_LDFU, FRV_INSN_LDCU, FRV_INSN_NLDBFU
+ , FRV_INSN_NLDHFU, FRV_INSN_NLDFU, FRV_INSN_LDDU, FRV_INSN_NLDDU
+ , FRV_INSN_LDDFU, FRV_INSN_LDDCU, FRV_INSN_NLDDFU, FRV_INSN_LDQU
+ , FRV_INSN_NLDQU, FRV_INSN_LDQFU, FRV_INSN_LDQCU, FRV_INSN_NLDQFU
+ , FRV_INSN_LDSBI, FRV_INSN_LDSHI, FRV_INSN_LDI, FRV_INSN_LDUBI
+ , FRV_INSN_LDUHI, FRV_INSN_LDBFI, FRV_INSN_LDHFI, FRV_INSN_LDFI
+ , FRV_INSN_NLDSBI, FRV_INSN_NLDUBI, FRV_INSN_NLDSHI, FRV_INSN_NLDUHI
+ , FRV_INSN_NLDI, FRV_INSN_NLDBFI, FRV_INSN_NLDHFI, FRV_INSN_NLDFI
+ , FRV_INSN_LDDI, FRV_INSN_LDDFI, FRV_INSN_NLDDI, FRV_INSN_NLDDFI
+ , FRV_INSN_LDQI, FRV_INSN_LDQFI, FRV_INSN_NLDQFI, FRV_INSN_STB
+ , FRV_INSN_STH, FRV_INSN_ST, FRV_INSN_STBF, FRV_INSN_STHF
+ , FRV_INSN_STF, FRV_INSN_STC, FRV_INSN_RSTB, FRV_INSN_RSTH
+ , FRV_INSN_RST, FRV_INSN_RSTBF, FRV_INSN_RSTHF, FRV_INSN_RSTF
+ , FRV_INSN_STD, FRV_INSN_STDF, FRV_INSN_STDC, FRV_INSN_RSTD
+ , FRV_INSN_RSTDF, FRV_INSN_STQ, FRV_INSN_STQF, FRV_INSN_STQC
+ , FRV_INSN_RSTQ, FRV_INSN_RSTQF, FRV_INSN_STBU, FRV_INSN_STHU
+ , FRV_INSN_STU, FRV_INSN_STBFU, FRV_INSN_STHFU, FRV_INSN_STFU
+ , FRV_INSN_STCU, FRV_INSN_STDU, FRV_INSN_STDFU, FRV_INSN_STDCU
+ , FRV_INSN_STQU, FRV_INSN_STQFU, FRV_INSN_STQCU, FRV_INSN_CLDSB
+ , FRV_INSN_CLDUB, FRV_INSN_CLDSH, FRV_INSN_CLDUH, FRV_INSN_CLD
+ , FRV_INSN_CLDBF, FRV_INSN_CLDHF, FRV_INSN_CLDF, FRV_INSN_CLDD
+ , FRV_INSN_CLDDF, FRV_INSN_CLDQ, FRV_INSN_CLDSBU, FRV_INSN_CLDUBU
+ , FRV_INSN_CLDSHU, FRV_INSN_CLDUHU, FRV_INSN_CLDU, FRV_INSN_CLDBFU
+ , FRV_INSN_CLDHFU, FRV_INSN_CLDFU, FRV_INSN_CLDDU, FRV_INSN_CLDDFU
+ , FRV_INSN_CLDQU, FRV_INSN_CSTB, FRV_INSN_CSTH, FRV_INSN_CST
+ , FRV_INSN_CSTBF, FRV_INSN_CSTHF, FRV_INSN_CSTF, FRV_INSN_CSTD
+ , FRV_INSN_CSTDF, FRV_INSN_CSTQ, FRV_INSN_CSTBU, FRV_INSN_CSTHU
+ , FRV_INSN_CSTU, FRV_INSN_CSTBFU, FRV_INSN_CSTHFU, FRV_INSN_CSTFU
+ , FRV_INSN_CSTDU, FRV_INSN_CSTDFU, FRV_INSN_STBI, FRV_INSN_STHI
+ , FRV_INSN_STI, FRV_INSN_STBFI, FRV_INSN_STHFI, FRV_INSN_STFI
+ , FRV_INSN_STDI, FRV_INSN_STDFI, FRV_INSN_STQI, FRV_INSN_STQFI
+ , FRV_INSN_SWAP, FRV_INSN_SWAPI, FRV_INSN_CSWAP, FRV_INSN_MOVGF
+ , FRV_INSN_MOVFG, FRV_INSN_MOVGFD, FRV_INSN_MOVFGD, FRV_INSN_MOVGFQ
+ , FRV_INSN_MOVFGQ, FRV_INSN_CMOVGF, FRV_INSN_CMOVFG, FRV_INSN_CMOVGFD
+ , FRV_INSN_CMOVFGD, FRV_INSN_MOVGS, FRV_INSN_MOVSG, FRV_INSN_BRA
+ , FRV_INSN_BNO, FRV_INSN_BEQ, FRV_INSN_BNE, FRV_INSN_BLE
+ , FRV_INSN_BGT, FRV_INSN_BLT, FRV_INSN_BGE, FRV_INSN_BLS
+ , FRV_INSN_BHI, FRV_INSN_BC, FRV_INSN_BNC, FRV_INSN_BN
+ , FRV_INSN_BP, FRV_INSN_BV, FRV_INSN_BNV, FRV_INSN_FBRA
+ , FRV_INSN_FBNO, FRV_INSN_FBNE, FRV_INSN_FBEQ, FRV_INSN_FBLG
+ , FRV_INSN_FBUE, FRV_INSN_FBUL, FRV_INSN_FBGE, FRV_INSN_FBLT
+ , FRV_INSN_FBUGE, FRV_INSN_FBUG, FRV_INSN_FBLE, FRV_INSN_FBGT
+ , FRV_INSN_FBULE, FRV_INSN_FBU, FRV_INSN_FBO, FRV_INSN_BCTRLR
+ , FRV_INSN_BRALR, FRV_INSN_BNOLR, FRV_INSN_BEQLR, FRV_INSN_BNELR
+ , FRV_INSN_BLELR, FRV_INSN_BGTLR, FRV_INSN_BLTLR, FRV_INSN_BGELR
+ , FRV_INSN_BLSLR, FRV_INSN_BHILR, FRV_INSN_BCLR, FRV_INSN_BNCLR
+ , FRV_INSN_BNLR, FRV_INSN_BPLR, FRV_INSN_BVLR, FRV_INSN_BNVLR
+ , FRV_INSN_FBRALR, FRV_INSN_FBNOLR, FRV_INSN_FBEQLR, FRV_INSN_FBNELR
+ , FRV_INSN_FBLGLR, FRV_INSN_FBUELR, FRV_INSN_FBULLR, FRV_INSN_FBGELR
+ , FRV_INSN_FBLTLR, FRV_INSN_FBUGELR, FRV_INSN_FBUGLR, FRV_INSN_FBLELR
+ , FRV_INSN_FBGTLR, FRV_INSN_FBULELR, FRV_INSN_FBULR, FRV_INSN_FBOLR
+ , FRV_INSN_BCRALR, FRV_INSN_BCNOLR, FRV_INSN_BCEQLR, FRV_INSN_BCNELR
+ , FRV_INSN_BCLELR, FRV_INSN_BCGTLR, FRV_INSN_BCLTLR, FRV_INSN_BCGELR
+ , FRV_INSN_BCLSLR, FRV_INSN_BCHILR, FRV_INSN_BCCLR, FRV_INSN_BCNCLR
+ , FRV_INSN_BCNLR, FRV_INSN_BCPLR, FRV_INSN_BCVLR, FRV_INSN_BCNVLR
+ , FRV_INSN_FCBRALR, FRV_INSN_FCBNOLR, FRV_INSN_FCBEQLR, FRV_INSN_FCBNELR
+ , FRV_INSN_FCBLGLR, FRV_INSN_FCBUELR, FRV_INSN_FCBULLR, FRV_INSN_FCBGELR
+ , FRV_INSN_FCBLTLR, FRV_INSN_FCBUGELR, FRV_INSN_FCBUGLR, FRV_INSN_FCBLELR
+ , FRV_INSN_FCBGTLR, FRV_INSN_FCBULELR, FRV_INSN_FCBULR, FRV_INSN_FCBOLR
+ , FRV_INSN_JMPL, FRV_INSN_CALLL, FRV_INSN_JMPIL, FRV_INSN_CALLIL
+ , FRV_INSN_CALL, FRV_INSN_RETT, FRV_INSN_REI, FRV_INSN_TRA
+ , FRV_INSN_TNO, FRV_INSN_TEQ, FRV_INSN_TNE, FRV_INSN_TLE
+ , FRV_INSN_TGT, FRV_INSN_TLT, FRV_INSN_TGE, FRV_INSN_TLS
+ , FRV_INSN_THI, FRV_INSN_TC, FRV_INSN_TNC, FRV_INSN_TN
+ , FRV_INSN_TP, FRV_INSN_TV, FRV_INSN_TNV, FRV_INSN_FTRA
+ , FRV_INSN_FTNO, FRV_INSN_FTNE, FRV_INSN_FTEQ, FRV_INSN_FTLG
+ , FRV_INSN_FTUE, FRV_INSN_FTUL, FRV_INSN_FTGE, FRV_INSN_FTLT
+ , FRV_INSN_FTUGE, FRV_INSN_FTUG, FRV_INSN_FTLE, FRV_INSN_FTGT
+ , FRV_INSN_FTULE, FRV_INSN_FTU, FRV_INSN_FTO, FRV_INSN_TIRA
+ , FRV_INSN_TINO, FRV_INSN_TIEQ, FRV_INSN_TINE, FRV_INSN_TILE
+ , FRV_INSN_TIGT, FRV_INSN_TILT, FRV_INSN_TIGE, FRV_INSN_TILS
+ , FRV_INSN_TIHI, FRV_INSN_TIC, FRV_INSN_TINC, FRV_INSN_TIN
+ , FRV_INSN_TIP, FRV_INSN_TIV, FRV_INSN_TINV, FRV_INSN_FTIRA
+ , FRV_INSN_FTINO, FRV_INSN_FTINE, FRV_INSN_FTIEQ, FRV_INSN_FTILG
+ , FRV_INSN_FTIUE, FRV_INSN_FTIUL, FRV_INSN_FTIGE, FRV_INSN_FTILT
+ , FRV_INSN_FTIUGE, FRV_INSN_FTIUG, FRV_INSN_FTILE, FRV_INSN_FTIGT
+ , FRV_INSN_FTIULE, FRV_INSN_FTIU, FRV_INSN_FTIO, FRV_INSN_BREAK
+ , FRV_INSN_MTRAP, FRV_INSN_ANDCR, FRV_INSN_ORCR, FRV_INSN_XORCR
+ , FRV_INSN_NANDCR, FRV_INSN_NORCR, FRV_INSN_ANDNCR, FRV_INSN_ORNCR
+ , FRV_INSN_NANDNCR, FRV_INSN_NORNCR, FRV_INSN_NOTCR, FRV_INSN_CKRA
+ , FRV_INSN_CKNO, FRV_INSN_CKEQ, FRV_INSN_CKNE, FRV_INSN_CKLE
+ , FRV_INSN_CKGT, FRV_INSN_CKLT, FRV_INSN_CKGE, FRV_INSN_CKLS
+ , FRV_INSN_CKHI, FRV_INSN_CKC, FRV_INSN_CKNC, FRV_INSN_CKN
+ , FRV_INSN_CKP, FRV_INSN_CKV, FRV_INSN_CKNV, FRV_INSN_FCKRA
+ , FRV_INSN_FCKNO, FRV_INSN_FCKNE, FRV_INSN_FCKEQ, FRV_INSN_FCKLG
+ , FRV_INSN_FCKUE, FRV_INSN_FCKUL, FRV_INSN_FCKGE, FRV_INSN_FCKLT
+ , FRV_INSN_FCKUGE, FRV_INSN_FCKUG, FRV_INSN_FCKLE, FRV_INSN_FCKGT
+ , FRV_INSN_FCKULE, FRV_INSN_FCKU, FRV_INSN_FCKO, FRV_INSN_CCKRA
+ , FRV_INSN_CCKNO, FRV_INSN_CCKEQ, FRV_INSN_CCKNE, FRV_INSN_CCKLE
+ , FRV_INSN_CCKGT, FRV_INSN_CCKLT, FRV_INSN_CCKGE, FRV_INSN_CCKLS
+ , FRV_INSN_CCKHI, FRV_INSN_CCKC, FRV_INSN_CCKNC, FRV_INSN_CCKN
+ , FRV_INSN_CCKP, FRV_INSN_CCKV, FRV_INSN_CCKNV, FRV_INSN_CFCKRA
+ , FRV_INSN_CFCKNO, FRV_INSN_CFCKNE, FRV_INSN_CFCKEQ, FRV_INSN_CFCKLG
+ , FRV_INSN_CFCKUE, FRV_INSN_CFCKUL, FRV_INSN_CFCKGE, FRV_INSN_CFCKLT
+ , FRV_INSN_CFCKUGE, FRV_INSN_CFCKUG, FRV_INSN_CFCKLE, FRV_INSN_CFCKGT
+ , FRV_INSN_CFCKULE, FRV_INSN_CFCKU, FRV_INSN_CFCKO, FRV_INSN_CJMPL
+ , FRV_INSN_CCALLL, FRV_INSN_ICI, FRV_INSN_DCI, FRV_INSN_ICEI
+ , FRV_INSN_DCEI, FRV_INSN_DCF, FRV_INSN_DCEF, FRV_INSN_WITLB
+ , FRV_INSN_WDTLB, FRV_INSN_ITLBI, FRV_INSN_DTLBI, FRV_INSN_ICPL
+ , FRV_INSN_DCPL, FRV_INSN_ICUL, FRV_INSN_DCUL, FRV_INSN_BAR
+ , FRV_INSN_MEMBAR, FRV_INSN_COP1, FRV_INSN_COP2, FRV_INSN_CLRGR
+ , FRV_INSN_CLRFR, FRV_INSN_CLRGA, FRV_INSN_CLRFA, FRV_INSN_COMMITGR
+ , FRV_INSN_COMMITFR, FRV_INSN_COMMITGA, FRV_INSN_COMMITFA, FRV_INSN_FITOS
+ , FRV_INSN_FSTOI, FRV_INSN_FITOD, FRV_INSN_FDTOI, FRV_INSN_FDITOS
+ , FRV_INSN_FDSTOI, FRV_INSN_NFDITOS, FRV_INSN_NFDSTOI, FRV_INSN_CFITOS
+ , FRV_INSN_CFSTOI, FRV_INSN_NFITOS, FRV_INSN_NFSTOI, FRV_INSN_FMOVS
+ , FRV_INSN_FMOVD, FRV_INSN_FDMOVS, FRV_INSN_CFMOVS, FRV_INSN_FNEGS
+ , FRV_INSN_FNEGD, FRV_INSN_FDNEGS, FRV_INSN_CFNEGS, FRV_INSN_FABSS
+ , FRV_INSN_FABSD, FRV_INSN_FDABSS, FRV_INSN_CFABSS, FRV_INSN_FSQRTS
+ , FRV_INSN_FDSQRTS, FRV_INSN_NFDSQRTS, FRV_INSN_FSQRTD, FRV_INSN_CFSQRTS
+ , FRV_INSN_NFSQRTS, FRV_INSN_FADDS, FRV_INSN_FSUBS, FRV_INSN_FMULS
+ , FRV_INSN_FDIVS, FRV_INSN_FADDD, FRV_INSN_FSUBD, FRV_INSN_FMULD
+ , FRV_INSN_FDIVD, FRV_INSN_CFADDS, FRV_INSN_CFSUBS, FRV_INSN_CFMULS
+ , FRV_INSN_CFDIVS, FRV_INSN_NFADDS, FRV_INSN_NFSUBS, FRV_INSN_NFMULS
+ , FRV_INSN_NFDIVS, FRV_INSN_FCMPS, FRV_INSN_FCMPD, FRV_INSN_CFCMPS
+ , FRV_INSN_FDCMPS, FRV_INSN_FMADDS, FRV_INSN_FMSUBS, FRV_INSN_FMADDD
+ , FRV_INSN_FMSUBD, FRV_INSN_FDMADDS, FRV_INSN_NFDMADDS, FRV_INSN_CFMADDS
+ , FRV_INSN_CFMSUBS, FRV_INSN_NFMADDS, FRV_INSN_NFMSUBS, FRV_INSN_FMAS
+ , FRV_INSN_FMSS, FRV_INSN_FDMAS, FRV_INSN_FDMSS, FRV_INSN_NFDMAS
+ , FRV_INSN_NFDMSS, FRV_INSN_CFMAS, FRV_INSN_CFMSS, FRV_INSN_FMAD
+ , FRV_INSN_FMSD, FRV_INSN_NFMAS, FRV_INSN_NFMSS, FRV_INSN_FDADDS
+ , FRV_INSN_FDSUBS, FRV_INSN_FDMULS, FRV_INSN_FDDIVS, FRV_INSN_FDSADS
+ , FRV_INSN_FDMULCS, FRV_INSN_NFDMULCS, FRV_INSN_NFDADDS, FRV_INSN_NFDSUBS
+ , FRV_INSN_NFDMULS, FRV_INSN_NFDDIVS, FRV_INSN_NFDSADS, FRV_INSN_NFDCMPS
+ , FRV_INSN_MHSETLOS, FRV_INSN_MHSETHIS, FRV_INSN_MHDSETS, FRV_INSN_MHSETLOH
+ , FRV_INSN_MHSETHIH, FRV_INSN_MHDSETH, FRV_INSN_MAND, FRV_INSN_MOR
+ , FRV_INSN_MXOR, FRV_INSN_CMAND, FRV_INSN_CMOR, FRV_INSN_CMXOR
+ , FRV_INSN_MNOT, FRV_INSN_CMNOT, FRV_INSN_MROTLI, FRV_INSN_MROTRI
+ , FRV_INSN_MWCUT, FRV_INSN_MWCUTI, FRV_INSN_MCUT, FRV_INSN_MCUTI
+ , FRV_INSN_MCUTSS, FRV_INSN_MCUTSSI, FRV_INSN_MDCUTSSI, FRV_INSN_MAVEH
+ , FRV_INSN_MSLLHI, FRV_INSN_MSRLHI, FRV_INSN_MSRAHI, FRV_INSN_MDROTLI
+ , FRV_INSN_MCPLHI, FRV_INSN_MCPLI, FRV_INSN_MSATHS, FRV_INSN_MQSATHS
+ , FRV_INSN_MSATHU, FRV_INSN_MCMPSH, FRV_INSN_MCMPUH, FRV_INSN_MABSHS
+ , FRV_INSN_MADDHSS, FRV_INSN_MADDHUS, FRV_INSN_MSUBHSS, FRV_INSN_MSUBHUS
+ , FRV_INSN_CMADDHSS, FRV_INSN_CMADDHUS, FRV_INSN_CMSUBHSS, FRV_INSN_CMSUBHUS
+ , FRV_INSN_MQADDHSS, FRV_INSN_MQADDHUS, FRV_INSN_MQSUBHSS, FRV_INSN_MQSUBHUS
+ , FRV_INSN_CMQADDHSS, FRV_INSN_CMQADDHUS, FRV_INSN_CMQSUBHSS, FRV_INSN_CMQSUBHUS
+ , FRV_INSN_MADDACCS, FRV_INSN_MSUBACCS, FRV_INSN_MDADDACCS, FRV_INSN_MDSUBACCS
+ , FRV_INSN_MASACCS, FRV_INSN_MDASACCS, FRV_INSN_MMULHS, FRV_INSN_MMULHU
+ , FRV_INSN_MMULXHS, FRV_INSN_MMULXHU, FRV_INSN_CMMULHS, FRV_INSN_CMMULHU
+ , FRV_INSN_MQMULHS, FRV_INSN_MQMULHU, FRV_INSN_MQMULXHS, FRV_INSN_MQMULXHU
+ , FRV_INSN_CMQMULHS, FRV_INSN_CMQMULHU, FRV_INSN_MMACHS, FRV_INSN_MMACHU
+ , FRV_INSN_MMRDHS, FRV_INSN_MMRDHU, FRV_INSN_CMMACHS, FRV_INSN_CMMACHU
+ , FRV_INSN_MQMACHS, FRV_INSN_MQMACHU, FRV_INSN_CMQMACHS, FRV_INSN_CMQMACHU
+ , FRV_INSN_MQXMACHS, FRV_INSN_MQXMACXHS, FRV_INSN_MQMACXHS, FRV_INSN_MCPXRS
+ , FRV_INSN_MCPXRU, FRV_INSN_MCPXIS, FRV_INSN_MCPXIU, FRV_INSN_CMCPXRS
+ , FRV_INSN_CMCPXRU, FRV_INSN_CMCPXIS, FRV_INSN_CMCPXIU, FRV_INSN_MQCPXRS
+ , FRV_INSN_MQCPXRU, FRV_INSN_MQCPXIS, FRV_INSN_MQCPXIU, FRV_INSN_MEXPDHW
+ , FRV_INSN_CMEXPDHW, FRV_INSN_MEXPDHD, FRV_INSN_CMEXPDHD, FRV_INSN_MPACKH
+ , FRV_INSN_MDPACKH, FRV_INSN_MUNPACKH, FRV_INSN_MDUNPACKH, FRV_INSN_MBTOH
+ , FRV_INSN_CMBTOH, FRV_INSN_MHTOB, FRV_INSN_CMHTOB, FRV_INSN_MBTOHE
+ , FRV_INSN_CMBTOHE, FRV_INSN_MNOP, FRV_INSN_MCLRACC_0, FRV_INSN_MCLRACC_1
+ , FRV_INSN_MRDACC, FRV_INSN_MRDACCG, FRV_INSN_MWTACC, FRV_INSN_MWTACCG
+ , FRV_INSN_MCOP1, FRV_INSN_MCOP2, FRV_INSN_FNOP
} CGEN_INSN_TYPE;
/* Index of `invalid' insn place holder. */
diff --git a/opcodes/m68hc11-dis.c b/opcodes/m68hc11-dis.c
index cf42b64..e2373cf 100644
--- a/opcodes/m68hc11-dis.c
+++ b/opcodes/m68hc11-dis.c
@@ -1,5 +1,5 @@
/* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
- Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+ Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@nerim.fr)
This program is free software; you can redistribute it and/or modify
@@ -39,19 +39,14 @@ static const char *const reg_dst_table[] = {
#define OP_PAGE_MASK (M6811_OP_PAGE2|M6811_OP_PAGE3|M6811_OP_PAGE4)
/* Prototypes for local functions. */
-static int read_memory
- PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
-static int print_indexed_operand
- PARAMS ((bfd_vma, struct disassemble_info *, int*, int, int, bfd_vma));
-static int print_insn
- PARAMS ((bfd_vma, struct disassemble_info *, int));
+static int read_memory (bfd_vma, bfd_byte *, int, struct disassemble_info *);
+static int print_indexed_operand (bfd_vma, struct disassemble_info *,
+ int*, int, int, bfd_vma);
+static int print_insn (bfd_vma, struct disassemble_info *, int);
static int
-read_memory (memaddr, buffer, size, info)
- bfd_vma memaddr;
- bfd_byte *buffer;
- int size;
- struct disassemble_info *info;
+read_memory (bfd_vma memaddr, bfd_byte* buffer, int size,
+ struct disassemble_info* info)
{
int status;
@@ -70,13 +65,9 @@ read_memory (memaddr, buffer, size, info)
/* Read the 68HC12 indexed operand byte and print the corresponding mode.
Returns the number of bytes read or -1 if failure. */
static int
-print_indexed_operand (memaddr, info, indirect, mov_insn, pc_offset, endaddr)
- bfd_vma memaddr;
- struct disassemble_info *info;
- int *indirect;
- int mov_insn;
- int pc_offset;
- bfd_vma endaddr;
+print_indexed_operand (bfd_vma memaddr, struct disassemble_info* info,
+ int* indirect, int mov_insn, int pc_offset,
+ bfd_vma endaddr)
{
bfd_byte buffer[4];
int reg;
@@ -231,10 +222,7 @@ print_indexed_operand (memaddr, info, indirect, mov_insn, pc_offset, endaddr)
/* Disassemble one instruction at address 'memaddr'. Returns the number
of bytes used by that instruction. */
static int
-print_insn (memaddr, info, arch)
- bfd_vma memaddr;
- struct disassemble_info *info;
- int arch;
+print_insn (bfd_vma memaddr, struct disassemble_info* info, int arch)
{
int status;
bfd_byte buffer[4];
@@ -324,7 +312,7 @@ print_insn (memaddr, info, arch)
{
int offset;
int pc_src_offset;
- int pc_dst_offset;
+ int pc_dst_offset = 0;
if ((opcode->arch & arch) == 0)
continue;
@@ -717,7 +705,7 @@ print_insn (memaddr, info, arch)
/* Opcode not recognized. */
if (format == M6811_OP_PAGE2 && arch & cpu6812
- && ((code >= 0x30 && code <= 0x39) || (code >= 0x40 && code <= 0xff)))
+ && ((code >= 0x30 && code <= 0x39) || (code >= 0x40)))
(*info->fprintf_func) (info->stream, "trap\t#%d", code & 0x0ff);
else if (format == M6811_OP_PAGE2)
@@ -738,17 +726,13 @@ print_insn (memaddr, info, arch)
/* Disassemble one instruction at address 'memaddr'. Returns the number
of bytes used by that instruction. */
int
-print_insn_m68hc11 (memaddr, info)
- bfd_vma memaddr;
- struct disassemble_info *info;
+print_insn_m68hc11 (bfd_vma memaddr, struct disassemble_info* info)
{
return print_insn (memaddr, info, cpu6811);
}
int
-print_insn_m68hc12 (memaddr, info)
- bfd_vma memaddr;
- struct disassemble_info *info;
+print_insn_m68hc12 (bfd_vma memaddr, struct disassemble_info* info)
{
return print_insn (memaddr, info, cpu6812);
}
diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c
index 12c0b94..bfd8c89 100644
--- a/opcodes/m68k-dis.c
+++ b/opcodes/m68k-dis.c
@@ -1,21 +1,21 @@
/* Print Motorola 68k instructions.
Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
- 1998, 1999, 2000, 2001, 2002
+ 1998, 1999, 2000, 2001, 2002, 2003
Free Software Foundation, Inc.
-This file is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "sysdep.h"
#include "dis-asm.h"
@@ -263,6 +263,9 @@ print_insn_m68k (memaddr, info)
case bfd_mach_mcf5200:
arch_mask = mcf5200;
break;
+ case bfd_mach_mcf528x:
+ arch_mask = mcf528x;
+ break;
case bfd_mach_mcf5206e:
arch_mask = mcf5206e;
break;
@@ -342,7 +345,7 @@ print_insn_m68k (memaddr, info)
/* Point at first word of argument data,
and at descriptor for first argument. */
p = buffer + 2;
-
+
/* Figure out how long the fixed-size portion of the instruction is.
The only place this is stored in the opcode table is
in the arguments--look for arguments which specify fields in the 2nd
@@ -406,10 +409,10 @@ print_insn_m68k (memaddr, info)
}
FETCH_DATA (info, p);
-
+
d = best->args;
- /* We can the operands twice. The first time we don't print anything,
+ /* We scan the operands twice. The first time we don't print anything,
but look for errors. */
save_p = p;
@@ -537,12 +540,16 @@ print_insn_arg (d, buffer, p0, addr, info)
case 'J':
{
+ /* FIXME: There's a problem here, different m68k processors call the
+ same address different names. This table can't get it right
+ because it doesn't know which processor it's disassembling for. */
static const struct { char *name; int value; } names[]
= {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
{"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
{"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
{"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
{"%msp", 0x803}, {"%isp", 0x804},
+ {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these. */
/* Should we be calling this psr like we do in case 'Y'? */
{"%mmusr",0x805},
@@ -569,6 +576,14 @@ print_insn_arg (d, buffer, p0, addr, info)
(*info->fprintf_func) (info->stream, "#%d", val);
break;
+ case 'x':
+ val = fetch_arg (buffer, place, 3, info);
+ /* 0 means -1. */
+ if (val == 0)
+ val = -1;
+ (*info->fprintf_func) (info->stream, "#%d", val);
+ break;
+
case 'M':
if (place == 'h')
{
@@ -724,7 +739,7 @@ print_insn_arg (d, buffer, p0, addr, info)
case 'I':
/* Get coprocessor ID... */
val = fetch_arg (buffer, 'd', 3, info);
-
+
if (val != 1) /* Unusual coprocessor ID? */
(*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
break;
@@ -748,7 +763,10 @@ print_insn_arg (d, buffer, p0, addr, info)
case 'p':
case 'q':
case 'v':
-
+ case 'b':
+ case 'w':
+ case 'y':
+ case 'z':
if (place == 'd')
{
val = fetch_arg (buffer, 'x', 6, info);
@@ -1023,7 +1041,7 @@ print_insn_arg (d, buffer, p0, addr, info)
{
short is_upper = 0;
int reg = fetch_arg (buffer, place, 5, info);
-
+
if (reg & 0x10)
{
is_upper = 1;
@@ -1034,7 +1052,7 @@ print_insn_arg (d, buffer, p0, addr, info)
is_upper ? "u" : "l");
}
break;
-
+
default:
return -2;
}
@@ -1121,7 +1139,7 @@ fetch_arg (buffer, code, bits, info)
val = (buffer[2] << 8) + buffer[3];
val >>= 7;
break;
-
+
case '8':
FETCH_DATA (info, buffer + 3);
val = (buffer[2] << 8) + buffer[3];
@@ -1138,13 +1156,13 @@ fetch_arg (buffer, code, bits, info)
val = (buffer[1] >> 6);
break;
- case 'm':
+ case 'm':
val = (buffer[1] & 0x40 ? 0x8 : 0)
| ((buffer[0] >> 1) & 0x7)
| (buffer[3] & 0x80 ? 0x10 : 0);
break;
- case 'n':
+ case 'n':
val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
break;
diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index 79d7db0..8fa6c0e 100644
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -1,24 +1,24 @@
/* Opcode table for m680[012346]0/m6888[12]/m68851/mcf5200.
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001
+ 2000, 2001, 2003
Free Software Foundation, Inc.
-This file is part of GDB, GAS, and the GNU binutils.
+ This file is part of GDB, GAS, and the GNU binutils.
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
+ GDB, GAS, and the GNU binutils are free software; you can redistribute
+ them and/or modify them under the terms of the GNU General Public
+ License as published by the Free Software Foundation; either version
+ 1, or (at your option) any later version.
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
+ GDB, GAS, and the GNU binutils are distributed in the hope that they
+ will be useful, but WITHOUT ANY WARRANTY; without even the implied
+ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+ the GNU General Public License for more details.
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-02111-1307, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this file; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
#include "sysdep.h"
#include "opcode/m68k.h"
@@ -131,20 +131,20 @@ const struct m68k_opcode m68k_opcodes[] =
{"bgtw", one(0067000), one(0177777), "BW", m68000up | mcf },
{"blew", one(0067400), one(0177777), "BW", m68000up | mcf },
-{"bhil", one(0061377), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"blsl", one(0061777), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"bccl", one(0062377), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"bcsl", one(0062777), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"bnel", one(0063377), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"beql", one(0063777), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"bvcl", one(0064377), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"bvsl", one(0064777), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"bpll", one(0065377), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"bmil", one(0065777), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"bgel", one(0066377), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"bltl", one(0066777), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"bgtl", one(0067377), one(0177777), "BL", m68020up | cpu32 | mcf5407},
-{"blel", one(0067777), one(0177777), "BL", m68020up | cpu32 | mcf5407},
+{"bhil", one(0061377), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"blsl", one(0061777), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"bccl", one(0062377), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"bcsl", one(0062777), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"bnel", one(0063377), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"beql", one(0063777), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"bvcl", one(0064377), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"bvsl", one(0064777), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"bpll", one(0065377), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"bmil", one(0065777), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"bgel", one(0066377), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"bltl", one(0066777), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"bgtl", one(0067377), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
+{"blel", one(0067777), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
{"bhis", one(0061000), one(0177400), "BB", m68000up | mcf },
{"blss", one(0061400), one(0177400), "BB", m68000up | mcf },
@@ -180,8 +180,7 @@ const struct m68k_opcode m68k_opcodes[] =
{"bchg", one(0004100), one(0177700), "#b$s", m68000up },
{"bchg", one(0004100), one(0177700), "#bqs", mcf },
-{"bclr", one(0000600), one(0170700), "Dd$s", m68000up },
-{"bclr", one(0000600), one(0170700), "Ddvs", mcf },
+{"bclr", one(0000600), one(0170700), "Dd$s", m68000up | mcf },
{"bclr", one(0004200), one(0177700), "#b$s", m68000up },
{"bclr", one(0004200), one(0177700), "#bqs", mcf },
@@ -194,28 +193,32 @@ const struct m68k_opcode m68k_opcodes[] =
{"bfset", two(0167300, 0), two(0177700, 0170000), "?sO2O3", m68020up },
{"bftst", two(0164300, 0), two(0177700, 0170000), "/sO2O3", m68020up },
-{"bgnd", one(0045372), one(0177777), "", cpu32 },
+{"bgnd", one(0045372), one(0177777), "", cpu32 },
-{"bkpt", one(0044110), one(0177770), "ts", m68010up },
+{"bitrev", one(0000300), one(0177770), "Ds", mcf528x},
+
+{"bkpt", one(0044110), one(0177770), "ts", m68010up },
{"braw", one(0060000), one(0177777), "BW", m68000up | mcf },
-{"bral", one(0060377), one(0177777), "BL", m68020up | cpu32 | mcf5407},
+{"bral", one(0060377), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
{"bras", one(0060000), one(0177400), "BB", m68000up | mcf },
-{"bset", one(0000700), one(0170700), "Dd$s", m68000up },
+{"bset", one(0000700), one(0170700), "Dd$s", m68000up | mcf },
{"bset", one(0000700), one(0170700), "Ddvs", mcf },
{"bset", one(0004300), one(0177700), "#b$s", m68000up },
{"bset", one(0004300), one(0177700), "#bqs", mcf },
{"bsrw", one(0060400), one(0177777), "BW", m68000up | mcf },
-{"bsrl", one(0060777), one(0177777), "BL", m68020up | cpu32 | mcf5407},
+{"bsrl", one(0060777), one(0177777), "BL", m68020up | cpu32 | mcfv4up},
{"bsrs", one(0060400), one(0177400), "BB", m68000up | mcf },
{"btst", one(0000400), one(0170700), "Dd;b", m68000up | mcf },
{"btst", one(0004000), one(0177700), "#b@s", m68000up },
{"btst", one(0004000), one(0177700), "#bqs", mcf },
-{"callm", one(0003300), one(0177700), "#b!s", m68020 },
+{"byterev", one(0001300), one(0177770), "Ds", mcf528x},
+
+{"callm", one(0003300), one(0177700), "#b!s", m68020 },
{"cas2w", two(0006374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up },
{"cas2w", two(0006374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up },
@@ -261,9 +264,9 @@ const struct m68k_opcode m68k_opcodes[] =
{"cmpal", one(0130700), one(0170700), "*lAd", m68000up | mcf },
{"cmpib", one(0006000), one(0177700), "#b@s", m68000up },
-{"cmpib", one(0006000), one(0177700), "#bDs", mcf5407 },
+{"cmpib", one(0006000), one(0177700), "#bDs", mcfv4up },
{"cmpiw", one(0006100), one(0177700), "#w@s", m68000up },
-{"cmpiw", one(0006100), one(0177700), "#wDs", mcf5407 },
+{"cmpiw", one(0006100), one(0177700), "#wDs", mcfv4up },
{"cmpil", one(0006200), one(0177700), "#l@s", m68000up },
{"cmpil", one(0006200), one(0177700), "#lDs", mcf },
@@ -273,15 +276,15 @@ const struct m68k_opcode m68k_opcodes[] =
/* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */
{"cmpb", one(0006000), one(0177700), "#b@s", m68000up },
-{"cmpb", one(0006000), one(0177700), "#bDs", mcf5407 },
+{"cmpb", one(0006000), one(0177700), "#bDs", mcfv4up },
{"cmpb", one(0130410), one(0170770), "+s+d", m68000up },
{"cmpb", one(0130000), one(0170700), ";bDd", m68000up },
-{"cmpb", one(0130000), one(0170700), "*bDd", mcf5407 },
+{"cmpb", one(0130000), one(0170700), "*bDd", mcfv4up },
{"cmpw", one(0130300), one(0170700), "*wAd", m68000up },
{"cmpw", one(0006100), one(0177700), "#w@s", m68000up },
-{"cmpw", one(0006100), one(0177700), "#wDs", mcf5407 },
+{"cmpw", one(0006100), one(0177700), "#wDs", mcfv4up },
{"cmpw", one(0130510), one(0170770), "+s+d", m68000up },
-{"cmpw", one(0130100), one(0170700), "*wDd", m68000up | mcf5407 },
+{"cmpw", one(0130100), one(0170700), "*wDd", m68000up | mcfv4up },
{"cmpl", one(0130700), one(0170700), "*lAd", m68000up | mcf },
{"cmpl", one(0006200), one(0177700), "#l@s", m68000up },
{"cmpl", one(0006200), one(0177700), "#lDs", mcf },
@@ -305,20 +308,20 @@ const struct m68k_opcode m68k_opcodes[] =
{"dbvc", one(0054310), one(0177770), "DsBw", m68000up },
{"dbvs", one(0054710), one(0177770), "DsBw", m68000up },
-{"divsw", one(0100700), one(0170700), ";wDd", m68000up | mcf5307up | mcf5206e },
+{"divsw", one(0100700), one(0170700), ";wDd", m68000up | mcf5206eup },
{"divsl", two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
{"divsl", two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 },
-{"divsl", two(0046100,0004000),two(0177700,0107770),"qsDD", mcf5307up | mcf5206e },
+{"divsl", two(0046100,0004000),two(0177700,0107770),"qsDD", mcf5206eup },
{"divsll", two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
{"divsll", two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 },
-{"divuw", one(0100300), one(0170700), ";wDd", m68000up | mcf5307up | mcf5206e },
+{"divuw", one(0100300), one(0170700), ";wDd", m68000up | mcf5206eup },
{"divul", two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
{"divul", two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 },
-{"divul", two(0046100,0000000),two(0177700,0107770),"qsDD", mcf5307up | mcf5206e },
+{"divul", two(0046100,0000000),two(0177700,0107770),"qsDD", mcf5206eup },
{"divull", two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
{"divull", two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 },
@@ -357,33 +360,56 @@ const struct m68k_opcode m68k_opcodes[] =
{"extl", one(0044300), one(0177770), "Ds", m68000up|mcf },
{"extbl", one(0044700), one(0177770), "Ds", m68020up|cpu32|mcf },
+{"ff1", one(0002300), one(0177770), "Ds", mcf528x},
+
/* float stuff starts here */
{"fabsb", two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
+{"fabsb", two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fabsd", two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fabsd", two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fabsd", two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
+{"fabsd", two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fabsl", two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
+{"fabsl", two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fabsp", two(0xF000, 0x4C18), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
+{"fabss", two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", cfloat },
{"fabss", two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
{"fabsw", two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
+{"fabsw", two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fabsx", two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fabsx", two(0xF000, 0x4818), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fabsx", two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt", mfloat },
{"fsabsb", two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fsabsb", two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsabsd", two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fsabsd", two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fsabsd", two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fsabsd", two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fsabsl", two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fsabsl", two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsabsp", two(0xF000, 0x4C58), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
+{"fsabss", two(0xF000, 0x4258), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsabss", two(0xF000, 0x4458), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
{"fsabsw", two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fsabsw", two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsabsx", two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fsabsx", two(0xF000, 0x4858), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fsabsx", two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt", m68040up },
+{"fdabsb", two(0xF000, 0x585C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdabsb", two(0xF000, 0x585c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up},
+{"fdabsd", two(0xF000, 0x005C), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fdabsd", two(0xF000, 0x005C), two(0xF1C0, 0xE07F), "IiFt", cfloat },
+{"fdabsd", two(0xF000, 0x545C), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdabsd", two(0xF000, 0x545c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up},
+{"fdabsl", two(0xF000, 0x405C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdabsl", two(0xF000, 0x405c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up},
{"fdabsp", two(0xF000, 0x4C5c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up},
+{"fdabss", two(0xF000, 0x425C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdabss", two(0xF000, 0x445c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up},
+{"fdabsw", two(0xF000, 0x505C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdabsw", two(0xF000, 0x505c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up},
{"fdabsx", two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up},
{"fdabsx", two(0xF000, 0x485c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up},
@@ -400,28 +426,47 @@ const struct m68k_opcode m68k_opcodes[] =
{"facosx", two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiFt", mfloat },
{"faddb", two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
+{"faddb", two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"faddd", two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"faddd", two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"faddd", two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
+{"faddd", two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"faddl", two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
+{"faddl", two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"faddp", two(0xF000, 0x4C22), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fadds", two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
+{"fadds", two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"faddw", two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
+{"faddw", two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"faddx", two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"faddx", two(0xF000, 0x4822), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fsaddb", two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fsaddb", two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsaddd", two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fsaddd", two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fsaddd", two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fsaddl", two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fsaddl", two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsaddp", two(0xF000, 0x4C62), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fsadds", two(0xF000, 0x4462), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fsadds", two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsaddw", two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fsaddw", two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsaddx", two(0xF000, 0x0062), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fsaddx", two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
+{"fdaddb", two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdaddb", two(0xF000, 0x5866), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fdaddd", two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fdaddd", two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdaddd", two(0xF000, 0x5466), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fdaddl", two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdaddl", two(0xF000, 0x4066), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fdaddp", two(0xF000, 0x4C66), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fdadds", two(0xF000, 0x4466), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fdadds", two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdaddw", two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdaddw", two(0xF000, 0x5066), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fdaddx", two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdaddx", two(0xF000, 0x4866), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
@@ -456,111 +501,117 @@ const struct m68k_opcode m68k_opcodes[] =
{"fatanhx", two(0xF000, 0x480D), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fatanhx", two(0xF000, 0x000D), two(0xF1C0, 0xE07F), "IiFt", mfloat },
-{"fbeq", one(0xF081), one(0xF1FF), "IdBW", mfloat },
-{"fbf", one(0xF080), one(0xF1FF), "IdBW", mfloat },
-{"fbge", one(0xF093), one(0xF1FF), "IdBW", mfloat },
-{"fbgl", one(0xF096), one(0xF1FF), "IdBW", mfloat },
-{"fbgle", one(0xF097), one(0xF1FF), "IdBW", mfloat },
-{"fbgt", one(0xF092), one(0xF1FF), "IdBW", mfloat },
-{"fble", one(0xF095), one(0xF1FF), "IdBW", mfloat },
-{"fblt", one(0xF094), one(0xF1FF), "IdBW", mfloat },
-{"fbne", one(0xF08E), one(0xF1FF), "IdBW", mfloat },
-{"fbnge", one(0xF09C), one(0xF1FF), "IdBW", mfloat },
-{"fbngl", one(0xF099), one(0xF1FF), "IdBW", mfloat },
-{"fbngle", one(0xF098), one(0xF1FF), "IdBW", mfloat },
-{"fbngt", one(0xF09D), one(0xF1FF), "IdBW", mfloat },
-{"fbnle", one(0xF09A), one(0xF1FF), "IdBW", mfloat },
-{"fbnlt", one(0xF09B), one(0xF1FF), "IdBW", mfloat },
-{"fboge", one(0xF083), one(0xF1FF), "IdBW", mfloat },
-{"fbogl", one(0xF086), one(0xF1FF), "IdBW", mfloat },
-{"fbogt", one(0xF082), one(0xF1FF), "IdBW", mfloat },
-{"fbole", one(0xF085), one(0xF1FF), "IdBW", mfloat },
-{"fbolt", one(0xF084), one(0xF1FF), "IdBW", mfloat },
-{"fbor", one(0xF087), one(0xF1FF), "IdBW", mfloat },
-{"fbseq", one(0xF091), one(0xF1FF), "IdBW", mfloat },
-{"fbsf", one(0xF090), one(0xF1FF), "IdBW", mfloat },
-{"fbsne", one(0xF09E), one(0xF1FF), "IdBW", mfloat },
-{"fbst", one(0xF09F), one(0xF1FF), "IdBW", mfloat },
-{"fbt", one(0xF08F), one(0xF1FF), "IdBW", mfloat },
-{"fbueq", one(0xF089), one(0xF1FF), "IdBW", mfloat },
-{"fbuge", one(0xF08B), one(0xF1FF), "IdBW", mfloat },
-{"fbugt", one(0xF08A), one(0xF1FF), "IdBW", mfloat },
-{"fbule", one(0xF08D), one(0xF1FF), "IdBW", mfloat },
-{"fbult", one(0xF08C), one(0xF1FF), "IdBW", mfloat },
-{"fbun", one(0xF088), one(0xF1FF), "IdBW", mfloat },
-
-{"fbeql", one(0xF0C1), one(0xF1FF), "IdBC", mfloat },
-{"fbfl", one(0xF0C0), one(0xF1FF), "IdBC", mfloat },
-{"fbgel", one(0xF0D3), one(0xF1FF), "IdBC", mfloat },
-{"fbgll", one(0xF0D6), one(0xF1FF), "IdBC", mfloat },
-{"fbglel", one(0xF0D7), one(0xF1FF), "IdBC", mfloat },
-{"fbgtl", one(0xF0D2), one(0xF1FF), "IdBC", mfloat },
-{"fblel", one(0xF0D5), one(0xF1FF), "IdBC", mfloat },
-{"fbltl", one(0xF0D4), one(0xF1FF), "IdBC", mfloat },
-{"fbnel", one(0xF0CE), one(0xF1FF), "IdBC", mfloat },
-{"fbngel", one(0xF0DC), one(0xF1FF), "IdBC", mfloat },
-{"fbngll", one(0xF0D9), one(0xF1FF), "IdBC", mfloat },
-{"fbnglel", one(0xF0D8), one(0xF1FF), "IdBC", mfloat },
-{"fbngtl", one(0xF0DD), one(0xF1FF), "IdBC", mfloat },
-{"fbnlel", one(0xF0DA), one(0xF1FF), "IdBC", mfloat },
-{"fbnltl", one(0xF0DB), one(0xF1FF), "IdBC", mfloat },
-{"fbogel", one(0xF0C3), one(0xF1FF), "IdBC", mfloat },
-{"fbogll", one(0xF0C6), one(0xF1FF), "IdBC", mfloat },
-{"fbogtl", one(0xF0C2), one(0xF1FF), "IdBC", mfloat },
-{"fbolel", one(0xF0C5), one(0xF1FF), "IdBC", mfloat },
-{"fboltl", one(0xF0C4), one(0xF1FF), "IdBC", mfloat },
-{"fborl", one(0xF0C7), one(0xF1FF), "IdBC", mfloat },
-{"fbseql", one(0xF0D1), one(0xF1FF), "IdBC", mfloat },
-{"fbsfl", one(0xF0D0), one(0xF1FF), "IdBC", mfloat },
-{"fbsnel", one(0xF0DE), one(0xF1FF), "IdBC", mfloat },
-{"fbstl", one(0xF0DF), one(0xF1FF), "IdBC", mfloat },
-{"fbtl", one(0xF0CF), one(0xF1FF), "IdBC", mfloat },
-{"fbueql", one(0xF0C9), one(0xF1FF), "IdBC", mfloat },
-{"fbugel", one(0xF0CB), one(0xF1FF), "IdBC", mfloat },
-{"fbugtl", one(0xF0CA), one(0xF1FF), "IdBC", mfloat },
-{"fbulel", one(0xF0CD), one(0xF1FF), "IdBC", mfloat },
-{"fbultl", one(0xF0CC), one(0xF1FF), "IdBC", mfloat },
-{"fbunl", one(0xF0C8), one(0xF1FF), "IdBC", mfloat },
-
-{"fjeq", one(0xF081), one(0xF1BF), "IdBc", mfloat },
-{"fjf", one(0xF080), one(0xF1BF), "IdBc", mfloat },
-{"fjge", one(0xF093), one(0xF1BF), "IdBc", mfloat },
-{"fjgl", one(0xF096), one(0xF1BF), "IdBc", mfloat },
-{"fjgle", one(0xF097), one(0xF1BF), "IdBc", mfloat },
-{"fjgt", one(0xF092), one(0xF1BF), "IdBc", mfloat },
-{"fjle", one(0xF095), one(0xF1BF), "IdBc", mfloat },
-{"fjlt", one(0xF094), one(0xF1BF), "IdBc", mfloat },
-{"fjne", one(0xF08E), one(0xF1BF), "IdBc", mfloat },
-{"fjnge", one(0xF09C), one(0xF1BF), "IdBc", mfloat },
-{"fjngl", one(0xF099), one(0xF1BF), "IdBc", mfloat },
-{"fjngle", one(0xF098), one(0xF1BF), "IdBc", mfloat },
-{"fjngt", one(0xF09D), one(0xF1BF), "IdBc", mfloat },
-{"fjnle", one(0xF09A), one(0xF1BF), "IdBc", mfloat },
-{"fjnlt", one(0xF09B), one(0xF1BF), "IdBc", mfloat },
-{"fjoge", one(0xF083), one(0xF1BF), "IdBc", mfloat },
-{"fjogl", one(0xF086), one(0xF1BF), "IdBc", mfloat },
-{"fjogt", one(0xF082), one(0xF1BF), "IdBc", mfloat },
-{"fjole", one(0xF085), one(0xF1BF), "IdBc", mfloat },
-{"fjolt", one(0xF084), one(0xF1BF), "IdBc", mfloat },
-{"fjor", one(0xF087), one(0xF1BF), "IdBc", mfloat },
-{"fjseq", one(0xF091), one(0xF1BF), "IdBc", mfloat },
-{"fjsf", one(0xF090), one(0xF1BF), "IdBc", mfloat },
-{"fjsne", one(0xF09E), one(0xF1BF), "IdBc", mfloat },
-{"fjst", one(0xF09F), one(0xF1BF), "IdBc", mfloat },
-{"fjt", one(0xF08F), one(0xF1BF), "IdBc", mfloat },
-{"fjueq", one(0xF089), one(0xF1BF), "IdBc", mfloat },
-{"fjuge", one(0xF08B), one(0xF1BF), "IdBc", mfloat },
-{"fjugt", one(0xF08A), one(0xF1BF), "IdBc", mfloat },
-{"fjule", one(0xF08D), one(0xF1BF), "IdBc", mfloat },
-{"fjult", one(0xF08C), one(0xF1BF), "IdBc", mfloat },
-{"fjun", one(0xF088), one(0xF1BF), "IdBc", mfloat },
-
+{"fbeq", one(0xF081), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbf", one(0xF080), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbge", one(0xF093), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbgl", one(0xF096), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbgle", one(0xF097), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbgt", one(0xF092), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fble", one(0xF095), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fblt", one(0xF094), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbne", one(0xF08E), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbnge", one(0xF09C), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbngl", one(0xF099), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbngle", one(0xF098), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbngt", one(0xF09D), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbnle", one(0xF09A), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbnlt", one(0xF09B), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fboge", one(0xF083), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbogl", one(0xF086), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbogt", one(0xF082), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbole", one(0xF085), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbolt", one(0xF084), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbor", one(0xF087), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbseq", one(0xF091), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbsf", one(0xF090), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbsne", one(0xF09E), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbst", one(0xF09F), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbt", one(0xF08F), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbueq", one(0xF089), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbuge", one(0xF08B), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbugt", one(0xF08A), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbule", one(0xF08D), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbult", one(0xF08C), one(0xF1FF), "IdBW", mfloat | cfloat },
+{"fbun", one(0xF088), one(0xF1FF), "IdBW", mfloat | cfloat },
+
+{"fbeql", one(0xF0C1), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbfl", one(0xF0C0), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbgel", one(0xF0D3), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbgll", one(0xF0D6), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbglel", one(0xF0D7), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbgtl", one(0xF0D2), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fblel", one(0xF0D5), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbltl", one(0xF0D4), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbnel", one(0xF0CE), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbngel", one(0xF0DC), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbngll", one(0xF0D9), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbnglel", one(0xF0D8), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbngtl", one(0xF0DD), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbnlel", one(0xF0DA), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbnltl", one(0xF0DB), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbogel", one(0xF0C3), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbogll", one(0xF0C6), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbogtl", one(0xF0C2), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbolel", one(0xF0C5), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fboltl", one(0xF0C4), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fborl", one(0xF0C7), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbseql", one(0xF0D1), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbsfl", one(0xF0D0), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbsnel", one(0xF0DE), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbstl", one(0xF0DF), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbtl", one(0xF0CF), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbueql", one(0xF0C9), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbugel", one(0xF0CB), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbugtl", one(0xF0CA), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbulel", one(0xF0CD), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbultl", one(0xF0CC), one(0xF1FF), "IdBC", mfloat | cfloat },
+{"fbunl", one(0xF0C8), one(0xF1FF), "IdBC", mfloat | cfloat },
+
+{"fjeq", one(0xF081), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjf", one(0xF080), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjge", one(0xF093), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjgl", one(0xF096), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjgle", one(0xF097), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjgt", one(0xF092), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjle", one(0xF095), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjlt", one(0xF094), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjne", one(0xF08E), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjnge", one(0xF09C), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjngl", one(0xF099), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjngle", one(0xF098), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjngt", one(0xF09D), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjnle", one(0xF09A), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjnlt", one(0xF09B), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjoge", one(0xF083), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjogl", one(0xF086), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjogt", one(0xF082), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjole", one(0xF085), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjolt", one(0xF084), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjor", one(0xF087), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjseq", one(0xF091), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjsf", one(0xF090), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjsne", one(0xF09E), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjst", one(0xF09F), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjt", one(0xF08F), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjueq", one(0xF089), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjuge", one(0xF08B), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjugt", one(0xF08A), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjule", one(0xF08D), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjult", one(0xF08C), one(0xF1BF), "IdBc", mfloat | cfloat },
+{"fjun", one(0xF088), one(0xF1BF), "IdBc", mfloat | cfloat },
+
+{"fcmpb", two(0xF000, 0x5838), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fcmpb", two(0xF000, 0x5838), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
{"fcmpd", two(0xF000, 0x5438), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
+{"fcmpd", two(0xF000, 0x5438), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
+{"fcmpd", two(0xF000, 0x0038), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fcmpl", two(0xF000, 0x4038), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
+{"fcmpl", two(0xF000, 0x4038), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fcmpp", two(0xF000, 0x4C38), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fcmps", two(0xF000, 0x4438), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
+{"fcmps", two(0xF000, 0x4438), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fcmpw", two(0xF000, 0x5038), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
+{"fcmpw", two(0xF000, 0x5038), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fcmpx", two(0xF000, 0x0038), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fcmpx", two(0xF000, 0x4838), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
@@ -618,29 +669,47 @@ const struct m68k_opcode m68k_opcodes[] =
{"fdbun", two(0xF048, 0x0008), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
{"fdivb", two(0xF000, 0x5820), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
+{"fdivb", two(0xF000, 0x5820), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdivd", two(0xF000, 0x0020), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fdivd", two(0xF000, 0x5420), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
+{"fdivd", two(0xF000, 0x5420), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdivl", two(0xF000, 0x4020), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
+{"fdivl", two(0xF000, 0x4020), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdivp", two(0xF000, 0x4C20), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fdivs", two(0xF000, 0x4420), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
+{"fdivs", two(0xF000, 0x4420), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdivw", two(0xF000, 0x5020), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
+{"fdivw", two(0xF000, 0x5020), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdivx", two(0xF000, 0x0020), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fdivx", two(0xF000, 0x4820), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fsdivb", two(0xF000, 0x5860), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fsdivb", two(0xF000, 0x5860), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsdivd", two(0xF000, 0x0060), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fsdivd", two(0xF000, 0x5460), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fsdivd", two(0xF000, 0x5460), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fsdivl", two(0xF000, 0x4060), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fsdivl", two(0xF000, 0x4060), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsdivp", two(0xF000, 0x4C60), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fsdivs", two(0xF000, 0x4460), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fsdivs", two(0xF000, 0x4460), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsdivw", two(0xF000, 0x5060), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fsdivw", two(0xF000, 0x5060), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsdivx", two(0xF000, 0x0060), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fsdivx", two(0xF000, 0x4860), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fddivb", two(0xF000, 0x5864), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fddivb", two(0xF000, 0x5864), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fddivd", two(0xF000, 0x0064), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fddivd", two(0xF000, 0x5464), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fddivd", two(0xF000, 0x5464), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fddivl", two(0xF000, 0x4064), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fddivl", two(0xF000, 0x4064), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fddivp", two(0xF000, 0x4C64), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fddivs", two(0xF000, 0x4464), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fddivs", two(0xF000, 0x4464), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fddivw", two(0xF000, 0x5064), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fddivw", two(0xF000, 0x5064), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fddivx", two(0xF000, 0x0064), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fddivx", two(0xF000, 0x4864), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
@@ -685,21 +754,35 @@ const struct m68k_opcode m68k_opcodes[] =
{"fgetmanx", two(0xF000, 0x001F), two(0xF1C0, 0xE07F), "IiFt", mfloat },
{"fintb", two(0xF000, 0x5801), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
+{"fintb", two(0xF000, 0x5801), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fintd", two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fintd", two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fintd", two(0xF000, 0x5401), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
+{"fintd", two(0xF000, 0x5401), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fintl", two(0xF000, 0x4001), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
+{"fintl", two(0xF000, 0x4001), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fintp", two(0xF000, 0x4C01), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fints", two(0xF000, 0x4401), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
+{"fints", two(0xF000, 0x4401), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fintw", two(0xF000, 0x5001), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
+{"fintw", two(0xF000, 0x5001), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fintx", two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fintx", two(0xF000, 0x4801), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fintx", two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiFt", mfloat },
{"fintrzb", two(0xF000, 0x5803), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
+{"fintrzb", two(0xF000, 0x5803), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fintrzd", two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fintrzd", two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fintrzd", two(0xF000, 0x5403), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
+{"fintrzd", two(0xF000, 0x5403), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fintrzl", two(0xF000, 0x4003), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
+{"fintrzl", two(0xF000, 0x4003), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fintrzp", two(0xF000, 0x4C03), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fintrzs", two(0xF000, 0x4403), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
+{"fintrzs", two(0xF000, 0x4403), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fintrzw", two(0xF000, 0x5003), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
+{"fintrzw", two(0xF000, 0x5003), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fintrzx", two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fintrzx", two(0xF000, 0x4803), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fintrzx", two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiFt", mfloat },
@@ -753,47 +836,88 @@ const struct m68k_opcode m68k_opcodes[] =
{"fmodx", two(0xF000, 0x0021), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fmodx", two(0xF000, 0x4821), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
+{"fmoveb", two(0xF000, 0x5800), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fmoveb", two(0xF000, 0x7800), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat },
{"fmoveb", two(0xF000, 0x5800), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
{"fmoveb", two(0xF000, 0x7800), two(0xF1C0, 0xFC7F), "IiF7$b", mfloat },
{"fmoved", two(0xF000, 0x5400), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
{"fmoved", two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7~F", mfloat },
+{"fmoved", two(0xF000, 0x0000), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fmoved", two(0xF000, 0x5400), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
+{"fmoved", two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat },
{"fmovel", two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
{"fmovel", two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7$l", mfloat },
/* FIXME: the next two variants should not permit moving an address
register to anything but the floating point instruction register. */
{"fmovel", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
{"fmovel", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ls8", mfloat },
+{"fmovel", two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fmovel", two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat },
+ /* Move the FP control registers */
+{"fmovel", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8ps", cfloat },
+{"fmovel", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Iibss8", cfloat },
{"fmovep", two(0xF000, 0x4C00), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fmovep", two(0xF000, 0x6C00), two(0xF1C0, 0xFC00), "IiF7~pkC", mfloat },
{"fmovep", two(0xF000, 0x7C00), two(0xF1C0, 0xFC0F), "IiF7~pDk", mfloat },
{"fmoves", two(0xF000, 0x4400), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
{"fmoves", two(0xF000, 0x6400), two(0xF1C0, 0xFC7F), "IiF7$f", mfloat },
+{"fmoves", two(0xF000, 0x4400), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fmoves", two(0xF000, 0x6400), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
{"fmovew", two(0xF000, 0x5000), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
{"fmovew", two(0xF000, 0x7000), two(0xF1C0, 0xFC7F), "IiF7$w", mfloat },
+{"fmovew", two(0xF000, 0x5000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fmovew", two(0xF000, 0x7000), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
{"fmovex", two(0xF000, 0x0000), two(0xF1FF, 0xE07F), "IiF8F7", mfloat },
{"fmovex", two(0xF000, 0x4800), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fmovex", two(0xF000, 0x6800), two(0xF1C0, 0xFC7F), "IiF7~x", mfloat },
{"fsmoveb", two(0xF000, 0x5840), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fsmoveb", two(0xF000, 0x5840), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsmoveb", two(0xF000, 0x7840), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
+{"fsmoved", two(0xF000, 0x0040), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fsmoved", two(0xF000, 0x5440), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fsmoved", two(0xF000, 0x5440), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
+{"fsmoved", two(0xF000, 0x7440), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat },
{"fsmovel", two(0xF000, 0x4040), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fsmovel", two(0xF000, 0x4040), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsmovel", two(0xF000, 0x6040), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
{"fsmoves", two(0xF000, 0x4440), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fsmoves", two(0xF000, 0x4440), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsmoves", two(0xF000, 0x6440), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
{"fsmovew", two(0xF000, 0x5040), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fsmovew", two(0xF000, 0x5040), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsmovew", two(0xF000, 0x7040), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
{"fsmovex", two(0xF000, 0x0040), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fsmovex", two(0xF000, 0x4840), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fsmovep", two(0xF000, 0x4C40), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fdmoveb", two(0xF000, 0x5844), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fdmoveb", two(0xF000, 0x5844), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdmoveb", two(0xF000, 0x7844), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
+{"fdmoved", two(0xF000, 0x0044), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fdmoved", two(0xF000, 0x5444), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fdmoved", two(0xF000, 0x5444), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
+{"fdmoved", two(0xF000, 0x7444), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
{"fdmovel", two(0xF000, 0x4044), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fdmovel", two(0xF000, 0x4044), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdmovel", two(0xF000, 0x6044), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
{"fdmoves", two(0xF000, 0x4444), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fdmoves", two(0xF000, 0x4444), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdmoves", two(0xF000, 0x6444), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
{"fdmovew", two(0xF000, 0x5044), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fdmovew", two(0xF000, 0x5044), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdmovew", two(0xF000, 0x7044), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
{"fdmovex", two(0xF000, 0x0044), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdmovex", two(0xF000, 0x4844), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fdmovep", two(0xF000, 0x4C44), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fmovecrx", two(0xF000, 0x5C00), two(0xF1FF, 0xFC00), "Ii#CF7", mfloat },
+{"fmovemd", two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizsl3", cfloat },
+{"fmovemd", two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat },
+{"fmovemd", two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat },
+{"fmovemd", two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Iil3ys", cfloat },
+
{"fmovemx", two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat },
{"fmovemx", two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat },
{"fmovemx", two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat },
@@ -814,6 +938,11 @@ const struct m68k_opcode m68k_opcodes[] =
target is a single %fpiar. */
{"fmoveml", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*lL8", mfloat },
+{"fmovem", two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "IizsL3", cfloat },
+{"fmovem", two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat },
+{"fmovem", two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat },
+{"fmovem", two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "IiL3ys", cfloat },
+
{"fmovem", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat },
{"fmovem", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat },
{"fmovem", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat },
@@ -832,63 +961,102 @@ const struct m68k_opcode m68k_opcodes[] =
{"fmovem", two(0xF000, 0x8000), two(0xF2C0, 0xE3FF), "Ii*sL8", mfloat },
{"fmulb", two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
+{"fmulb", two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fmuld", two(0xF000, 0x0023), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fmuld", two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
+{"fmuld", two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fmull", two(0xF000, 0x4023), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
+{"fmull", two(0xF000, 0x4023), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fmulp", two(0xF000, 0x4C23), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fmuls", two(0xF000, 0x4423), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
+{"fmuls", two(0xF000, 0x4423), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fmulw", two(0xF000, 0x5023), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
+{"fmulw", two(0xF000, 0x5023), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fmulx", two(0xF000, 0x0023), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fmulx", two(0xF000, 0x4823), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fsmulb", two(0xF000, 0x5863), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fsmulb", two(0xF000, 0x5863), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsmuld", two(0xF000, 0x0063), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fsmuld", two(0xF000, 0x5463), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fsmuld", two(0xF000, 0x5463), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fsmull", two(0xF000, 0x4063), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fsmull", two(0xF000, 0x4063), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsmulp", two(0xF000, 0x4C63), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fsmuls", two(0xF000, 0x4463), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fsmuls", two(0xF000, 0x4463), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsmulw", two(0xF000, 0x5063), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fsmulw", two(0xF000, 0x5063), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsmulx", two(0xF000, 0x0063), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fsmulx", two(0xF000, 0x4863), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fdmulb", two(0xF000, 0x5867), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fdmulb", two(0xF000, 0x5867), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdmuld", two(0xF000, 0x0067), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fdmuld", two(0xF000, 0x5467), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fdmuld", two(0xF000, 0x5467), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdmull", two(0xF000, 0x4067), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fdmull", two(0xF000, 0x4067), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdmulp", two(0xF000, 0x4C67), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fdmuls", two(0xF000, 0x4467), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fdmuls", two(0xF000, 0x4467), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdmulw", two(0xF000, 0x5067), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fdmulw", two(0xF000, 0x5067), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdmulx", two(0xF000, 0x0067), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdmulx", two(0xF000, 0x4867), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fnegb", two(0xF000, 0x581A), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
+{"fnegb", two(0xF000, 0x581A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fnegd", two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fnegd", two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fnegd", two(0xF000, 0x541A), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
+{"fnegd", two(0xF000, 0x541A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fnegl", two(0xF000, 0x401A), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
+{"fnegl", two(0xF000, 0x401A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fnegp", two(0xF000, 0x4C1A), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fnegs", two(0xF000, 0x441A), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
+{"fnegs", two(0xF000, 0x441A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fnegw", two(0xF000, 0x501A), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
+{"fnegw", two(0xF000, 0x501A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fnegx", two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fnegx", two(0xF000, 0x481A), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fnegx", two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiFt", mfloat },
{"fsnegb", two(0xF000, 0x585A), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fsnegb", two(0xF000, 0x585A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsnegd", two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fsnegd", two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fsnegd", two(0xF000, 0x545A), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fsnegd", two(0xF000, 0x545A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fsnegl", two(0xF000, 0x405A), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fsnegl", two(0xF000, 0x405A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsnegp", two(0xF000, 0x4C5A), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fsnegs", two(0xF000, 0x445A), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fsnegs", two(0xF000, 0x445A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsnegw", two(0xF000, 0x505A), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fsnegw", two(0xF000, 0x505A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsnegx", two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fsnegx", two(0xF000, 0x485A), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fsnegx", two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiFt", m68040up },
{"fdnegb", two(0xF000, 0x585E), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fdnegb", two(0xF000, 0x585E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdnegd", two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fdnegd", two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fdnegd", two(0xF000, 0x545E), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fdnegd", two(0xF000, 0x545E), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdnegl", two(0xF000, 0x405E), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fdnegl", two(0xF000, 0x405E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdnegp", two(0xF000, 0x4C5E), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fdnegs", two(0xF000, 0x445E), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fdnegs", two(0xF000, 0x445E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdnegw", two(0xF000, 0x505E), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fdnegw", two(0xF000, 0x505E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdnegx", two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdnegx", two(0xF000, 0x485E), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fdnegx", two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiFt", m68040up },
-{"fnop", two(0xF280, 0x0000), two(0xFFFF, 0xFFFF), "Ii", mfloat },
+{"fnop", two(0xF280, 0x0000), two(0xFFFF, 0xFFFF), "Ii", mfloat | cfloat },
{"fremb", two(0xF000, 0x5825), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
{"fremd", two(0xF000, 0x5425), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
@@ -900,8 +1068,10 @@ const struct m68k_opcode m68k_opcodes[] =
{"fremx", two(0xF000, 0x4825), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"frestore", one(0xF140), one(0xF1C0), "Id<s", mfloat },
+{"frestore", one(0xF140), one(0xF1C0), "Idys", cfloat },
{"fsave", one(0xF100), one(0xF1C0), "Id>s", mfloat },
+{"fsave", one(0xF100), one(0xF1C0), "Idzs", cfloat },
{"fscaleb", two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
{"fscaled", two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
@@ -998,60 +1168,98 @@ const struct m68k_opcode m68k_opcodes[] =
{"fsinhx", two(0xF000, 0x0002), two(0xF1C0, 0xE07F), "IiFt", mfloat },
{"fsqrtb", two(0xF000, 0x5804), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
+{"fsqrtb", two(0xF000, 0x5804), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsqrtd", two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fsqrtd", two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fsqrtd", two(0xF000, 0x5404), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
+{"fsqrtd", two(0xF000, 0x5404), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fsqrtl", two(0xF000, 0x4004), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
+{"fsqrtl", two(0xF000, 0x4004), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsqrtp", two(0xF000, 0x4C04), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fsqrts", two(0xF000, 0x4404), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
+{"fsqrts", two(0xF000, 0x4404), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsqrtw", two(0xF000, 0x5004), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
+{"fsqrtw", two(0xF000, 0x5004), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsqrtx", two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fsqrtx", two(0xF000, 0x4804), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fsqrtx", two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiFt", mfloat },
{"fssqrtb", two(0xF000, 0x5841), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fssqrtb", two(0xF000, 0x5841), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fssqrtd", two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fssqrtd", two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fssqrtd", two(0xF000, 0x5441), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fssqrtd", two(0xF000, 0x5441), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fssqrtl", two(0xF000, 0x4041), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fssqrtl", two(0xF000, 0x4041), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fssqrtp", two(0xF000, 0x4C41), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fssqrts", two(0xF000, 0x4441), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fssqrts", two(0xF000, 0x4441), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fssqrtw", two(0xF000, 0x5041), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fssqrtw", two(0xF000, 0x5041), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fssqrtx", two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fssqrtx", two(0xF000, 0x4841), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fssqrtx", two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiFt", m68040up },
{"fdsqrtb", two(0xF000, 0x5845), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fdsqrtb", two(0xF000, 0x5845), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdsqrtd", two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fdsqrtd", two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt", cfloat },
{"fdsqrtd", two(0xF000, 0x5445), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
{"fdsqrtl", two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fdsqrtl", two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsqrtp", two(0xF000, 0x4C45), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fdsqrts", two(0xF000, 0x4445), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fdsqrts", two(0xF000, 0x4445), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsqrtw", two(0xF000, 0x5045), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fdsqrtw", two(0xF000, 0x5045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsqrtx", two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdsqrtx", two(0xF000, 0x4845), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fdsqrtx", two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt", m68040up },
{"fsubb", two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
+{"fsubb", two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsubd", two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fsubd", two(0xF000, 0x5428), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
+{"fsubd", two(0xF000, 0x5428), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fsubl", two(0xF000, 0x4028), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
+{"fsubl", two(0xF000, 0x4028), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsubp", two(0xF000, 0x4C28), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fsubs", two(0xF000, 0x4428), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
+{"fsubs", two(0xF000, 0x4428), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsubw", two(0xF000, 0x5028), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
+{"fsubw", two(0xF000, 0x5028), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsubx", two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
{"fsubx", two(0xF000, 0x4828), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fsubx", two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiFt", mfloat },
+{"fssubb", two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fssubb", two(0xF000, 0x5868), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fssubd", two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fssubd", two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fssubd", two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fssubl", two(0xF000, 0x4068), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
+{"fssubl", two(0xF000, 0x4068), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fssubp", two(0xF000, 0x4C68), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fssubs", two(0xF000, 0x4468), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fssubs", two(0xF000, 0x4468), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fssubw", two(0xF000, 0x5068), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
+{"fssubw", two(0xF000, 0x5068), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fssubx", two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fssubx", two(0xF000, 0x4868), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fssubx", two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiFt", m68040up },
+{"fdsubb", two(0xF000, 0x586A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubb", two(0xF000, 0x586c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
+{"fdsubd", two(0xF000, 0x006A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fdsubd", two(0xF000, 0x546A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdsubd", two(0xF000, 0x546c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
+{"fdsubl", two(0xF000, 0x406A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubl", two(0xF000, 0x406c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fdsubp", two(0xF000, 0x4C6c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
+{"fdsubs", two(0xF000, 0x446A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubs", two(0xF000, 0x446c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
+{"fdsubw", two(0xF000, 0x506A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubw", two(0xF000, 0x506c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fdsubx", two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdsubx", two(0xF000, 0x486c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
@@ -1119,7 +1327,7 @@ const struct m68k_opcode m68k_opcodes[] =
{"ftrapule", two(0xF07C, 0x000D), two(0xF1FF, 0xFFFF), "Ii", mfloat },
{"ftrapult", two(0xF07C, 0x000C), two(0xF1FF, 0xFFFF), "Ii", mfloat },
{"ftrapun", two(0xF07C, 0x0008), two(0xF1FF, 0xFFFF), "Ii", mfloat },
-
+
{"ftrapeqw", two(0xF07A, 0x0001), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
{"ftrapfw", two(0xF07A, 0x0000), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
{"ftrapgew", two(0xF07A, 0x0013), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
@@ -1187,11 +1395,17 @@ const struct m68k_opcode m68k_opcodes[] =
{"ftrapunl", two(0xF07B, 0x0008), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
{"ftstb", two(0xF000, 0x583A), two(0xF1C0, 0xFC7F), "Ii;b", mfloat },
+{"ftstb", two(0xF000, 0x583A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
+{"ftstd", two(0xF000, 0x003A), two(0xF1C0, 0xE07F), "IiF8", cfloat },
{"ftstd", two(0xF000, 0x543A), two(0xF1C0, 0xFC7F), "Ii;F", mfloat },
+{"ftstd", two(0xF000, 0x543A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
{"ftstl", two(0xF000, 0x403A), two(0xF1C0, 0xFC7F), "Ii;l", mfloat },
+{"ftstl", two(0xF000, 0x403A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
{"ftstp", two(0xF000, 0x4C3A), two(0xF1C0, 0xFC7F), "Ii;p", mfloat },
{"ftsts", two(0xF000, 0x443A), two(0xF1C0, 0xFC7F), "Ii;f", mfloat },
+{"ftsts", two(0xF000, 0x443A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
{"ftstw", two(0xF000, 0x503A), two(0xF1C0, 0xFC7F), "Ii;w", mfloat },
+{"ftstw", two(0xF000, 0x503A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
{"ftstx", two(0xF000, 0x003A), two(0xF1C0, 0xE07F), "IiF8", mfloat },
{"ftstx", two(0xF000, 0x483A), two(0xF1C0, 0xFC7F), "Ii;x", mfloat },
@@ -1207,7 +1421,8 @@ const struct m68k_opcode m68k_opcodes[] =
{"halt", one(0045310), one(0177777), "", m68060 | mcf },
-{"illegal", one(0045374), one(0177777), "", m68000up },
+{"illegal", one(0045374), one(0177777), "", m68000up | mcf },
+{"intouch", one(0xf428), one(0xfff8), "As", mcfv4eup },
{"jmp", one(0047300), one(0177700), "!s", m68000up | mcf },
@@ -1245,57 +1460,57 @@ const struct m68k_opcode m68k_opcodes[] =
{"lsrl", one(0160250), one(0170770), "DdDs", m68000up | mcf },
/* FIXME: add MAM mode (`&' after <ea> operand) / remove MACM */
-{"macw", two(0120000, 0000000), two(0170660, 0005400), "uMum", mcf5307up | mcf5206e },
-{"macw", two(0120000, 0001000), two(0170660, 0005400), "uMumMh",mcf5307up | mcf5206e },
-{"macw", two(0120220, 0000000), two(0170670, 0005460), "uNuoasRn", mcf5307up | mcf5206e },
-{"macw", two(0120230, 0000000), two(0170670, 0005460), "uNuo+sRn", mcf5307up | mcf5206e },
-{"macw", two(0120240, 0000000), two(0170670, 0005460), "uNuo-sRn", mcf5307up | mcf5206e },
-{"macw", two(0120250, 0000000), two(0170670, 0005460), "uNuodsRn", mcf5307up | mcf5206e },
-{"macw", two(0120220, 0001000), two(0170670, 0005460), "uNuoMhasRn", mcf5307up | mcf5206e },
-{"macw", two(0120230, 0001000), two(0170670, 0005460), "uNuoMh+sRn", mcf5307up | mcf5206e },
-{"macw", two(0120240, 0001000), two(0170670, 0005460), "uNuoMh-sRn", mcf5307up | mcf5206e },
-{"macw", two(0120250, 0001000), two(0170670, 0005460), "uNuoMhdsRn", mcf5307up | mcf5206e },
-{"macmw", two(0120220, 0000040), two(0170670, 0005460), "uNuoasRn", mcf5307up | mcf5206e },
-{"macmw", two(0120230, 0000040), two(0170670, 0005460), "uNuo+sRn", mcf5307up | mcf5206e },
-{"macmw", two(0120240, 0000040), two(0170670, 0005460), "uNuo-sRn", mcf5307up | mcf5206e },
-{"macmw", two(0120250, 0000040), two(0170670, 0005460), "uNuodsRn", mcf5307up | mcf5206e },
-{"macmw", two(0120220, 0001040), two(0170670, 0005460), "uNuoMhasRn", mcf5307up | mcf5206e },
-{"macmw", two(0120230, 0001040), two(0170670, 0005460), "uNuoMh+sRn", mcf5307up | mcf5206e },
-{"macmw", two(0120240, 0001040), two(0170670, 0005460), "uNuoMh-sRn", mcf5307up | mcf5206e },
-{"macmw", two(0120250, 0001040), two(0170670, 0005460), "uNuoMhdsRn", mcf5307up | mcf5206e },
-
-{"macl", two(0120000, 0004000), two(0170660, 0005400), "RsRm", mcf5307up | mcf5206e },
-{"macl", two(0120000, 0005000), two(0170660, 0005400), "RsRmMh", mcf5307up | mcf5206e },
-{"macl", two(0120220, 0004000), two(0170670, 0005460), "R3R1asRn", mcf5307up | mcf5206e },
-{"macl", two(0120230, 0004000), two(0170670, 0005460), "R3R1+sRn", mcf5307up | mcf5206e },
-{"macl", two(0120240, 0004000), two(0170670, 0005460), "R3R1-sRn", mcf5307up | mcf5206e },
-{"macl", two(0120250, 0004000), two(0170670, 0005460), "R3R1dsRn", mcf5307up | mcf5206e },
-{"macl", two(0120220, 0005000), two(0170670, 0005460), "R3R1MhasRn", mcf5307up | mcf5206e },
-{"macl", two(0120230, 0005000), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307up | mcf5206e },
-{"macl", two(0120240, 0005000), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307up | mcf5206e },
-{"macl", two(0120250, 0005000), two(0170670, 0005460), "R3R1MhdsRn", mcf5307up | mcf5206e },
-{"macml", two(0120220, 0004040), two(0170670, 0005460), "R3R1asRn", mcf5307up | mcf5206e },
-{"macml", two(0120230, 0004040), two(0170670, 0005460), "R3R1+sRn", mcf5307up | mcf5206e },
-{"macml", two(0120240, 0004040), two(0170670, 0005460), "R3R1-sRn", mcf5307up | mcf5206e },
-{"macml", two(0120250, 0004040), two(0170670, 0005460), "R3R1dsRn", mcf5307up | mcf5206e },
-{"macml", two(0120220, 0005040), two(0170670, 0005460), "R3R1MhasRn", mcf5307up | mcf5206e },
-{"macml", two(0120230, 0005040), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307up | mcf5206e },
-{"macml", two(0120240, 0005040), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307up | mcf5206e },
-{"macml", two(0120250, 0005040), two(0170670, 0005460), "R3R1MhdsRn", mcf5307up | mcf5206e },
-
-/* NOTE: The mcf5200 family programmer's reference manual does not
+{"macw", two(0120000, 0000000), two(0170660, 0005400), "uMum", mcf5206eup },
+{"macw", two(0120000, 0001000), two(0170660, 0005400), "uMumMh",mcf5206eup },
+{"macw", two(0120220, 0000000), two(0170670, 0005460), "uNuoasRn", mcf5206eup },
+{"macw", two(0120230, 0000000), two(0170670, 0005460), "uNuo+sRn", mcf5206eup },
+{"macw", two(0120240, 0000000), two(0170670, 0005460), "uNuo-sRn", mcf5206eup },
+{"macw", two(0120250, 0000000), two(0170670, 0005460), "uNuodsRn", mcf5206eup },
+{"macw", two(0120220, 0001000), two(0170670, 0005460), "uNuoMhasRn", mcf5206eup },
+{"macw", two(0120230, 0001000), two(0170670, 0005460), "uNuoMh+sRn", mcf5206eup },
+{"macw", two(0120240, 0001000), two(0170670, 0005460), "uNuoMh-sRn", mcf5206eup },
+{"macw", two(0120250, 0001000), two(0170670, 0005460), "uNuoMhdsRn", mcf5206eup },
+{"macmw", two(0120220, 0000040), two(0170670, 0005460), "uNuoasRn", mcf5206eup },
+{"macmw", two(0120230, 0000040), two(0170670, 0005460), "uNuo+sRn", mcf5206eup },
+{"macmw", two(0120240, 0000040), two(0170670, 0005460), "uNuo-sRn", mcf5206eup },
+{"macmw", two(0120250, 0000040), two(0170670, 0005460), "uNuodsRn", mcf5206eup },
+{"macmw", two(0120220, 0001040), two(0170670, 0005460), "uNuoMhasRn", mcf5206eup },
+{"macmw", two(0120230, 0001040), two(0170670, 0005460), "uNuoMh+sRn", mcf5206eup },
+{"macmw", two(0120240, 0001040), two(0170670, 0005460), "uNuoMh-sRn", mcf5206eup },
+{"macmw", two(0120250, 0001040), two(0170670, 0005460), "uNuoMhdsRn", mcf5206eup },
+
+{"macl", two(0120000, 0004000), two(0170660, 0005400), "RsRm", mcf5206eup },
+{"macl", two(0120000, 0005000), two(0170660, 0005400), "RsRmMh", mcf5206eup },
+{"macl", two(0120220, 0004000), two(0170670, 0005460), "R3R1asRn", mcf5206eup },
+{"macl", two(0120230, 0004000), two(0170670, 0005460), "R3R1+sRn", mcf5206eup },
+{"macl", two(0120240, 0004000), two(0170670, 0005460), "R3R1-sRn", mcf5206eup },
+{"macl", two(0120250, 0004000), two(0170670, 0005460), "R3R1dsRn", mcf5206eup },
+{"macl", two(0120220, 0005000), two(0170670, 0005460), "R3R1MhasRn", mcf5206eup },
+{"macl", two(0120230, 0005000), two(0170670, 0005460), "R3R1Mh+sRn", mcf5206eup },
+{"macl", two(0120240, 0005000), two(0170670, 0005460), "R3R1Mh-sRn", mcf5206eup },
+{"macl", two(0120250, 0005000), two(0170670, 0005460), "R3R1MhdsRn", mcf5206eup },
+{"macml", two(0120220, 0004040), two(0170670, 0005460), "R3R1asRn", mcf5206eup },
+{"macml", two(0120230, 0004040), two(0170670, 0005460), "R3R1+sRn", mcf5206eup },
+{"macml", two(0120240, 0004040), two(0170670, 0005460), "R3R1-sRn", mcf5206eup },
+{"macml", two(0120250, 0004040), two(0170670, 0005460), "R3R1dsRn", mcf5206eup },
+{"macml", two(0120220, 0005040), two(0170670, 0005460), "R3R1MhasRn", mcf5206eup },
+{"macml", two(0120230, 0005040), two(0170670, 0005460), "R3R1Mh+sRn", mcf5206eup },
+{"macml", two(0120240, 0005040), two(0170670, 0005460), "R3R1Mh-sRn", mcf5206eup },
+{"macml", two(0120250, 0005040), two(0170670, 0005460), "R3R1MhdsRn", mcf5206eup },
+
+/* NOTE: The mcf5200 family programmer's reference manual does not
indicate the byte form of the movea instruction is invalid (as it
is on 68000 family cpus). However, experiments on the 5202 yeild
unexpected results. The value is copied, but it is not sign extended
- (as is done with movea.w) and the top three bytes in the address
+ (as is done with movea.w) and the top three bytes in the address
register are not disturbed. I don't know if this is the intended
behavior --- it could be a hole in instruction decoding (Motorola
decided not to trap all invalid instructions for performance reasons)
- --- but I suspect that it is not.
+ --- but I suspect that it is not.
- I reported this to Motorola ISD Technical Communications Support,
- which replied that other coldfire assemblers reject movea.b. For
- this reason I've decided to not allow moveab.
+ I reported this to Motorola ISD Technical Communications Support,
+ which replied that other coldfire assemblers reject movea.b. For
+ this reason I've decided to not allow moveab.
jtc@cygnus.com - 97/01/24
*/
@@ -1347,13 +1562,13 @@ const struct m68k_opcode m68k_opcodes[] =
{"moveb", one(0010200), one(0170700), "obad", mcf },
{"moveb", one(0010300), one(0170700), "ob+d", mcf },
{"moveb", one(0010400), one(0170700), "ob-d", mcf },
-{"moveb", one(0010000), one(0170000), "obnd", mcf5407 },
+{"moveb", one(0010000), one(0170000), "obnd", mcfv4up },
{"movew", one(0030000), one(0170000), "*w%d", m68000up },
{"movew", one(0030000), one(0170000), "ms%d", mcf },
{"movew", one(0030000), one(0170000), "nspd", mcf },
{"movew", one(0030000), one(0170000), "owmd", mcf },
-{"movew", one(0030000), one(0170000), "ownd", mcf5407 },
+{"movew", one(0030000), one(0170000), "ownd", mcfv4up },
{"movew", one(0040300), one(0177700), "Ss$s", m68000up },
{"movew", one(0040300), one(0177770), "SsDs", mcf },
{"movew", one(0041300), one(0177700), "Cs$s", m68010up },
@@ -1370,25 +1585,25 @@ const struct m68k_opcode m68k_opcodes[] =
{"movel", one(0020000), one(0170000), "ms%d", mcf },
{"movel", one(0020000), one(0170000), "nspd", mcf },
{"movel", one(0020000), one(0170000), "olmd", mcf },
-{"movel", one(0020000), one(0170000), "olnd", mcf5407 },
-{"movel", one(0047140), one(0177770), "AsUd", m68000up },
-{"movel", one(0047150), one(0177770), "UdAs", m68000up },
-{"movel", one(0120600), one(0177760), "EsRs", mcf5307up | mcf5206e },
-{"movel", one(0120400), one(0177760), "RsEs", mcf5307up | mcf5206e },
-{"movel", one(0120474), one(0177777), "#lEs", mcf5307up | mcf5206e },
-{"movel", one(0124600), one(0177760), "GsRs", mcf5307up | mcf5206e },
-{"movel", one(0124400), one(0177760), "RsGs", mcf5307up | mcf5206e },
-{"movel", one(0124474), one(0177777), "#lGs", mcf5307up | mcf5206e },
-{"movel", one(0126600), one(0177760), "HsRs", mcf5307up | mcf5206e },
-{"movel", one(0126400), one(0177760), "RsHs", mcf5307up | mcf5206e },
-{"movel", one(0126474), one(0177777), "#lHs", mcf5307up | mcf5206e },
-{"movel", one(0124700), one(0177777), "GsCs", mcf5307up | mcf5206e },
+{"movel", one(0020000), one(0170000), "olnd", mcfv4up },
+{"movel", one(0047140), one(0177770), "AsUd", m68000up | mcfv4e },
+{"movel", one(0047150), one(0177770), "UdAs", m68000up | mcfv4e },
+{"movel", one(0120600), one(0177760), "EsRs", mcf5206eup },
+{"movel", one(0120400), one(0177760), "RsEs", mcf5206eup },
+{"movel", one(0120474), one(0177777), "#lEs", mcf5206eup },
+{"movel", one(0124600), one(0177760), "GsRs", mcf5206eup },
+{"movel", one(0124400), one(0177760), "RsGs", mcf5206eup },
+{"movel", one(0124474), one(0177777), "#lGs", mcf5206eup },
+{"movel", one(0126600), one(0177760), "HsRs", mcf5206eup },
+{"movel", one(0126400), one(0177760), "RsHs", mcf5206eup },
+{"movel", one(0126474), one(0177777), "#lHs", mcf5206eup },
+{"movel", one(0124700), one(0177777), "GsCs", mcf5206eup },
{"move", one(0030000), one(0170000), "*w%d", m68000up },
{"move", one(0030000), one(0170000), "ms%d", mcf },
{"move", one(0030000), one(0170000), "nspd", mcf },
{"move", one(0030000), one(0170000), "owmd", mcf },
-{"move", one(0030000), one(0170000), "ownd", mcf5407 },
+{"move", one(0030000), one(0170000), "ownd", mcfv4up },
{"move", one(0040300), one(0177700), "Ss$s", m68000up },
{"move", one(0040300), one(0177770), "SsDs", mcf },
{"move", one(0041300), one(0177700), "Cs$s", m68010up },
@@ -1403,11 +1618,11 @@ const struct m68k_opcode m68k_opcodes[] =
{"move", one(0047140), one(0177770), "AsUd", m68000up },
{"move", one(0047150), one(0177770), "UdAs", m68000up },
-{"mov3ql", one(0120500), one(0170700), "Qd%s", mcf5407 },
-{"mvsb", one(0070400), one(0170700), "*bDd", mcf5407 },
-{"mvsw", one(0070500), one(0170700), "*wDd", mcf5407 },
-{"mvzb", one(0070600), one(0170700), "*bDd", mcf5407 },
-{"mvzw", one(0070700), one(0170700), "*wDd", mcf5407 },
+{"mov3ql", one(0120500), one(0170700), "xd%s", mcfv4up },
+{"mvsb", one(0070400), one(0170700), "*bDd", mcfv4up },
+{"mvsw", one(0070500), one(0170700), "*wDd", mcfv4up },
+{"mvzb", one(0070600), one(0170700), "*bDd", mcfv4up },
+{"mvzw", one(0070700), one(0170700), "*wDd", mcfv4up },
{"movesb", two(0007000, 0), two(0177700, 07777), "~sR1", m68010up },
{"movesb", two(0007000, 04000), two(0177700, 07777), "R1~s", m68010up },
@@ -1423,43 +1638,43 @@ const struct m68k_opcode m68k_opcodes[] =
{"move16", one(0xf618), one(0xfff8), "_Las", m68040up },
/* FIXME: add MAM mode (`&' after <ea> operand) / remove MSACM */
-{"msacw", two(0120000, 0000400), two(0170660, 0005400), "uMum", mcf5307up | mcf5206e },
-{"msacw", two(0120000, 0001400), two(0170660, 0005400), "uMumMh", mcf5307up | mcf5206e },
-{"msacw", two(0120220, 0000400), two(0170670, 0005460), "uNuoasRn", mcf5307up | mcf5206e },
-{"msacw", two(0120230, 0000400), two(0170670, 0005460), "uNuo+sRn", mcf5307up | mcf5206e },
-{"msacw", two(0120240, 0000400), two(0170670, 0005460), "uNuo-sRn", mcf5307up | mcf5206e },
-{"msacw", two(0120250, 0000400), two(0170670, 0005460), "uNuodsRn", mcf5307up | mcf5206e },
-{"msacw", two(0120220, 0001400), two(0170670, 0005460), "uNuoMhasRn", mcf5307up | mcf5206e },
-{"msacw", two(0120230, 0001400), two(0170670, 0005460), "uNuoMh+sRn", mcf5307up | mcf5206e },
-{"msacw", two(0120240, 0001400), two(0170670, 0005460), "uNuoMh-sRn", mcf5307up | mcf5206e },
-{"msacw", two(0120250, 0001400), two(0170670, 0005460), "uNuoMhdsRn", mcf5307up | mcf5206e },
-{"msacmw", two(0120220, 0000440), two(0170670, 0005460), "uNuoasRn", mcf5307up | mcf5206e },
-{"msacmw", two(0120230, 0000440), two(0170670, 0005460), "uNuo+sRn", mcf5307up | mcf5206e },
-{"msacmw", two(0120240, 0000440), two(0170670, 0005460), "uNuo-sRn", mcf5307up | mcf5206e },
-{"msacmw", two(0120250, 0000440), two(0170670, 0005460), "uNuodsRn", mcf5307up | mcf5206e },
-{"msacmw", two(0120220, 0001440), two(0170670, 0005460), "uNuoMhasRn", mcf5307up | mcf5206e },
-{"msacmw", two(0120230, 0001440), two(0170670, 0005460), "uNuoMh+sRn", mcf5307up | mcf5206e },
-{"msacmw", two(0120240, 0001440), two(0170670, 0005460), "uNuoMh-sRn", mcf5307up | mcf5206e },
-{"msacmw", two(0120250, 0001440), two(0170670, 0005460), "uNuoMhdsRn", mcf5307up | mcf5206e },
-
-{"msacl", two(0120000, 0004400), two(0170660, 0005400), "RsRm", mcf5307up | mcf5206e },
-{"msacl", two(0120000, 0005400), two(0170660, 0005400), "RsRmMh", mcf5307up | mcf5206e },
-{"msacl", two(0120220, 0004400), two(0170670, 0005460), "R3R1asRn", mcf5307up | mcf5206e },
-{"msacl", two(0120230, 0004400), two(0170670, 0005460), "R3R1+sRn", mcf5307up | mcf5206e },
-{"msacl", two(0120240, 0004400), two(0170670, 0005460), "R3R1-sRn", mcf5307up | mcf5206e },
-{"msacl", two(0120250, 0004400), two(0170670, 0005460), "R3R1dsRn", mcf5307up | mcf5206e },
-{"msacl", two(0120220, 0005400), two(0170670, 0005460), "R3R1MhasRn", mcf5307up | mcf5206e },
-{"msacl", two(0120230, 0005400), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307up | mcf5206e },
-{"msacl", two(0120240, 0005400), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307up | mcf5206e },
-{"msacl", two(0120250, 0005400), two(0170670, 0005460), "R3R1MhdsRn", mcf5307up | mcf5206e },
-{"msacml", two(0120220, 0004440), two(0170670, 0005460), "R3R1asRn", mcf5307up | mcf5206e },
-{"msacml", two(0120230, 0004440), two(0170670, 0005460), "R3R1+sRn", mcf5307up | mcf5206e },
-{"msacml", two(0120240, 0004440), two(0170670, 0005460), "R3R1-sRn", mcf5307up | mcf5206e },
-{"msacml", two(0120250, 0004440), two(0170670, 0005460), "R3R1dsRn", mcf5307up | mcf5206e },
-{"msacml", two(0120220, 0005440), two(0170670, 0005460), "R3R1MhasRn", mcf5307up | mcf5206e },
-{"msacml", two(0120230, 0005440), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307up | mcf5206e },
-{"msacml", two(0120240, 0005440), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307up | mcf5206e },
-{"msacml", two(0120250, 0005440), two(0170670, 0005460), "R3R1MhdsRn", mcf5307up | mcf5206e },
+{"msacw", two(0120000, 0000400), two(0170660, 0005400), "uMum", mcf5206eup },
+{"msacw", two(0120000, 0001400), two(0170660, 0005400), "uMumMh", mcf5206eup },
+{"msacw", two(0120220, 0000400), two(0170670, 0005460), "uNuoasRn", mcf5206eup },
+{"msacw", two(0120230, 0000400), two(0170670, 0005460), "uNuo+sRn", mcf5206eup },
+{"msacw", two(0120240, 0000400), two(0170670, 0005460), "uNuo-sRn", mcf5206eup },
+{"msacw", two(0120250, 0000400), two(0170670, 0005460), "uNuodsRn", mcf5206eup },
+{"msacw", two(0120220, 0001400), two(0170670, 0005460), "uNuoMhasRn", mcf5206eup },
+{"msacw", two(0120230, 0001400), two(0170670, 0005460), "uNuoMh+sRn", mcf5206eup },
+{"msacw", two(0120240, 0001400), two(0170670, 0005460), "uNuoMh-sRn", mcf5206eup },
+{"msacw", two(0120250, 0001400), two(0170670, 0005460), "uNuoMhdsRn", mcf5206eup },
+{"msacmw", two(0120220, 0000440), two(0170670, 0005460), "uNuoasRn", mcf5206eup },
+{"msacmw", two(0120230, 0000440), two(0170670, 0005460), "uNuo+sRn", mcf5206eup },
+{"msacmw", two(0120240, 0000440), two(0170670, 0005460), "uNuo-sRn", mcf5206eup },
+{"msacmw", two(0120250, 0000440), two(0170670, 0005460), "uNuodsRn", mcf5206eup },
+{"msacmw", two(0120220, 0001440), two(0170670, 0005460), "uNuoMhasRn", mcf5206eup },
+{"msacmw", two(0120230, 0001440), two(0170670, 0005460), "uNuoMh+sRn", mcf5206eup },
+{"msacmw", two(0120240, 0001440), two(0170670, 0005460), "uNuoMh-sRn", mcf5206eup },
+{"msacmw", two(0120250, 0001440), two(0170670, 0005460), "uNuoMhdsRn", mcf5206eup },
+
+{"msacl", two(0120000, 0004400), two(0170660, 0005400), "RsRm", mcf5206eup },
+{"msacl", two(0120000, 0005400), two(0170660, 0005400), "RsRmMh", mcf5206eup },
+{"msacl", two(0120220, 0004400), two(0170670, 0005460), "R3R1asRn", mcf5206eup },
+{"msacl", two(0120230, 0004400), two(0170670, 0005460), "R3R1+sRn", mcf5206eup },
+{"msacl", two(0120240, 0004400), two(0170670, 0005460), "R3R1-sRn", mcf5206eup },
+{"msacl", two(0120250, 0004400), two(0170670, 0005460), "R3R1dsRn", mcf5206eup },
+{"msacl", two(0120220, 0005400), two(0170670, 0005460), "R3R1MhasRn", mcf5206eup },
+{"msacl", two(0120230, 0005400), two(0170670, 0005460), "R3R1Mh+sRn", mcf5206eup },
+{"msacl", two(0120240, 0005400), two(0170670, 0005460), "R3R1Mh-sRn", mcf5206eup },
+{"msacl", two(0120250, 0005400), two(0170670, 0005460), "R3R1MhdsRn", mcf5206eup },
+{"msacml", two(0120220, 0004440), two(0170670, 0005460), "R3R1asRn", mcf5206eup },
+{"msacml", two(0120230, 0004440), two(0170670, 0005460), "R3R1+sRn", mcf5206eup },
+{"msacml", two(0120240, 0004440), two(0170670, 0005460), "R3R1-sRn", mcf5206eup },
+{"msacml", two(0120250, 0004440), two(0170670, 0005460), "R3R1dsRn", mcf5206eup },
+{"msacml", two(0120220, 0005440), two(0170670, 0005460), "R3R1MhasRn", mcf5206eup },
+{"msacml", two(0120230, 0005440), two(0170670, 0005460), "R3R1Mh+sRn", mcf5206eup },
+{"msacml", two(0120240, 0005440), two(0170670, 0005460), "R3R1Mh-sRn", mcf5206eup },
+{"msacml", two(0120250, 0005440), two(0170670, 0005460), "R3R1MhdsRn", mcf5206eup },
{"mulsw", one(0140700), one(0170700), ";wDd", m68000up|mcf },
{"mulsl", two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
@@ -1736,8 +1951,8 @@ const struct m68k_opcode m68k_opcodes[] =
{"pvalid", two(0xf000, 0x2c00), two(0xffc0, 0xfff8), "A3&s", m68851 },
/* FIXME: don't allow Dw==Dx. */
-{"remsl", two(0x4c40, 0x0800), two(0xffc0, 0x8ff8), "qsD3D1", mcf5307up | mcf5206e },
-{"remul", two(0x4c40, 0x0000), two(0xffc0, 0x8ff8), "qsD3D1", mcf5307up | mcf5206e },
+{"remsl", two(0x4c40, 0x0800), two(0xffc0, 0x8ff8), "qsD3D1", mcf5206eup },
+{"remul", two(0x4c40, 0x0000), two(0xffc0, 0x8ff8), "qsD3D1", mcf5206eup },
{"reset", one(0047160), one(0177777), "", m68000up },
@@ -1783,7 +1998,7 @@ const struct m68k_opcode m68k_opcodes[] =
{"rts", one(0047165), one(0177777), "", m68000up | mcf },
-{"satsl", one(0046200), one(0177770), "Ds", mcf5407 },
+{"satsl", one(0046200), one(0177770), "Ds", mcfv4up },
{"sbcd", one(0100400), one(0170770), "DsDd", m68000up },
{"sbcd", one(0100410), one(0170770), "-s-d", m68000up },
@@ -1823,6 +2038,8 @@ const struct m68k_opcode m68k_opcodes[] =
{"stop", one(0047162), one(0177777), "#w", m68000up | mcf },
+{"strldsr", two(0040347,0043374), two(0177777,0177777), "#w", mcf528x},
+
{"subal", one(0110700), one(0170700), "*lAd", m68000up | mcf },
{"subaw", one(0110300), one(0170700), "*wAd", m68000up },
@@ -1870,7 +2087,7 @@ const struct m68k_opcode m68k_opcodes[] =
{"swbeg", one(0045374), one(0177777), "#w", m68000up | mcf },
{"swbegl", one(0045375), one(0177777), "#l", m68000up | mcf },
-{"tas", one(0045300), one(0177700), "$s", m68000up | mcf5407},
+{"tas", one(0045300), one(0177700), "$s", m68000up | mcfv4up},
#define TBL1(name,signed,round,size) \
{name, two(0174000, (signed<<11)|(!round<<10)|(size<<6)|0000400), \
@@ -2205,6 +2422,11 @@ const struct m68k_opcode_alias m68k_opcode_aliases[] =
{ "ftests", "ftsts", },
{ "ftestw", "ftstw", },
{ "ftestx", "ftstx", },
+
+ { "bitrevl", "bitrev", }, /* for mcf528x only */
+ { "byterevl", "byterev", },
+ { "ff1l", "ff1", },
+
};
const int m68k_numaliases =
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index af6c445..43fcb3c 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -384,6 +384,12 @@ const struct mips_arch_choice mips_arch_choices[] = {
mips_cp0sel_names_mips3264, ARRAY_SIZE (mips_cp0sel_names_mips3264),
mips_hwr_names_numeric },
+ { "mips64r2", 1, bfd_mach_mipsisa64r2, CPU_MIPS64R2,
+ ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
+ mips_cp0_names_mips3264r2,
+ mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2),
+ mips_hwr_names_mips3264r2 },
+
{ "sb1", 1, bfd_mach_mips_sb1, CPU_SB1,
ISA_MIPS64 | INSN_MIPS3D | INSN_SB1,
mips_cp0_names_sb1,
@@ -714,6 +720,7 @@ print_insn_args (d, l, pc, info)
break;
case 'C':
+ case 'H':
msbd = (l >> OP_SH_EXTMSBD) & OP_MASK_EXTMSBD;
(*info->fprintf_func) (info->stream, "0x%x", msbd + 1);
break;
@@ -740,6 +747,21 @@ print_insn_args (d, l, pc, info)
break;
}
+ case 'E':
+ lsb = ((l >> OP_SH_SHAMT) & OP_MASK_SHAMT) + 32;
+ (*info->fprintf_func) (info->stream, "0x%x", lsb);
+ break;
+
+ case 'F':
+ msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32;
+ (*info->fprintf_func) (info->stream, "0x%x", msb - lsb + 1);
+ break;
+
+ case 'G':
+ msbd = ((l >> OP_SH_EXTMSBD) & OP_MASK_EXTMSBD) + 32;
+ (*info->fprintf_func) (info->stream, "0x%x", msbd + 1);
+ break;
+
default:
/* xgettext:c-format */
(*info->fprintf_func) (info->stream,
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 228357a..340a084 100644
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -87,6 +87,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
#define I32 INSN_ISA32
#define I64 INSN_ISA64
#define I33 INSN_ISA32R2
+#define I65 INSN_ISA64R2
/* MIPS64 MIPS-3D ASE support. */
#define I16 INSN_MIPS16
@@ -481,6 +482,10 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 },
{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
{"deret", "", 0x4200001f, 0xffffffff, 0, I32|G2 },
+{"dext", "t,r,I,+I", 0, (int) M_DEXT, INSN_MACRO, I65 },
+{"dext", "t,r,+A,+C", 0x7c000003, 0xfc00003f, WR_t|RD_s, I65 },
+{"dextm", "t,r,+A,+G", 0x7c000001, 0xfc00003f, WR_t|RD_s, I65 },
+{"dextu", "t,r,+E,+H", 0x7c000002, 0xfc00003f, WR_t|RD_s, I65 },
/* For ddiv, see the comments about div. */
{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
@@ -491,6 +496,10 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
{"di", "", 0x41606000, 0xffffffff, WR_t|WR_C0, I33 },
{"di", "t", 0x41606000, 0xffe0ffff, WR_t|WR_C0, I33 },
+{"dins", "t,r,I,+I", 0, (int) M_DINS, INSN_MACRO, I65 },
+{"dins", "t,r,+A,+B", 0x7c000007, 0xfc00003f, WR_t|RD_s, I65 },
+{"dinsm", "t,r,+A,+F", 0x7c000005, 0xfc00003f, WR_t|RD_s, I65 },
+{"dinsu", "t,r,+E,+F", 0x7c000006, 0xfc00003f, WR_t|RD_s, I65 },
/* The MIPS assembler treats the div opcode with two operands as
though the first operand appeared twice (the first operand is both
a source and a destination). To get the div machine instruction,
@@ -559,9 +568,17 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 },
{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 },
{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 },
-{"dror", "d,w,<", 0x0020003a, 0xffe0003f, WR_d|RD_t, N5 },
-{"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
-{"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 },
+{"dror", "d,w,<", 0x0020003a, 0xffe0003f, WR_d|RD_t, N5|I65 },
+{"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5|I65 },
+{"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5|I65 },
+{"drotl", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I65 },
+{"drotl", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I65 },
+{"drotr", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I65 },
+{"drotr", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I65 },
+{"drotrv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, I65 },
+{"drotr32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d|RD_t, I65 },
+{"dsbh", "d,w", 0x7c0000a4, 0xffe007ff, WR_d|RD_t, I65 },
+{"dshd", "d,w", 0x7c000164, 0xffe007ff, WR_d|RD_t, I65 },
{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
diff --git a/opcodes/xtensa-dis.c b/opcodes/xtensa-dis.c
index bf5f5bf..8c31085 100644
--- a/opcodes/xtensa-dis.c
+++ b/opcodes/xtensa-dis.c
@@ -337,7 +337,7 @@ static char* state_names[256] =
int show_raw_fields;
static int fetch_data
- PARAMS ((struct disassemble_info *info, bfd_vma memaddr, int numBytes));
+ PARAMS ((struct disassemble_info *info, bfd_vma memaddr));
static void print_xtensa_operand
PARAMS ((bfd_vma, struct disassemble_info *, xtensa_operand,
unsigned operand_val, int print_sr_name));
@@ -348,15 +348,13 @@ struct dis_private {
};
static int
-fetch_data (info, memaddr, numBytes)
+fetch_data (info, memaddr)
struct disassemble_info *info;
bfd_vma memaddr;
- int numBytes;
{
int length, status = 0;
struct dis_private *priv = (struct dis_private *) info->private_data;
- int insn_size = (numBytes != 0 ? numBytes :
- xtensa_insn_maxlength (xtensa_default_isa));
+ int insn_size = xtensa_insn_maxlength (xtensa_default_isa);
/* Read the maximum instruction size, padding with zeros if we go past
the end of the text section. This code will automatically adjust
@@ -475,7 +473,7 @@ print_insn_xtensa (memaddr, info)
isa = xtensa_default_isa;
/* Fetch the maximum size instruction. */
- bytes_fetched = fetch_data (info, memaddr, 0);
+ bytes_fetched = fetch_data (info, memaddr);
/* Copy the bytes into the decode buffer. */
memset (insn_buffer, 0, (xtensa_insnbuf_size (isa) *
generated by cgit v1.1 at 2024-11-22 01:03:28 +0000