diff options
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 11 |
2 files changed, 14 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 4f5e200..3d26869 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2018-10-19 Tamar Christina <tamar.christina@arm.com> + + * arm-dis.c (UNKNOWN_INSTRUCTION_32BIT): Format specifier for arm mode. + (UNKNOWN_INSTRUCTION_16BIT): Format specifier for thumb mode. + (print_insn_arm, print_insn_thumb16, print_insn_thumb32): Use them. + 2018-10-16 Matthew Malcomson <matthew.malcomson@arm.com> * aarch64-opc.c (struct operand_qualifier_data): Change qualifier data diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index f22a78f..f0b9051 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -141,6 +141,8 @@ enum opcode_sentinel_enum } opcode_sentinels; #define UNDEFINED_INSTRUCTION "\t\t; <UNDEFINED> instruction: %0-31x" +#define UNKNOWN_INSTRUCTION_32BIT "\t\t; <UNDEFINED> instruction: %08x" +#define UNKNOWN_INSTRUCTION_16BIT "\t\t; <UNDEFINED> instruction: %04x" #define UNPREDICTABLE_INSTRUCTION "\t; <UNPREDICTABLE>" /* Common coprocessor opcodes shared between Arm and Thumb-2. */ @@ -5194,7 +5196,8 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) return; } } - abort (); + func (stream, UNKNOWN_INSTRUCTION_32BIT, (unsigned)given); + return; } /* Print one 16-bit Thumb instruction from PC on INFO->STREAM. */ @@ -5465,7 +5468,8 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given) } /* No match. */ - abort (); + func (stream, UNKNOWN_INSTRUCTION_16BIT, (unsigned)given); + return; } /* Return the name of an V7M special register. */ @@ -6089,7 +6093,8 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) } /* No match. */ - abort (); + func (stream, UNKNOWN_INSTRUCTION_32BIT, (unsigned)given); + return; } /* Print data bytes on INFO->STREAM. */ |