diff options
Diffstat (limited to 'opcodes/rl78-decode.c')
| -rw-r--r-- | opcodes/rl78-decode.c | 752 |
1 files changed, 376 insertions, 376 deletions
diff --git a/opcodes/rl78-decode.c b/opcodes/rl78-decode.c index 756da87..97c203d 100644 --- a/opcodes/rl78-decode.c +++ b/opcodes/rl78-decode.c @@ -203,9 +203,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("nop"); #line 912 "rl78-decode.opc" ID(nop); - + /*----------------------------------------------------------------------*/ - + } break; case 0x01: @@ -226,7 +226,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addw %0, %1"); #line 274 "rl78-decode.opc" ID(add); W(); DR(AX); SRW(rw); Fzac; - + } break; case 0x02: @@ -241,7 +241,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addw %0, %e!1"); #line 265 "rl78-decode.opc" ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac; - + } break; case 0x04: @@ -256,7 +256,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addw %0, #%1"); #line 271 "rl78-decode.opc" ID(add); W(); DR(AX); SC(IMMU(2)); Fzac; - + } break; case 0x06: @@ -271,7 +271,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addw %0, %1"); #line 277 "rl78-decode.opc" ID(add); W(); DR(AX); SM(None, SADDR); Fzac; - + } break; case 0x08: @@ -286,9 +286,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xch a, x"); #line 1235 "rl78-decode.opc" ID(xch); DR(A); SR(X); - + /*----------------------------------------------------------------------*/ - + } break; case 0x09: @@ -303,7 +303,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e1"); #line 678 "rl78-decode.opc" ID(mov); DR(A); SM(B, IMMU(2)); - + } break; case 0x0a: @@ -318,9 +318,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("add %0, #%1"); #line 228 "rl78-decode.opc" ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac; - + /*----------------------------------------------------------------------*/ - + } break; case 0x0b: @@ -335,7 +335,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("add %0, %1"); #line 222 "rl78-decode.opc" ID(add); DR(A); SM(None, SADDR); Fzac; - + } break; case 0x0c: @@ -350,7 +350,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("add %0, #%1"); #line 216 "rl78-decode.opc" ID(add); DR(A); SC(IMMU(1)); Fzac; - + } break; case 0x0d: @@ -365,7 +365,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("add %0, %e1"); #line 204 "rl78-decode.opc" ID(add); DR(A); SM(HL, 0); Fzac; - + } break; case 0x0e: @@ -380,7 +380,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("add %0, %ea1"); #line 210 "rl78-decode.opc" ID(add); DR(A); SM(HL, IMMU(1)); Fzac; - + } break; case 0x0f: @@ -395,7 +395,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("add %0, %e!1"); #line 201 "rl78-decode.opc" ID(add); DR(A); SM(None, IMMU(2)); Fzac; - + } break; case 0x10: @@ -410,9 +410,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addw %0, #%1"); #line 280 "rl78-decode.opc" ID(add); W(); DR(SP); SC(IMMU(1)); Fzac; - + /*----------------------------------------------------------------------*/ - + } break; case 0x11: @@ -430,9 +430,9 @@ rl78_decode_opcode (unsigned long pc AU, op ++; pc ++; goto start_again; - + /*----------------------------------------------------------------------*/ - + } break; case 0x12: @@ -452,7 +452,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %1"); #line 859 "rl78-decode.opc" ID(mov); W(); DRW(ra); SR(AX); - + } break; case 0x13: @@ -472,7 +472,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %1"); #line 856 "rl78-decode.opc" ID(mov); W(); DR(AX); SRW(ra); - + } break; case 0x18: @@ -486,8 +486,8 @@ rl78_decode_opcode (unsigned long pc AU, } SYNTAX("mov %e0, %1"); #line 729 "rl78-decode.opc" - ID(mov); DM(B, IMMU(2)); SR(A); - + ID(mov); DM(B, IMMU(2)); SR(A); + } break; case 0x19: @@ -501,8 +501,8 @@ rl78_decode_opcode (unsigned long pc AU, } SYNTAX("mov %e0, #%1"); #line 726 "rl78-decode.opc" - ID(mov); DM(B, IMMU(2)); SC(IMMU(1)); - + ID(mov); DM(B, IMMU(2)); SC(IMMU(1)); + } break; case 0x1a: @@ -517,9 +517,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addc %0, #%1"); #line 260 "rl78-decode.opc" ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac; - + /*----------------------------------------------------------------------*/ - + } break; case 0x1b: @@ -534,7 +534,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addc %0, %1"); #line 257 "rl78-decode.opc" ID(addc); DR(A); SM(None, SADDR); Fzac; - + } break; case 0x1c: @@ -549,7 +549,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addc %0, #%1"); #line 248 "rl78-decode.opc" ID(addc); DR(A); SC(IMMU(1)); Fzac; - + } break; case 0x1d: @@ -564,7 +564,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addc %0, %e1"); #line 236 "rl78-decode.opc" ID(addc); DR(A); SM(HL, 0); Fzac; - + } break; case 0x1e: @@ -579,7 +579,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addc %0, %ea1"); #line 245 "rl78-decode.opc" ID(addc); DR(A); SM(HL, IMMU(1)); Fzac; - + } break; case 0x1f: @@ -594,7 +594,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addc %0, %e!1"); #line 233 "rl78-decode.opc" ID(addc); DR(A); SM(None, IMMU(2)); Fzac; - + } break; case 0x20: @@ -609,9 +609,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subw %0, #%1"); #line 1199 "rl78-decode.opc" ID(sub); W(); DR(SP); SC(IMMU(1)); Fzac; - + /*----------------------------------------------------------------------*/ - + } break; case 0x21: @@ -632,7 +632,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subw %0, %1"); #line 1193 "rl78-decode.opc" ID(sub); W(); DR(AX); SRW(rw); Fzac; - + } break; case 0x22: @@ -647,7 +647,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subw %0, %e!1"); #line 1184 "rl78-decode.opc" ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac; - + } break; case 0x24: @@ -662,7 +662,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subw %0, #%1"); #line 1190 "rl78-decode.opc" ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac; - + } break; case 0x26: @@ -677,7 +677,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subw %0, %1"); #line 1196 "rl78-decode.opc" ID(sub); W(); DR(AX); SM(None, SADDR); Fzac; - + } break; case 0x28: @@ -692,7 +692,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %e0, %1"); #line 741 "rl78-decode.opc" ID(mov); DM(C, IMMU(2)); SR(A); - + } break; case 0x29: @@ -707,7 +707,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e1"); #line 684 "rl78-decode.opc" ID(mov); DR(A); SM(C, IMMU(2)); - + } break; case 0x2a: @@ -722,9 +722,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sub %0, #%1"); #line 1147 "rl78-decode.opc" ID(sub); DM(None, SADDR); SC(IMMU(1)); Fzac; - + /*----------------------------------------------------------------------*/ - + } break; case 0x2b: @@ -739,7 +739,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sub %0, %1"); #line 1141 "rl78-decode.opc" ID(sub); DR(A); SM(None, SADDR); Fzac; - + } break; case 0x2c: @@ -754,7 +754,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sub %0, #%1"); #line 1135 "rl78-decode.opc" ID(sub); DR(A); SC(IMMU(1)); Fzac; - + } break; case 0x2d: @@ -769,7 +769,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sub %0, %e1"); #line 1123 "rl78-decode.opc" ID(sub); DR(A); SM(HL, 0); Fzac; - + } break; case 0x2e: @@ -784,7 +784,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sub %0, %ea1"); #line 1129 "rl78-decode.opc" ID(sub); DR(A); SM(HL, IMMU(1)); Fzac; - + } break; case 0x2f: @@ -799,7 +799,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sub %0, %e!1"); #line 1120 "rl78-decode.opc" ID(sub); DR(A); SM(None, IMMU(2)); Fzac; - + } break; case 0x30: @@ -820,7 +820,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, #%1"); #line 853 "rl78-decode.opc" ID(mov); W(); DRW(rg); SC(IMMU(2)); - + } break; case 0x31: @@ -842,9 +842,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("btclr %s1, $%a0"); #line 416 "rl78-decode.opc" ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T); - + /*----------------------------------------------------------------------*/ - + } break; case 0x01: @@ -862,7 +862,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("btclr %1, $%a0"); #line 410 "rl78-decode.opc" ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T); - + } break; case 0x02: @@ -880,9 +880,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bt %s1, $%a0"); #line 402 "rl78-decode.opc" ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T); - + /*----------------------------------------------------------------------*/ - + } break; case 0x03: @@ -900,7 +900,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bt %1, $%a0"); #line 396 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T); - + } break; case 0x04: @@ -918,9 +918,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bf %s1, $%a0"); #line 363 "rl78-decode.opc" ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F); - + /*----------------------------------------------------------------------*/ - + } break; case 0x05: @@ -938,7 +938,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bf %1, $%a0"); #line 357 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F); - + } break; case 0x07: @@ -956,7 +956,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("shl %0, %1"); #line 1076 "rl78-decode.opc" ID(shl); DR(C); SC(cnt); - + } break; case 0x08: @@ -974,7 +974,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("shl %0, %1"); #line 1073 "rl78-decode.opc" ID(shl); DR(B); SC(cnt); - + } break; case 0x09: @@ -992,7 +992,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("shl %0, %1"); #line 1070 "rl78-decode.opc" ID(shl); DR(A); SC(cnt); - + } break; case 0x0a: @@ -1010,7 +1010,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("shr %0, %1"); #line 1087 "rl78-decode.opc" ID(shr); DR(A); SC(cnt); - + } break; case 0x0b: @@ -1028,7 +1028,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sar %0, %1"); #line 1034 "rl78-decode.opc" ID(sar); DR(A); SC(cnt); - + } break; case 0x0c: @@ -1047,9 +1047,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("shlw %0, %1"); #line 1082 "rl78-decode.opc" ID(shl); W(); DR(BC); SC(wcnt); - + /*----------------------------------------------------------------------*/ - + } break; case 0x0d: @@ -1068,7 +1068,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("shlw %0, %1"); #line 1079 "rl78-decode.opc" ID(shl); W(); DR(AX); SC(wcnt); - + } break; case 0x0e: @@ -1087,9 +1087,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("shrw %0, %1"); #line 1090 "rl78-decode.opc" ID(shr); W(); DR(AX); SC(wcnt); - + /*----------------------------------------------------------------------*/ - + } break; case 0x0f: @@ -1108,9 +1108,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sarw %0, %1"); #line 1037 "rl78-decode.opc" ID(sar); W(); DR(AX); SC(wcnt); - + /*----------------------------------------------------------------------*/ - + } break; case 0x80: @@ -1128,7 +1128,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("btclr %s1, $%a0"); #line 413 "rl78-decode.opc" ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T); - + } break; case 0x81: @@ -1146,7 +1146,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("btclr %e1, $%a0"); #line 407 "rl78-decode.opc" ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T); - + } break; case 0x82: @@ -1164,7 +1164,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bt %s1, $%a0"); #line 399 "rl78-decode.opc" ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T); - + } break; case 0x83: @@ -1182,7 +1182,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bt %e1, $%a0"); #line 393 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T); - + } break; case 0x84: @@ -1200,7 +1200,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bf %s1, $%a0"); #line 360 "rl78-decode.opc" ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F); - + } break; case 0x85: @@ -1218,7 +1218,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bf %e1, $%a0"); #line 354 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F); - + } break; default: UNSUPPORTED(); break; @@ -1241,9 +1241,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xchw %0, %1"); #line 1240 "rl78-decode.opc" ID(xch); W(); DR(AX); SRW(ra); - + /*----------------------------------------------------------------------*/ - + } break; case 0x38: @@ -1257,8 +1257,8 @@ rl78_decode_opcode (unsigned long pc AU, } SYNTAX("mov %e0, #%1"); #line 738 "rl78-decode.opc" - ID(mov); DM(C, IMMU(2)); SC(IMMU(1)); - + ID(mov); DM(C, IMMU(2)); SC(IMMU(1)); + } break; case 0x39: @@ -1272,8 +1272,8 @@ rl78_decode_opcode (unsigned long pc AU, } SYNTAX("mov %e0, #%1"); #line 732 "rl78-decode.opc" - ID(mov); DM(BC, IMMU(2)); SC(IMMU(1)); - + ID(mov); DM(BC, IMMU(2)); SC(IMMU(1)); + } break; case 0x3a: @@ -1288,9 +1288,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subc %0, #%1"); #line 1179 "rl78-decode.opc" ID(subc); DM(None, SADDR); SC(IMMU(1)); Fzac; - + /*----------------------------------------------------------------------*/ - + } break; case 0x3b: @@ -1305,7 +1305,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subc %0, %1"); #line 1176 "rl78-decode.opc" ID(subc); DR(A); SM(None, SADDR); Fzac; - + } break; case 0x3c: @@ -1320,7 +1320,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subc %0, #%1"); #line 1167 "rl78-decode.opc" ID(subc); DR(A); SC(IMMU(1)); Fzac; - + } break; case 0x3d: @@ -1335,7 +1335,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subc %0, %e1"); #line 1155 "rl78-decode.opc" ID(subc); DR(A); SM(HL, 0); Fzac; - + } break; case 0x3e: @@ -1350,7 +1350,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subc %0, %ea1"); #line 1164 "rl78-decode.opc" ID(subc); DR(A); SM(HL, IMMU(1)); Fzac; - + } break; case 0x3f: @@ -1365,7 +1365,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subc %0, %e!1"); #line 1152 "rl78-decode.opc" ID(subc); DR(A); SM(None, IMMU(2)); Fzac; - + } break; case 0x40: @@ -1380,7 +1380,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %e!0, #%1"); #line 480 "rl78-decode.opc" ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac; - + } break; case 0x41: @@ -1394,8 +1394,8 @@ rl78_decode_opcode (unsigned long pc AU, } SYNTAX("mov %0, #%1"); #line 717 "rl78-decode.opc" - ID(mov); DR(ES); SC(IMMU(1)); - + ID(mov); DR(ES); SC(IMMU(1)); + } break; case 0x42: @@ -1410,7 +1410,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmpw %0, %e!1"); #line 531 "rl78-decode.opc" ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac; - + } break; case 0x43: @@ -1430,7 +1430,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmpw %0, %1"); #line 540 "rl78-decode.opc" ID(cmp); W(); DR(AX); SRW(ra); Fzac; - + } break; case 0x44: @@ -1445,7 +1445,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmpw %0, #%1"); #line 537 "rl78-decode.opc" ID(cmp); W(); DR(AX); SC(IMMU(2)); Fzac; - + } break; case 0x46: @@ -1460,9 +1460,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmpw %0, %1"); #line 543 "rl78-decode.opc" ID(cmp); W(); DR(AX); SM(None, SADDR); Fzac; - + /*----------------------------------------------------------------------*/ - + } break; case 0x48: @@ -1476,8 +1476,8 @@ rl78_decode_opcode (unsigned long pc AU, } SYNTAX("mov %e0, %1"); #line 735 "rl78-decode.opc" - ID(mov); DM(BC, IMMU(2)); SR(A); - + ID(mov); DM(BC, IMMU(2)); SR(A); + } break; case 0x49: @@ -1492,7 +1492,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e1"); #line 681 "rl78-decode.opc" ID(mov); DR(A); SM(BC, IMMU(2)); - + } break; case 0x4a: @@ -1507,7 +1507,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %0, #%1"); #line 483 "rl78-decode.opc" ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac; - + } break; case 0x4b: @@ -1522,9 +1522,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %0, %1"); #line 510 "rl78-decode.opc" ID(cmp); DR(A); SM(None, SADDR); Fzac; - + /*----------------------------------------------------------------------*/ - + } break; case 0x4c: @@ -1539,7 +1539,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %0, #%1"); #line 501 "rl78-decode.opc" ID(cmp); DR(A); SC(IMMU(1)); Fzac; - + } break; case 0x4d: @@ -1554,7 +1554,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %0, %e1"); #line 489 "rl78-decode.opc" ID(cmp); DR(A); SM(HL, 0); Fzac; - + } break; case 0x4e: @@ -1569,7 +1569,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %0, %ea1"); #line 498 "rl78-decode.opc" ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac; - + } break; case 0x4f: @@ -1584,7 +1584,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %0, %e!1"); #line 486 "rl78-decode.opc" ID(cmp); DR(A); SM(None, IMMU(2)); Fzac; - + } break; case 0x50: @@ -1609,7 +1609,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, #%1"); #line 669 "rl78-decode.opc" ID(mov); DRB(reg); SC(IMMU(1)); - + } break; case 0x58: @@ -1624,7 +1624,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %e0, %1"); #line 871 "rl78-decode.opc" ID(mov); W(); DM(B, IMMU(2)); SR(AX); - + } break; case 0x59: @@ -1639,7 +1639,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %e1"); #line 862 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(B, IMMU(2)); - + } break; case 0x5a: @@ -1654,9 +1654,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and %0, #%1"); #line 312 "rl78-decode.opc" ID(and); DM(None, SADDR); SC(IMMU(1)); Fz; - + /*----------------------------------------------------------------------*/ - + } break; case 0x5b: @@ -1671,7 +1671,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and %0, %1"); #line 309 "rl78-decode.opc" ID(and); DR(A); SM(None, SADDR); Fz; - + } break; case 0x5c: @@ -1686,7 +1686,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and %0, #%1"); #line 300 "rl78-decode.opc" ID(and); DR(A); SC(IMMU(1)); Fz; - + } break; case 0x5d: @@ -1701,7 +1701,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and %0, %e1"); #line 288 "rl78-decode.opc" ID(and); DR(A); SM(HL, 0); Fz; - + } break; case 0x5e: @@ -1716,7 +1716,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and %0, %ea1"); #line 294 "rl78-decode.opc" ID(and); DR(A); SM(HL, IMMU(1)); Fz; - + } break; case 0x5f: @@ -1731,7 +1731,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and %0, %e!1"); #line 285 "rl78-decode.opc" ID(and); DR(A); SM(None, IMMU(2)); Fz; - + } break; case 0x60: @@ -1755,7 +1755,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %1"); #line 672 "rl78-decode.opc" ID(mov); DR(A); SRB(rba); - + } break; case 0x61: @@ -1784,7 +1784,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("add %0, %1"); #line 225 "rl78-decode.opc" ID(add); DRB(reg); SR(A); Fzac; - + } break; case 0x08: @@ -1808,7 +1808,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("add %0, %1"); #line 219 "rl78-decode.opc" ID(add); DR(A); SRB(rba); Fzac; - + } break; case 0x09: @@ -1823,7 +1823,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addw %0, %ea1"); #line 268 "rl78-decode.opc" ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac; - + } break; case 0x10: @@ -1848,7 +1848,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addc %0, %1"); #line 254 "rl78-decode.opc" ID(addc); DRB(reg); SR(A); Fzac; - + } break; case 0x18: @@ -1872,7 +1872,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addc %0, %1"); #line 251 "rl78-decode.opc" ID(addc); DR(A); SRB(rba); Fzac; - + } break; case 0x20: @@ -1897,7 +1897,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sub %0, %1"); #line 1144 "rl78-decode.opc" ID(sub); DRB(reg); SR(A); Fzac; - + } break; case 0x28: @@ -1921,7 +1921,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sub %0, %1"); #line 1138 "rl78-decode.opc" ID(sub); DR(A); SRB(rba); Fzac; - + } break; case 0x29: @@ -1936,7 +1936,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subw %0, %ea1"); #line 1187 "rl78-decode.opc" ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac; - + } break; case 0x30: @@ -1961,7 +1961,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subc %0, %1"); #line 1173 "rl78-decode.opc" ID(subc); DRB(reg); SR(A); Fzac; - + } break; case 0x38: @@ -1985,7 +1985,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subc %0, %1"); #line 1170 "rl78-decode.opc" ID(subc); DR(A); SRB(rba); Fzac; - + } break; case 0x40: @@ -2010,7 +2010,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %0, %1"); #line 507 "rl78-decode.opc" ID(cmp); DRB(reg); SR(A); Fzac; - + } break; case 0x48: @@ -2034,7 +2034,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %0, %1"); #line 504 "rl78-decode.opc" ID(cmp); DR(A); SRB(rba); Fzac; - + } break; case 0x49: @@ -2049,7 +2049,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmpw %0, %ea1"); #line 534 "rl78-decode.opc" ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac; - + } break; case 0x50: @@ -2074,7 +2074,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and %0, %1"); #line 306 "rl78-decode.opc" ID(and); DRB(reg); SR(A); Fz; - + } break; case 0x58: @@ -2098,7 +2098,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and %0, %1"); #line 303 "rl78-decode.opc" ID(and); DR(A); SRB(rba); Fz; - + } break; case 0x59: @@ -2113,7 +2113,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("inc %ea0"); #line 584 "rl78-decode.opc" ID(add); DM(HL, IMMU(1)); SC(1); Fza; - + } break; case 0x60: @@ -2138,7 +2138,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or %0, %1"); #line 962 "rl78-decode.opc" ID(or); DRB(reg); SR(A); Fz; - + } break; case 0x68: @@ -2162,7 +2162,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or %0, %1"); #line 959 "rl78-decode.opc" ID(or); DR(A); SRB(rba); Fz; - + } break; case 0x69: @@ -2177,7 +2177,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("dec %ea0"); #line 551 "rl78-decode.opc" ID(sub); DM(HL, IMMU(1)); SC(1); Fza; - + } break; case 0x70: @@ -2202,7 +2202,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor %0, %1"); #line 1266 "rl78-decode.opc" ID(xor); DRB(reg); SR(A); Fz; - + } break; case 0x78: @@ -2226,7 +2226,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor %0, %1"); #line 1263 "rl78-decode.opc" ID(xor); DR(A); SRB(rba); Fz; - + } break; case 0x79: @@ -2241,7 +2241,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("incw %ea0"); #line 598 "rl78-decode.opc" ID(add); W(); DM(HL, IMMU(1)); SC(1); - + } break; case 0x80: @@ -2257,7 +2257,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("add %0, %e1"); #line 207 "rl78-decode.opc" ID(add); DR(A); SM2(HL, B, 0); Fzac; - + } break; case 0x82: @@ -2272,7 +2272,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("add %0, %e1"); #line 213 "rl78-decode.opc" ID(add); DR(A); SM2(HL, C, 0); Fzac; - + } break; case 0x84: @@ -2324,9 +2324,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("callt [%x0]"); #line 433 "rl78-decode.opc" ID(call); DM(None, 0x80 + mm*16 + nnn*2); - + /*----------------------------------------------------------------------*/ - + } break; case 0x88: @@ -2351,7 +2351,7 @@ rl78_decode_opcode (unsigned long pc AU, #line 1225 "rl78-decode.opc" /* Note: DECW uses reg == X, so this must follow DECW */ ID(xch); DR(A); SRB(reg); - + } break; case 0x89: @@ -2366,7 +2366,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("decw %ea0"); #line 565 "rl78-decode.opc" ID(sub); W(); DM(HL, IMMU(1)); SC(1); - + } break; case 0x90: @@ -2381,7 +2381,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addc %0, %e1"); #line 239 "rl78-decode.opc" ID(addc); DR(A); SM2(HL, B, 0); Fzac; - + } break; case 0x92: @@ -2396,7 +2396,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("addc %0, %e1"); #line 242 "rl78-decode.opc" ID(addc); DR(A); SM2(HL, C, 0); Fzac; - + } break; case 0xa0: @@ -2412,7 +2412,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sub %0, %e1"); #line 1126 "rl78-decode.opc" ID(sub); DR(A); SM2(HL, B, 0); Fzac; - + } break; case 0xa2: @@ -2427,7 +2427,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sub %0, %e1"); #line 1132 "rl78-decode.opc" ID(sub); DR(A); SM2(HL, C, 0); Fzac; - + } break; case 0xa8: @@ -2442,7 +2442,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xch %0, %1"); #line 1229 "rl78-decode.opc" ID(xch); DR(A); SM(None, SADDR); - + } break; case 0xa9: @@ -2457,7 +2457,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xch %0, %e1"); #line 1222 "rl78-decode.opc" ID(xch); DR(A); SM2(HL, C, 0); - + } break; case 0xaa: @@ -2472,7 +2472,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xch %0, %e!1"); #line 1204 "rl78-decode.opc" ID(xch); DR(A); SM(None, IMMU(2)); - + } break; case 0xab: @@ -2487,7 +2487,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xch %0, %1"); #line 1232 "rl78-decode.opc" ID(xch); DR(A); SM(None, SFR); - + } break; case 0xac: @@ -2502,7 +2502,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xch %0, %e1"); #line 1213 "rl78-decode.opc" ID(xch); DR(A); SM(HL, 0); - + } break; case 0xad: @@ -2517,7 +2517,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xch %0, %ea1"); #line 1219 "rl78-decode.opc" ID(xch); DR(A); SM(HL, IMMU(1)); - + } break; case 0xae: @@ -2532,7 +2532,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xch %0, %e1"); #line 1207 "rl78-decode.opc" ID(xch); DR(A); SM(DE, 0); - + } break; case 0xaf: @@ -2547,7 +2547,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xch %0, %e1"); #line 1210 "rl78-decode.opc" ID(xch); DR(A); SM(DE, IMMU(1)); - + } break; case 0xb0: @@ -2562,7 +2562,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subc %0, %e1"); #line 1158 "rl78-decode.opc" ID(subc); DR(A); SM2(HL, B, 0); Fzac; - + } break; case 0xb2: @@ -2577,7 +2577,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("subc %0, %e1"); #line 1161 "rl78-decode.opc" ID(subc); DR(A); SM2(HL, C, 0); Fzac; - + } break; case 0xb8: @@ -2591,8 +2591,8 @@ rl78_decode_opcode (unsigned long pc AU, } SYNTAX("mov %0, %1"); #line 723 "rl78-decode.opc" - ID(mov); DR(ES); SM(None, SADDR); - + ID(mov); DR(ES); SM(None, SADDR); + } break; case 0xb9: @@ -2607,7 +2607,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xch %0, %e1"); #line 1216 "rl78-decode.opc" ID(xch); DR(A); SM2(HL, B, 0); - + } break; case 0xc0: @@ -2622,7 +2622,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %0, %e1"); #line 492 "rl78-decode.opc" ID(cmp); DR(A); SM2(HL, B, 0); Fzac; - + } break; case 0xc2: @@ -2637,7 +2637,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp %0, %e1"); #line 495 "rl78-decode.opc" ID(cmp); DR(A); SM2(HL, C, 0); Fzac; - + } break; case 0xc3: @@ -2652,7 +2652,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bh $%a0"); #line 340 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H); - + } break; case 0xc8: @@ -2667,7 +2667,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sk%c1"); #line 1095 "rl78-decode.opc" ID(skip); COND(C); - + } break; case 0xc9: @@ -2682,7 +2682,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e1"); #line 660 "rl78-decode.opc" ID(mov); DR(A); SM2(HL, B, 0); - + } break; case 0xca: @@ -2703,7 +2703,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("call %0"); #line 430 "rl78-decode.opc" ID(call); DRW(rg); - + } break; case 0xcb: @@ -2718,9 +2718,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("br ax"); #line 380 "rl78-decode.opc" ID(branch); DR(AX); - + /*----------------------------------------------------------------------*/ - + } break; case 0xcc: @@ -2735,9 +2735,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("brk"); #line 388 "rl78-decode.opc" ID(break); - + /*----------------------------------------------------------------------*/ - + } break; case 0xcd: @@ -2752,9 +2752,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("pop %s0"); #line 990 "rl78-decode.opc" ID(mov); W(); DR(PSW); SPOP(); - + /*----------------------------------------------------------------------*/ - + } break; case 0xce: @@ -2769,9 +2769,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movs %ea0, %1"); #line 811 "rl78-decode.opc" ID(mov); DM(HL, IMMU(1)); SR(X); Fzc; - + /*----------------------------------------------------------------------*/ - + } break; case 0xcf: @@ -2792,9 +2792,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sel rb%1"); #line 1042 "rl78-decode.opc" ID(sel); SC(rb); - + /*----------------------------------------------------------------------*/ - + } break; case 0xd0: @@ -2809,7 +2809,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and %0, %e1"); #line 291 "rl78-decode.opc" ID(and); DR(A); SM2(HL, B, 0); Fz; - + } break; case 0xd2: @@ -2824,7 +2824,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and %0, %e1"); #line 297 "rl78-decode.opc" ID(and); DR(A); SM2(HL, C, 0); Fz; - + } break; case 0xd3: @@ -2839,7 +2839,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bnh $%a0"); #line 343 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH); - + } break; case 0xd8: @@ -2854,7 +2854,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sk%c1"); #line 1101 "rl78-decode.opc" ID(skip); COND(NC); - + } break; case 0xd9: @@ -2869,7 +2869,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %e0, %1"); #line 627 "rl78-decode.opc" ID(mov); DM2(HL, B, 0); SR(A); - + } break; case 0xdb: @@ -2884,7 +2884,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("ror %0, %1"); #line 1023 "rl78-decode.opc" ID(ror); DR(A); SC(1); - + } break; case 0xdc: @@ -2899,7 +2899,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("rolc %0, %1"); #line 1017 "rl78-decode.opc" ID(rolc); DR(A); SC(1); - + } break; case 0xdd: @@ -2914,9 +2914,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("push %s1"); #line 998 "rl78-decode.opc" ID(mov); W(); DPUSH(); SR(PSW); - + /*----------------------------------------------------------------------*/ - + } break; case 0xde: @@ -2931,9 +2931,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmps %0, %ea1"); #line 526 "rl78-decode.opc" ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac; - + /*----------------------------------------------------------------------*/ - + } break; case 0xe0: @@ -2948,7 +2948,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or %0, %e1"); #line 947 "rl78-decode.opc" ID(or); DR(A); SM2(HL, B, 0); Fz; - + } break; case 0xe2: @@ -2963,7 +2963,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or %0, %e1"); #line 953 "rl78-decode.opc" ID(or); DR(A); SM2(HL, C, 0); Fz; - + } break; case 0xe3: @@ -2978,7 +2978,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sk%c1"); #line 1098 "rl78-decode.opc" ID(skip); COND(H); - + } break; case 0xe8: @@ -2993,9 +2993,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sk%c1"); #line 1110 "rl78-decode.opc" ID(skip); COND(Z); - + /*----------------------------------------------------------------------*/ - + } break; case 0xe9: @@ -3010,7 +3010,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e1"); #line 663 "rl78-decode.opc" ID(mov); DR(A); SM2(HL, C, 0); - + } break; case 0xeb: @@ -3025,7 +3025,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("rol %0, %1"); #line 1014 "rl78-decode.opc" ID(rol); DR(A); SC(1); - + } break; case 0xec: @@ -3040,9 +3040,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("retb"); #line 1009 "rl78-decode.opc" ID(reti); - + /*----------------------------------------------------------------------*/ - + } break; case 0xed: @@ -3057,9 +3057,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("halt"); #line 576 "rl78-decode.opc" ID(halt); - + /*----------------------------------------------------------------------*/ - + } break; case 0xee: @@ -3078,7 +3078,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("rolwc %0, %1"); #line 1020 "rl78-decode.opc" ID(rolc); W(); DRW(r); SC(1); - + } break; case 0xf0: @@ -3093,7 +3093,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor %0, %e1"); #line 1251 "rl78-decode.opc" ID(xor); DR(A); SM2(HL, B, 0); Fz; - + } break; case 0xf2: @@ -3108,7 +3108,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor %0, %e1"); #line 1257 "rl78-decode.opc" ID(xor); DR(A); SM2(HL, C, 0); Fz; - + } break; case 0xf3: @@ -3123,7 +3123,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sk%c1"); #line 1104 "rl78-decode.opc" ID(skip); COND(NH); - + } break; case 0xf8: @@ -3138,7 +3138,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("sk%c1"); #line 1107 "rl78-decode.opc" ID(skip); COND(NZ); - + } break; case 0xf9: @@ -3153,7 +3153,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %e0, %1"); #line 636 "rl78-decode.opc" ID(mov); DM2(HL, C, 0); SR(A); - + } break; case 0xfb: @@ -3168,12 +3168,12 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("rorc %0, %1"); #line 1026 "rl78-decode.opc" ID(rorc); DR(A); SC(1); - + /*----------------------------------------------------------------------*/ - + /* Note that the branch insns need to be listed before the shift ones, as "shift count of zero" means "branch insn" */ - + } break; case 0xfc: @@ -3188,7 +3188,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("reti"); #line 1006 "rl78-decode.opc" ID(reti); - + } break; case 0xfd: @@ -3203,9 +3203,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("stop"); #line 1115 "rl78-decode.opc" ID(stop); - + /*----------------------------------------------------------------------*/ - + } break; default: UNSUPPORTED(); break; @@ -3223,7 +3223,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %e0, %1"); #line 874 "rl78-decode.opc" ID(mov); W(); DM(C, IMMU(2)); SR(AX); - + } break; case 0x69: @@ -3238,7 +3238,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %e1"); #line 865 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(C, IMMU(2)); - + } break; case 0x6a: @@ -3253,9 +3253,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or %0, #%1"); #line 968 "rl78-decode.opc" ID(or); DM(None, SADDR); SC(IMMU(1)); Fz; - + /*----------------------------------------------------------------------*/ - + } break; case 0x6b: @@ -3270,7 +3270,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or %0, %1"); #line 965 "rl78-decode.opc" ID(or); DR(A); SM(None, SADDR); Fz; - + } break; case 0x6c: @@ -3285,7 +3285,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or %0, #%1"); #line 956 "rl78-decode.opc" ID(or); DR(A); SC(IMMU(1)); Fz; - + } break; case 0x6d: @@ -3300,7 +3300,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or %0, %e1"); #line 944 "rl78-decode.opc" ID(or); DR(A); SM(HL, 0); Fz; - + } break; case 0x6e: @@ -3315,7 +3315,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or %0, %ea1"); #line 950 "rl78-decode.opc" ID(or); DR(A); SM(HL, IMMU(1)); Fz; - + } break; case 0x6f: @@ -3330,7 +3330,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or %0, %e!1"); #line 941 "rl78-decode.opc" ID(or); DR(A); SM(None, IMMU(2)); Fz; - + } break; case 0x70: @@ -3354,7 +3354,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %1"); #line 696 "rl78-decode.opc" ID(mov); DRB(rba); SR(A); - + } break; case 0x71: @@ -3383,7 +3383,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("set1 %e!0"); #line 1047 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); DB(bit); SC(1); - + } break; case 0x01: @@ -3408,7 +3408,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov1 %0, cy"); #line 803 "rl78-decode.opc" ID(mov); DM(None, SADDR); DB(bit); SCY(); - + } break; case 0x02: @@ -3433,9 +3433,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("set1 %0"); #line 1065 "rl78-decode.opc" ID(mov); DM(None, SADDR); DB(bit); SC(1); - + /*----------------------------------------------------------------------*/ - + } break; case 0x03: @@ -3460,9 +3460,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("clr1 %0"); #line 456 "rl78-decode.opc" ID(mov); DM(None, SADDR); DB(bit); SC(0); - + /*----------------------------------------------------------------------*/ - + } break; case 0x04: @@ -3487,7 +3487,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov1 cy, %1"); #line 797 "rl78-decode.opc" ID(mov); DCY(); SM(None, SADDR); SB(bit); - + } break; case 0x05: @@ -3512,12 +3512,12 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and1 cy, %s1"); #line 326 "rl78-decode.opc" ID(and); DCY(); SM(None, SADDR); SB(bit); - + /*----------------------------------------------------------------------*/ - + /* Note that the branch insns need to be listed before the shift ones, as "shift count of zero" means "branch insn" */ - + } break; case 0x06: @@ -3542,9 +3542,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or1 cy, %s1"); #line 982 "rl78-decode.opc" ID(or); DCY(); SM(None, SADDR); SB(bit); - + /*----------------------------------------------------------------------*/ - + } break; case 0x07: @@ -3569,9 +3569,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor1 cy, %s1"); #line 1286 "rl78-decode.opc" ID(xor); DCY(); SM(None, SADDR); SB(bit); - + /*----------------------------------------------------------------------*/ - + } break; case 0x08: @@ -3596,7 +3596,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("clr1 %e!0"); #line 438 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); DB(bit); SC(0); - + } break; case 0x09: @@ -3621,9 +3621,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov1 %s0, cy"); #line 806 "rl78-decode.opc" ID(mov); DM(None, SFR); DB(bit); SCY(); - + /*----------------------------------------------------------------------*/ - + } break; case 0x0a: @@ -3651,7 +3651,7 @@ rl78_decode_opcode (unsigned long pc AU, ID(mov); DM(None, op0); DB(bit); SC(1); if (op0 == RL78_SFR_PSW && bit == 7) rl78->syntax = "ei"; - + } break; case 0x0b: @@ -3679,7 +3679,7 @@ rl78_decode_opcode (unsigned long pc AU, ID(mov); DM(None, op0); DB(bit); SC(0); if (op0 == RL78_SFR_PSW && bit == 7) rl78->syntax = "di"; - + } break; case 0x0c: @@ -3704,7 +3704,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov1 cy, %s1"); #line 800 "rl78-decode.opc" ID(mov); DCY(); SM(None, SFR); SB(bit); - + } break; case 0x0d: @@ -3729,7 +3729,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and1 cy, %s1"); #line 323 "rl78-decode.opc" ID(and); DCY(); SM(None, SFR); SB(bit); - + } break; case 0x0e: @@ -3754,7 +3754,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or1 cy, %s1"); #line 979 "rl78-decode.opc" ID(or); DCY(); SM(None, SFR); SB(bit); - + } break; case 0x0f: @@ -3779,7 +3779,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor1 cy, %s1"); #line 1283 "rl78-decode.opc" ID(xor); DCY(); SM(None, SFR); SB(bit); - + } break; case 0x80: @@ -3794,7 +3794,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("set1 cy"); #line 1056 "rl78-decode.opc" ID(mov); DCY(); SC(1); - + } break; case 0x81: @@ -3819,7 +3819,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov1 %e0, cy"); #line 785 "rl78-decode.opc" ID(mov); DM(HL, 0); DB(bit); SCY(); - + } break; case 0x82: @@ -3844,7 +3844,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("set1 %e0"); #line 1050 "rl78-decode.opc" ID(mov); DM(HL, 0); DB(bit); SC(1); - + } break; case 0x83: @@ -3869,7 +3869,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("clr1 %e0"); #line 441 "rl78-decode.opc" ID(mov); DM(HL, 0); DB(bit); SC(0); - + } break; case 0x84: @@ -3894,7 +3894,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov1 cy, %e1"); #line 791 "rl78-decode.opc" ID(mov); DCY(); SM(HL, 0); SB(bit); - + } break; case 0x85: @@ -3919,7 +3919,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and1 cy, %e1"); #line 317 "rl78-decode.opc" ID(and); DCY(); SM(HL, 0); SB(bit); - + } break; case 0x86: @@ -3944,7 +3944,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or1 cy, %e1"); #line 973 "rl78-decode.opc" ID(or); DCY(); SM(HL, 0); SB(bit); - + } break; case 0x87: @@ -3969,7 +3969,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor1 cy, %e1"); #line 1277 "rl78-decode.opc" ID(xor); DCY(); SM(HL, 0); SB(bit); - + } break; case 0x88: @@ -3984,7 +3984,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("clr1 cy"); #line 447 "rl78-decode.opc" ID(mov); DCY(); SC(0); - + } break; case 0x89: @@ -4009,7 +4009,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov1 %e0, cy"); #line 788 "rl78-decode.opc" ID(mov); DR(A); DB(bit); SCY(); - + } break; case 0x8a: @@ -4034,7 +4034,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("set1 %0"); #line 1053 "rl78-decode.opc" ID(mov); DR(A); DB(bit); SC(1); - + } break; case 0x8b: @@ -4059,7 +4059,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("clr1 %0"); #line 444 "rl78-decode.opc" ID(mov); DR(A); DB(bit); SC(0); - + } break; case 0x8c: @@ -4084,7 +4084,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov1 cy, %e1"); #line 794 "rl78-decode.opc" ID(mov); DCY(); SR(A); SB(bit); - + } break; case 0x8d: @@ -4109,7 +4109,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("and1 cy, %1"); #line 320 "rl78-decode.opc" ID(and); DCY(); SR(A); SB(bit); - + } break; case 0x8e: @@ -4134,7 +4134,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("or1 cy, %1"); #line 976 "rl78-decode.opc" ID(or); DCY(); SR(A); SB(bit); - + } break; case 0x8f: @@ -4159,7 +4159,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor1 cy, %1"); #line 1280 "rl78-decode.opc" ID(xor); DCY(); SR(A); SB(bit); - + } break; case 0xc0: @@ -4174,9 +4174,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("not1 cy"); #line 917 "rl78-decode.opc" ID(xor); DCY(); SC(1); - + /*----------------------------------------------------------------------*/ - + } break; default: UNSUPPORTED(); break; @@ -4194,7 +4194,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %e0, %1"); #line 877 "rl78-decode.opc" ID(mov); W(); DM(BC, IMMU(2)); SR(AX); - + } break; case 0x79: @@ -4209,7 +4209,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %e1"); #line 868 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(BC, IMMU(2)); - + } break; case 0x7a: @@ -4224,9 +4224,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor %0, #%1"); #line 1272 "rl78-decode.opc" ID(xor); DM(None, SADDR); SC(IMMU(1)); Fz; - + /*----------------------------------------------------------------------*/ - + } break; case 0x7b: @@ -4241,7 +4241,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor %0, %1"); #line 1269 "rl78-decode.opc" ID(xor); DR(A); SM(None, SADDR); Fz; - + } break; case 0x7c: @@ -4256,7 +4256,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor %0, #%1"); #line 1260 "rl78-decode.opc" ID(xor); DR(A); SC(IMMU(1)); Fz; - + } break; case 0x7d: @@ -4271,7 +4271,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor %0, %e1"); #line 1248 "rl78-decode.opc" ID(xor); DR(A); SM(HL, 0); Fz; - + } break; case 0x7e: @@ -4286,7 +4286,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor %0, %ea1"); #line 1254 "rl78-decode.opc" ID(xor); DR(A); SM(HL, IMMU(1)); Fz; - + } break; case 0x7f: @@ -4301,7 +4301,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("xor %0, %e!1"); #line 1245 "rl78-decode.opc" ID(xor); DR(A); SM(None, IMMU(2)); Fz; - + } break; case 0x80: @@ -4326,7 +4326,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("inc %0"); #line 587 "rl78-decode.opc" ID(add); DRB(reg); SC(1); Fza; - + } break; case 0x88: @@ -4341,7 +4341,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e1"); #line 666 "rl78-decode.opc" ID(mov); DR(A); SM(SP, IMMU(1)); - + } break; case 0x89: @@ -4356,7 +4356,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e1"); #line 648 "rl78-decode.opc" ID(mov); DR(A); SM(DE, 0); - + } break; case 0x8a: @@ -4371,7 +4371,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e1"); #line 651 "rl78-decode.opc" ID(mov); DR(A); SM(DE, IMMU(1)); - + } break; case 0x8b: @@ -4386,7 +4386,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e1"); #line 654 "rl78-decode.opc" ID(mov); DR(A); SM(HL, 0); - + } break; case 0x8c: @@ -4401,7 +4401,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %ea1"); #line 657 "rl78-decode.opc" ID(mov); DR(A); SM(HL, IMMU(1)); - + } break; case 0x8d: @@ -4416,7 +4416,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %1"); #line 690 "rl78-decode.opc" ID(mov); DR(A); SM(None, SADDR); - + } break; case 0x8e: @@ -4431,7 +4431,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %s1"); #line 687 "rl78-decode.opc" ID(mov); DR(A); SM(None, SFR); - + } break; case 0x8f: @@ -4446,7 +4446,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e!1"); #line 645 "rl78-decode.opc" ID(mov); DR(A); SM(None, IMMU(2)); - + } break; case 0x90: @@ -4471,7 +4471,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("dec %0"); #line 554 "rl78-decode.opc" ID(sub); DRB(reg); SC(1); Fza; - + } break; case 0x98: @@ -4486,7 +4486,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %1"); #line 642 "rl78-decode.opc" ID(mov); DM(SP, IMMU(1)); SR(A); - + } break; case 0x99: @@ -4501,7 +4501,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %e0, %1"); #line 615 "rl78-decode.opc" ID(mov); DM(DE, 0); SR(A); - + } break; case 0x9a: @@ -4516,7 +4516,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %e0, %1"); #line 621 "rl78-decode.opc" ID(mov); DM(DE, IMMU(1)); SR(A); - + } break; case 0x9b: @@ -4531,7 +4531,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %e0, %1"); #line 624 "rl78-decode.opc" ID(mov); DM(HL, 0); SR(A); - + } break; case 0x9c: @@ -4546,7 +4546,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %ea0, %1"); #line 633 "rl78-decode.opc" ID(mov); DM(HL, IMMU(1)); SR(A); - + } break; case 0x9d: @@ -4561,7 +4561,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %1"); #line 747 "rl78-decode.opc" ID(mov); DM(None, SADDR); SR(A); - + } break; case 0x9e: @@ -4576,9 +4576,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %1"); #line 780 "rl78-decode.opc" ID(mov); DM(None, SFR); SR(A); - + /*----------------------------------------------------------------------*/ - + } break; case 0x9f: @@ -4593,7 +4593,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %e!0, %1"); #line 612 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); SR(A); - + } break; case 0xa0: @@ -4608,7 +4608,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("inc %e!0"); #line 581 "rl78-decode.opc" ID(add); DM(None, IMMU(2)); SC(1); Fza; - + } break; case 0xa1: @@ -4629,7 +4629,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("incw %0"); #line 601 "rl78-decode.opc" ID(add); W(); DRW(rg); SC(1); - + } break; case 0xa2: @@ -4644,7 +4644,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("incw %e!0"); #line 595 "rl78-decode.opc" ID(add); W(); DM(None, IMMU(2)); SC(1); - + } break; case 0xa4: @@ -4659,9 +4659,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("inc %0"); #line 590 "rl78-decode.opc" ID(add); DM(None, SADDR); SC(1); Fza; - + /*----------------------------------------------------------------------*/ - + } break; case 0xa6: @@ -4676,9 +4676,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("incw %0"); #line 604 "rl78-decode.opc" ID(add); W(); DM(None, SADDR); SC(1); - + /*----------------------------------------------------------------------*/ - + } break; case 0xa8: @@ -4693,7 +4693,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %1"); #line 850 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(SP, IMMU(1)); - + } break; case 0xa9: @@ -4708,7 +4708,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %e1"); #line 838 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(DE, 0); - + } break; case 0xaa: @@ -4723,7 +4723,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %e1"); #line 841 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(DE, IMMU(1)); - + } break; case 0xab: @@ -4738,7 +4738,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %e1"); #line 844 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(HL, 0); - + } break; case 0xac: @@ -4753,7 +4753,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %ea1"); #line 847 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(HL, IMMU(1)); - + } break; case 0xad: @@ -4768,7 +4768,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %1"); #line 880 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(None, SADDR); - + } break; case 0xae: @@ -4783,7 +4783,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %s1"); #line 883 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(None, SFR); - + } break; case 0xaf: @@ -4798,8 +4798,8 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %e!1"); #line 834 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(None, IMMU(2)); - - + + } break; case 0xb0: @@ -4814,7 +4814,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("dec %e!0"); #line 548 "rl78-decode.opc" ID(sub); DM(None, IMMU(2)); SC(1); Fza; - + } break; case 0xb1: @@ -4835,7 +4835,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("decw %0"); #line 568 "rl78-decode.opc" ID(sub); W(); DRW(rg); SC(1); - + } break; case 0xb2: @@ -4850,7 +4850,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("decw %e!0"); #line 562 "rl78-decode.opc" ID(sub); W(); DM(None, IMMU(2)); SC(1); - + } break; case 0xb4: @@ -4865,9 +4865,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("dec %0"); #line 557 "rl78-decode.opc" ID(sub); DM(None, SADDR); SC(1); Fza; - + /*----------------------------------------------------------------------*/ - + } break; case 0xb6: @@ -4882,9 +4882,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("decw %0"); #line 571 "rl78-decode.opc" ID(sub); W(); DM(None, SADDR); SC(1); - + /*----------------------------------------------------------------------*/ - + } break; case 0xb8: @@ -4899,7 +4899,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %1"); #line 831 "rl78-decode.opc" ID(mov); W(); DM(SP, IMMU(1)); SR(AX); - + } break; case 0xb9: @@ -4914,7 +4914,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %e0, %1"); #line 819 "rl78-decode.opc" ID(mov); W(); DM(DE, 0); SR(AX); - + } break; case 0xba: @@ -4929,7 +4929,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %e0, %1"); #line 822 "rl78-decode.opc" ID(mov); W(); DM(DE, IMMU(1)); SR(AX); - + } break; case 0xbb: @@ -4944,7 +4944,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %e0, %1"); #line 825 "rl78-decode.opc" ID(mov); W(); DM(HL, 0); SR(AX); - + } break; case 0xbc: @@ -4959,7 +4959,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %ea0, %1"); #line 828 "rl78-decode.opc" ID(mov); W(); DM(HL, IMMU(1)); SR(AX); - + } break; case 0xbd: @@ -4974,7 +4974,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %1"); #line 895 "rl78-decode.opc" ID(mov); W(); DM(None, SADDR); SR(AX); - + } break; case 0xbe: @@ -4989,9 +4989,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %1"); #line 901 "rl78-decode.opc" ID(mov); W(); DM(None, SFR); SR(AX); - + /*----------------------------------------------------------------------*/ - + } break; case 0xbf: @@ -5006,7 +5006,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %e!0, %1"); #line 816 "rl78-decode.opc" ID(mov); W(); DM(None, IMMU(2)); SR(AX); - + } break; case 0xc0: @@ -5027,7 +5027,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("pop %0"); #line 987 "rl78-decode.opc" ID(mov); W(); DRW(rg); SPOP(); - + } break; case 0xc1: @@ -5048,7 +5048,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("push %1"); #line 995 "rl78-decode.opc" ID(mov); W(); DPUSH(); SRW(rg); - + } break; case 0xc8: @@ -5063,7 +5063,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, #%1"); #line 639 "rl78-decode.opc" ID(mov); DM(SP, IMMU(1)); SC(IMMU(1)); - + } break; case 0xc9: @@ -5078,7 +5078,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, #%1"); #line 892 "rl78-decode.opc" ID(mov); W(); DM(None, SADDR); SC(IMMU(2)); - + } break; case 0xca: @@ -5093,7 +5093,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %e0, #%1"); #line 618 "rl78-decode.opc" ID(mov); DM(DE, IMMU(1)); SC(IMMU(1)); - + } break; case 0xcb: @@ -5108,7 +5108,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, #%1"); #line 898 "rl78-decode.opc" ID(mov); W(); DM(None, SFR); SC(IMMU(2)); - + } break; case 0xcc: @@ -5123,7 +5123,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %ea0, #%1"); #line 630 "rl78-decode.opc" ID(mov); DM(HL, IMMU(1)); SC(IMMU(1)); - + } break; case 0xcd: @@ -5138,7 +5138,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, #%1"); #line 744 "rl78-decode.opc" ID(mov); DM(None, SADDR); SC(IMMU(1)); - + } break; case 0xce: @@ -5180,7 +5180,7 @@ rl78_decode_opcode (unsigned long pc AU, rl78->syntax = "divwu"; ID(divwu); break; } - + } break; case 0xcf: @@ -5195,7 +5195,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %e!0, #%1"); #line 609 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); SC(IMMU(1)); - + } break; case 0xd0: @@ -5216,7 +5216,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp0 %0"); #line 518 "rl78-decode.opc" ID(cmp); DRB(rg); SC(0); Fzac; - + } break; case 0xd4: @@ -5231,9 +5231,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp0 %0"); #line 521 "rl78-decode.opc" ID(cmp); DM(None, SADDR); SC(0); Fzac; - + /*----------------------------------------------------------------------*/ - + } break; case 0xd5: @@ -5248,7 +5248,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("cmp0 %e!0"); #line 515 "rl78-decode.opc" ID(cmp); DM(None, IMMU(2)); SC(0); Fzac; - + } break; case 0xd6: @@ -5264,9 +5264,9 @@ rl78_decode_opcode (unsigned long pc AU, #line 906 "rl78-decode.opc" if (isa == RL78_ISA_G14) ID(mulu); - + /*----------------------------------------------------------------------*/ - + } break; case 0xd7: @@ -5281,7 +5281,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("ret"); #line 1003 "rl78-decode.opc" ID(ret); - + } break; case 0xd8: @@ -5296,7 +5296,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %1"); #line 711 "rl78-decode.opc" ID(mov); DR(X); SM(None, SADDR); - + } break; case 0xd9: @@ -5311,7 +5311,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e!1"); #line 708 "rl78-decode.opc" ID(mov); DR(X); SM(None, IMMU(2)); - + } break; case 0xda: @@ -5331,7 +5331,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %1"); #line 889 "rl78-decode.opc" ID(mov); W(); DRW(ra); SM(None, SADDR); - + } break; case 0xdb: @@ -5351,7 +5351,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("movw %0, %e!1"); #line 886 "rl78-decode.opc" ID(mov); W(); DRW(ra); SM(None, IMMU(2)); - + } break; case 0xdc: @@ -5366,7 +5366,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bc $%a0"); #line 334 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C); - + } break; case 0xdd: @@ -5381,7 +5381,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bz $%a0"); #line 346 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z); - + } break; case 0xde: @@ -5396,7 +5396,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bnc $%a0"); #line 337 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC); - + } break; case 0xdf: @@ -5411,9 +5411,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("bnz $%a0"); #line 349 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ); - + /*----------------------------------------------------------------------*/ - + } break; case 0xe0: @@ -5434,7 +5434,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("oneb %0"); #line 925 "rl78-decode.opc" ID(mov); DRB(rg); SC(1); - + } break; case 0xe4: @@ -5449,9 +5449,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("oneb %0"); #line 928 "rl78-decode.opc" ID(mov); DM(None, SADDR); SC(1); - + /*----------------------------------------------------------------------*/ - + } break; case 0xe5: @@ -5466,7 +5466,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("oneb %e!0"); #line 922 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); SC(1); - + } break; case 0xe6: @@ -5481,7 +5481,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("onew %0"); #line 933 "rl78-decode.opc" ID(mov); DR(AX); SC(1); - + } break; case 0xe7: @@ -5496,9 +5496,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("onew %0"); #line 936 "rl78-decode.opc" ID(mov); DR(BC); SC(1); - + /*----------------------------------------------------------------------*/ - + } break; case 0xe8: @@ -5513,7 +5513,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %1"); #line 699 "rl78-decode.opc" ID(mov); DR(B); SM(None, SADDR); - + } break; case 0xe9: @@ -5528,7 +5528,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e!1"); #line 693 "rl78-decode.opc" ID(mov); DR(B); SM(None, IMMU(2)); - + } break; case 0xec: @@ -5543,7 +5543,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("br !%!a0"); #line 368 "rl78-decode.opc" ID(branch); DC(IMMU(3)); - + } break; case 0xed: @@ -5558,7 +5558,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("br %!a0"); #line 371 "rl78-decode.opc" ID(branch); DC(IMMU(2)); - + } break; case 0xee: @@ -5573,7 +5573,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("br $%!a0"); #line 374 "rl78-decode.opc" ID(branch); DC(pc+IMMS(2)+3); - + } break; case 0xef: @@ -5588,7 +5588,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("br $%a0"); #line 377 "rl78-decode.opc" ID(branch); DC(pc+IMMS(1)+2); - + } break; case 0xf0: @@ -5609,7 +5609,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("clrb %0"); #line 464 "rl78-decode.opc" ID(mov); DRB(rg); SC(0); - + } break; case 0xf4: @@ -5624,9 +5624,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("clrb %0"); #line 467 "rl78-decode.opc" ID(mov); DM(None, SADDR); SC(0); - + /*----------------------------------------------------------------------*/ - + } break; case 0xf5: @@ -5641,7 +5641,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("clrb %e!0"); #line 461 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); SC(0); - + } break; case 0xf6: @@ -5656,7 +5656,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("clrw %0"); #line 472 "rl78-decode.opc" ID(mov); DR(AX); SC(0); - + } break; case 0xf7: @@ -5671,9 +5671,9 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("clrw %0"); #line 475 "rl78-decode.opc" ID(mov); DR(BC); SC(0); - + /*----------------------------------------------------------------------*/ - + } break; case 0xf8: @@ -5688,7 +5688,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %1"); #line 705 "rl78-decode.opc" ID(mov); DR(C); SM(None, SADDR); - + } break; case 0xf9: @@ -5703,7 +5703,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("mov %0, %e!1"); #line 702 "rl78-decode.opc" ID(mov); DR(C); SM(None, IMMU(2)); - + } break; case 0xfc: @@ -5718,7 +5718,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("call !%!a0"); #line 421 "rl78-decode.opc" ID(call); DC(IMMU(3)); - + } break; case 0xfd: @@ -5733,7 +5733,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("call %!a0"); #line 424 "rl78-decode.opc" ID(call); DC(IMMU(2)); - + } break; case 0xfe: @@ -5748,7 +5748,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("call $%!a0"); #line 427 "rl78-decode.opc" ID(call); DC(pc+IMMS(2)+3); - + } break; case 0xff: @@ -5763,7 +5763,7 @@ rl78_decode_opcode (unsigned long pc AU, SYNTAX("brk1"); #line 385 "rl78-decode.opc" ID(break); - + } break; } |