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-rw-r--r--opcodes/mt-desc.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/opcodes/mt-desc.c b/opcodes/mt-desc.c
index ca1f50c..37a02c9 100644
--- a/opcodes/mt-desc.c
+++ b/opcodes/mt-desc.c
@@ -1176,6 +1176,7 @@ mt_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
CGEN_CPU_OPEN_ENDIAN: specify endian choice
+ CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
CGEN_CPU_OPEN_END: terminates arguments
??? Simultaneous multiple isas might not make sense, but it's not (yet)
@@ -1189,6 +1190,7 @@ mt_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
unsigned int machs = 0; /* 0 = "unspecified" */
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
+ enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
va_list ap;
if (! init_p)
@@ -1223,6 +1225,9 @@ mt_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
case CGEN_CPU_OPEN_ENDIAN :
endian = va_arg (ap, enum cgen_endian);
break;
+ case CGEN_CPU_OPEN_INSN_ENDIAN :
+ insn_endian = va_arg (ap, enum cgen_endian);
+ break;
default :
opcodes_error_handler
(/* xgettext:c-format */
@@ -1252,11 +1257,8 @@ mt_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
cd->isas = cgen_bitset_copy (isas);
cd->machs = machs;
cd->endian = endian;
- /* FIXME: for the sparc case we can determine insn-endianness statically.
- The worry here is where both data and insn endian can be independently
- chosen, in which case this function will need another argument.
- Actually, will want to allow for more arguments in the future anyway. */
- cd->insn_endian = endian;
+ cd->insn_endian
+ = (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
/* Table (re)builder. */
cd->rebuild_tables = mt_cgen_rebuild_tables;