diff options
Diffstat (limited to 'opcodes/m32r-asm.c')
| -rw-r--r-- | opcodes/m32r-asm.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c index a7bbf9c..8bc91c1 100644 --- a/opcodes/m32r-asm.c +++ b/opcodes/m32r-asm.c @@ -331,7 +331,7 @@ m32r_cgen_parse_operand (CGEN_CPU_DESC cd, return errmsg; } -cgen_parse_fn * const m32r_cgen_parse_handlers[] = +cgen_parse_fn * const m32r_cgen_parse_handlers[] = { parse_insn_normal, }; @@ -361,9 +361,9 @@ CGEN_ASM_INIT_HOOK Returns NULL for success, an error message for failure. */ -char * +char * m32r_cgen_build_insn_regex (CGEN_INSN *insn) -{ +{ CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); const char *mnem = CGEN_INSN_MNEMONIC (insn); char rxbuf[CGEN_MAX_RX_ELEMENTS]; @@ -402,18 +402,18 @@ m32r_cgen_build_insn_regex (CGEN_INSN *insn) /* Copy any remaining literals from the syntax string into the rx. */ for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) { - if (CGEN_SYNTAX_CHAR_P (* syn)) + if (CGEN_SYNTAX_CHAR_P (* syn)) { char c = CGEN_SYNTAX_CHAR (* syn); - switch (c) + switch (c) { /* Escape any regex metacharacters in the syntax. */ - case '.': case '[': case '\\': - case '*': case '^': case '$': + case '.': case '[': case '\\': + case '*': case '^': case '$': #ifdef CGEN_ESCAPE_EXTENDED_REGEX - case '?': case '{': case '}': + case '?': case '{': case '}': case '(': case ')': case '*': case '|': case '+': case ']': #endif @@ -443,20 +443,20 @@ m32r_cgen_build_insn_regex (CGEN_INSN *insn) } /* Trailing whitespace ok. */ - * rx++ = '['; - * rx++ = ' '; - * rx++ = '\t'; - * rx++ = ']'; - * rx++ = '*'; + * rx++ = '['; + * rx++ = ' '; + * rx++ = '\t'; + * rx++ = ']'; + * rx++ = '*'; /* But anchor it after that. */ - * rx++ = '$'; + * rx++ = '$'; * rx = '\0'; CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); - if (reg_err == 0) + if (reg_err == 0) return NULL; else { @@ -655,7 +655,7 @@ m32r_cgen_assemble_insn (CGEN_CPU_DESC cd, const CGEN_INSN *insn = ilist->insn; recognized_mnemonic = 1; -#ifdef CGEN_VALIDATE_INSN_SUPPORTED +#ifdef CGEN_VALIDATE_INSN_SUPPORTED /* Not usually needed as unsupported opcodes shouldn't be in the hash lists. */ /* Is this insn supported by the selected cpu? */ @@ -715,7 +715,7 @@ m32r_cgen_assemble_insn (CGEN_CPU_DESC cd, if (strlen (start) > 50) /* xgettext:c-format */ sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); - else + else /* xgettext:c-format */ sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); } @@ -724,11 +724,11 @@ m32r_cgen_assemble_insn (CGEN_CPU_DESC cd, if (strlen (start) > 50) /* xgettext:c-format */ sprintf (errbuf, _("bad instruction `%.50s...'"), start); - else + else /* xgettext:c-format */ sprintf (errbuf, _("bad instruction `%.50s'"), start); } - + *errmsg = errbuf; return NULL; } |