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2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
+ * aarch64-tbl.h (aarch64_opcode_table): Add C_MAX_ELEM flags
+ to SVE fcvtzs, fcvtzu, scvtf and ucvtf entries.
+
+2019-07-02 Richard Sandiford <richard.sandiford@arm.com>
+
* aarch64-opc.c (verify_constraints): Skip GPRs when scanning the
registers in an instruction prefixed by MOVPRFX.