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Diffstat (limited to 'opcodes/ChangeLog-2009')
| -rw-r--r-- | opcodes/ChangeLog-2009 | 1801 |
1 files changed, 1801 insertions, 0 deletions
diff --git a/opcodes/ChangeLog-2009 b/opcodes/ChangeLog-2009 new file mode 100644 index 0000000..c5edeb1 --- /dev/null +++ b/opcodes/ChangeLog-2009 @@ -0,0 +1,1801 @@ +2009-12-19 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (opcode_modifiers): Remove VexNDS, VexNDD and + VexLWP. Add VexVVVV. + + * i386-opc.h (VexNDS): Removed. + (VexNDD): Likewise. + (VexLWP): Likewise. + (VEXXDS): New. + (VEXNDD): Likewise. + (VEXLWP): Likewise. + (VexVVVV): Likewise. + (i386_opcode_modifier): Remove vexnds, vexndd and vexlwp. + Add vexvvvv. + + * i386-opc.tbl: Replace VexNDS with VexVVVV=1, VexNDD with + VexVVVV=2 and VexLWP with VexVVVV=3. + * i386-tbl.h: Regenerated. + +2009-12-18 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (operand_types): Move Imm1 before Imm8. + +2009-12-17 Nick Clifton <nickc@redhat.com> + + PR binutils/10924 + * arm-dis.c: Add support for %<>ru and %<>rU formats to enforce + unique register numbers. Extend support for %<>R format to + thumb32 and coprocessor instructions. + +2009-12-16 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (opcode_modifiers): Remove ByteOkIntel. + + * i386-opc.h (ByteOkIntel): Removed. + (i386_opcode_modifier): Remove byteokintel. + + * i386-opc.tbl: Remove ByteOkIntel. + * i386-tbl.h: Regenerated. + +2009-12-16 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38, + Vex0F3A, XOP08, XOP09 and XOP0A. Add VexOpcode. + + * i386-opc.h (Vex0F): Removed. + (Vex0F38): Likewise. + (Vex0F3A): Likewise. + (VexOpcode): New. + (VEX0F): Likewise. + (VEX0F38): Likewise. + (VEX0F3A): Likewise. + (XOP08): Defined as a macro. + (XOP09): Likewise. + (XOP0A): Likewise. + (i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08, + xop09 and xop0a. Add vexopcode. + + * i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with + VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3, + XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5. + * i386-tbl.h: Regenerated. + +2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-opc.h (VEX2SOURCES): Renamed to ... + (XOP2SOURCES): This. + +2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (opcode_modifiers): Remove Vex3Sources and + Vex2Sources. Add VexSources. + + * i386-opc.h (Vex2Sources): Removed. + (Vex3Sources): Likewise. + (VEX2SOURCES): New. + (VEX3SOURCES): Likewise. + (VexSources): Likewise. + (i386_opcode_modifier): Remove vex2sources and vex3sources. + Add vexsources. + + * i386-opc.tbl: Replace Vex2Sources with VexSources=1 and + Vex3Sourceswith VexSources=2. + * i386-tbl.h: Regenerated. + +2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add + VexW. + + * i386-opc.h (VexW0): Removed. + (VexW1): Likewise. + (VEXW0): New. + (VEXW1): Likewise. + (VexW): Likewise. + (i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw. + + * i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with + Vex=2. + * i386-tbl.h: Regenerated. + +2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (VEX_W_3818_P_2_M_0): New. + (vex_w_table): Add VEX_W_3818_P_2_M_0. + (mod_table): Use VEX_W_3818_P_2_M_0. + +2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (vex_w_table): Reformat. + +2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (VEX_W_382X_P_2_M_0): New. + (vex_w_table): Add VEX_W_382X_P_2_M_0. + (mod_table): Use VEX_W_382X_P_2_M_0. + +2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (vex_w_table): Reformat. + +2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (USE_VEX_W_TABLE): New. + (VEX_W_TABLE): Likewise. + (VEX_W_XXX): Likewise. + (vex_w_table): Likewise. + (prefix_table): Use VEX_W_XXX. + (vex_table): Likewise. + (vex_len_table): Likewise. + (mod_table): Likewise. + (get_valid_dis386): Handle USE_VEX_W_TABLE. + + * i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit + isn't used. + * i386-tbl.h: Regenerated. + +2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-opc.h (VEX128): New. + (VEX256): Likewise. + +2009-12-14 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (vex_len_table): Reformat. + +2009-12-14 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (MOD_VEX_51): Renamed to ... + (MOD_VEX_50): This. + (vex_table): Updated. + (mod_table): Likewise. + +2009-12-14 Nick Clifton <nickc@redhat.com> + + PR binutils/10924 + * arm-dis.c (arm_opcodes): Specify %R in cases where using r15 + results in unpredictable behaviour. + (print_insn_arm): Handle %R. + +2009-12-11 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (get_valid_dis386): Set vex.w to 0 for VEX C5 + prefix. + (print_insn): Don't set vex.w here. + +2009-12-11 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (print_insn): Set vex.w to 0. + +2009-12-11 Quentin Neill <quentin.neill@amd.com> + + * i386-dis.c (get_vex_imm8): Extend logic to apply in all cases, + to avoid fetching ahead for the immediate bytes when OP_E_memory + has already been called. Fix indentation. + +2009-12-11 Nick Clifton <nickc@redhat.com> + + * Makefile.in: Regenerate. + * configure: Regenerate. + * arm-dis.c: Fix shadowed variable warnings. + * cgen-opc.c: Likewise. + * cr16-dis.c: Likewise. + * crx-dis.c: Likewise. + * d30v-dis.c: Likewise. + * fr30-dis.c: Likewise. + * frv-opc.c: Likewise. + * h8500-dis.c: Likewise. + * i386-dis.c: Likewise. + * i960-dis.c: Likewise. + * ia64-gen.c: Likewise. + * ia64-opc.c: Likewise. + * m32c-asm.c: Likewise. + * m32c-dis.c: Likewise. + * m68k-dis.c: Likewise. + * maxq-dis.c: Likewise. + * mcore-dis.c: Likewise. + * mep-asm.c: Likewise. + * microblaze-dis.c: Likewise. + * mmix-dis.c: Likewise. + * ns32k-dis.c: Likewise. + * or32-opc.c: Likewise. + * s390-dis.c: Likewise. + * sh64-dis.c: Likewise. + * spu-dis.c: Likewise. + * tic30-dis.c: Likewise. + +2009-12-09 Nick Clifton <nickc@redhat.com> + + PR 10924 + * arm-dis.c (print_insn_arm): Mark insns that use the PC in + post-indexed addressing as unpredictable. + +2009-12-03 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (FXSAVE_Fixup): New. + (FXSAVE): Likewise. + (mod_table): Use FXSAVE on fxsave and fxrstor. + + * i386-opc.tbl: Add fxsave64 and fxrstor64. + * i386-tbl.h: Regenerated. + +2009-12-02 Nick Clifton <nickc@redhat.com> + Richard Earnshaw <rearnsha@arm.com> + + PR gas/11013 + * arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB + and QDSUB. + +2009-11-30 Massimo Ruo Roch <massimo.ruoroch@polito.it> + + PR gas/11030 + * m68k-opc.c (m68k_opcodes): Allow the STLDSR instruction on the + Coldfire ISA A+. + +2009-11-17 Quentin Neill <quentin.neill@amd.com> + Sebastian Pop <sebastian.pop@amd.com> + + * i386-dis.c (get_vex_imm8): Increase bytes_before_imm when + decoding the second source operand from the immediate byte. + (OP_EX_VexW): Pass an extra integer to identify the second + and third source arguments. + +2009-11-19 H.J. Lu <hongjiu.lu@intel.com> + + * i386-opc.tbl: Add IsLockable to cmpxch16b. + * i386-tbl.h: Regenerated. + +2009-11-19 Nick Clifton <nickc@redhat.com> + + PR binutils/10924 + * arm-dis.c (print_insn_arm): Do not print an offset of zero when + decoding Immediaate Offset addressing. + +2009-11-18 Sebastian Pop <sebastian.pop@amd.com> + + PR binutils/10973 + * i386-dis.c (get_vex_imm8): Do not increment codep. + Avoid incrementing bytes_before_imm when OP_E_memory + has already forwarded the codep pointer. + (OP_EX_VexW): Increment codep to skip mod/rm byte. + +2009-11-18 Sebastian Pop <sebastian.pop@amd.com> + + * i386-dis.c (VEX_LEN_XOP_08_A0): Removed. + (VEX_LEN_XOP_08_A1): Removed. + (xop_table): Remove entries for VEX_LEN_XOP_08_A0 and + VEX_LEN_XOP_08_A1. + (vex_len_table): Same. + * i386-gen.c (CPU_CVT16_FLAGS): Removed. + (cpu_flags): Remove field for CpuCVT16. + * i386-opc.h (CpuCVT16): Removed. + (i386_cpu_flags): Remove bitfield cpucvt16. + (i386-opc.tbl): Remove CVT16 instructions. + * i386-init.h: Regenerated. + * i386-tbl.h: Regenerated. + +2009-11-17 Sebastian Pop <sebastian.pop@amd.com> + Quentin Neill <quentin.neill@amd.com> + + * i386-dis.c (OP_Vex_2src_1): New. + (OP_Vex_2src_2): New. + (Vex_2src_1): New. + (Vex_2src_2): New. + (XOP_08): Added. + (VEX_LEN_XOP_08_A0): Added. + (VEX_LEN_XOP_08_A1): Added. + (VEX_LEN_XOP_09_80): Added. + (VEX_LEN_XOP_09_81): Added. + (xop_table): Added an entry for XOP_08. Handle xop instructions. + (vex_len_table): Added entries for VEX_LEN_XOP_08_A0, + VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81. + (get_valid_dis386): Handle XOP_08. + (OP_Vex_2src): New. + * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS. + (cpu_flags): Add CpuXOP and CpuCVT16. + (opcode_modifiers): Add XOP08, Vex2Sources. + * i386-opc.h (CpuXOP): Added. + (CpuCVT16): Added. + (i386_cpu_flags): Add cpuxop and cpucvt16. + (XOP08): Added. + (Vex2Sources): Added. + (i386_opcode_modifier): Add xop08, vex2sources. + * i386-opc.tbl: Add entries for XOP and CVT16 instructions. + * i386-init.h: Regenerated. + * i386-tbl.h: Regenerated. + +2009-11-17 Nick Clifton <nickc@redhat.com> + + PR binutils/10924 + * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB + instruction variants. Add pattern for MRS variant that was being + confused with CMP. + (arm_decode_shift): Place error message in a comment. + (print_insn_arm): Note that writing back to the PC is + unpredictable. + Only print 'p' variants of cmp/cmn/teq/tst instructions if + decoding for pre-V6 architectures. + +2009-11-17 Edward Nevill <edward.nevill@arm.com> + + * arm-dis.c (print_insn_thumb32): Handle undefined instruction. + +2009-11-14 Doug Evans <dje@sebabeach.org> + + * Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of + ../cgen/cpu. + * Makefile.in: Regenerate. + +2009-11-13 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (OP_E_extended): Removed. + +2009-11-13 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (print_insn): Check rex_ignored. + +2009-11-13 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (ckprefix): Updated to return 0 if number of + prefixes > 14 and record the last position for each prefix. + (lock_prefix): Removed. + (data_prefix): Likewise. + (addr_prefix): Likewise. + (repz_prefix): Likewise. + (repnz_prefix): Likewise. + (last_lock_prefix): New. + (last_repz_prefix): Likewise. + (last_repnz_prefix): Likewise. + (last_data_prefix): Likewise. + (last_addr_prefix): Likewise. + (last_rex_prefix): Likewise. + (last_seg_prefix): Likewise. + (MAX_CODE_LENGTH): Likewise. + (ADDR16_PREFIX): Likewise. + (ADDR32_PREFIX): Likewise. + (DATA16_PREFIX): Likewise. + (DATA32_PREFIX): Likewise. + (REP_PREFIX): Likewise. + (seg_prefix): Likewise. + (all_prefixes): Change size to MAX_CODE_LENGTH - 1. + (prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX, + DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX. + (get_valid_dis386): Updated. + (OP_C): Likewise. + (OP_Monitor): Likewise. + (REP_Fixup): Likewise. + (print_insn): Display all prefixes. + (putop): Set PREFIX_DATA on used_prefixes only if it is used. + (intel_operand_size): Likewise. + (OP_E_register): Likewise. + (OP_G): Likewise. + (OP_REG): Likewise. + (OP_IMREG): Likewise. + (OP_I): Likewise. + (OP_I64): Likewise. + (OP_sI): Likewise. + (CRC32_Fixup): Likewise. + (MOVBE_Fixup): Likewise. + (OP_E_memory): Set REFIX_DATA on used_prefixes when it is used + in 16bit mode. + (OP_J): Set REX_W used if it is used. Set PREFIX_DATA on + used_prefixes only if it is used. + +2009-11-12 H.J. Lu <hongjiu.lu@intel.com> + + * i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc, + or, sbb, sub, xor and xchg with register only operands. + * i386-tbl.h: Regenerated. + +2009-11-12 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (opcode_modifiers): Add IsLockable. + + * i386-opc.h (IsLockable): New. + (i386_opcode_modifier): Add islockable. + + * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr, + bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub, + xor, xadd and xchg. + * i386-tbl.h: Regenerated. + +2009-11-12 Daniel Jacobowitz <dan@codesourcery.com> + + * arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove + generic coprocessor instructions for FPA loads and stores. + (print_insn_coprocessor): Remove %C support. Display address for + PC-relative offsets in %A. + +2009-11-11 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (all_prefixes): New. + (ckprefix): Set all_prefixes. + (print_insn): Print all_prefixes instead of lock_prefix, + repz_prefix, repnz_prefix, addr_prefix and data_prefix. + +2009-11-11 Nick Clifton <nickc@redhat.com> + + PR binutils/10924 + * arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro. + (print_insn_arm): Extend %s format control code to check for + unpredictable addressing modes. Add support for %S format control + code which suppresses this check. + (W_BIT, I_BIT, U_BIT, P_BIT): New macros. + (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET, + PRE_BIT_SET): New macros. + (print_insn_coprocessor): Use the new macros instead of magic + constants. + (print_arm_address): Likewise. + (pirnt_insn_arm): Likewise. + (print_insn_thumb32): Likewise. + +2009-11-11 Nick Clifton <nickc@redhat.com> + + * po/id.po: Updated Indonesian translation. + +2009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com> + + * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01]. + +2009-11-06 Sebastian Pop <sebastian.pop@amd.com> + + * i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to + reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to + B.mm in the RXB.mmmmm byte, and so when B is set, we still should use + the xop_table. + (get_valid_dis386): Removed unused condition (from cut/n/paste) for + XOP instructions. + +2009-11-05 Sebastian Pop <sebastian.pop@amd.com> + Quentin Neill <quentin.neill@amd.com> + + * opcodes/i386-dis.c (OP_LWPCB_E): New. + (OP_LWP_E): New. + (OP_LWP_I): New. + (USE_XOP_8F_TABLE): New. + (XOP_8F_TABLE): New. + (REG_XOP_LWPCB): New. + (REG_XOP_LWP): New. + (XOP_09): New. + (XOP_0A): New. + (reg_table): Redirect REG_8F to XOP_8F_TABLE. + Add entries for REG_XOP_LWPCB and REG_XOP_LWP. + (xop_table): New. + (get_valid_dis386): Handle USE_XOP_8F_TABLE. + Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values + to access to the vex_table. + (OP_LWPCB_E): New. + (OP_LWP_E): New. + (OP_LWP_I): New. + * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP. + (cpu_flags): Add CpuLWP. + (opcode_modifiers): Add VexLWP, XOP09, and XOP0A. + * opcodes/i386-opc.h (CpuLWP): New. + (i386_cpu_flags): Add bit cpulwp. + (VexLWP): New. + (XOP09): New. + (XOP0A): New. + (i386_opcode_modifier): Add vexlwp, xop09, and xop0a. + * opcodes/i386-opc.tbl (llwpcb): Added. + (lwpval): Added. + (lwpins): Added. + +2009-11-04 DJ Delorie <dj@redhat.com> + + * rx-decode.opc (rx_decode_opcode) (mvtipl): Add. + (mvtcp, mvfcp, opecp): Remove. + * rx-decode.c: Regenerate. + * rx-dis.c (cpen): Remove. + +2009-11-03 Doug Evans <dje@sebabeach.org> + + * m32c-desc.c: Regenerate. + * mep-desc.c: Regenerate. + +2009-11-02 Paul Brook <paul@codesourcery.com> + + * arm-dis.c (coprocessor_opcodes): Update to use new feature flags. + Add VFPv4 instructions. + +2009-10-29 Sebastian Pop <sebastian.pop@amd.com> + + * i386-dis.c (OP_VEX_FMA): Removed. + (VexFMA): Removed. + (Vex128FMA): Removed. + (prefix_table): First source operand of FMA4 insns is decoded + with Vex not with VexFMA. + (OP_EX_VexW): Second source operand is decoded with get_vex_imm8 + when vex.w is set. Third source operand is decoded with + +2009-10-27 Alan Modra <amodra@bigpond.net.au> + + * Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h. + * Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + +2009-10-23 Doug Evans <dje@sebabeach.org> + + * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h. + * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h. + * cgen-bitset.c: Update. + * fr30-desc.h: Regenerate. + * frv-desc.h: Regenerate. + * ip2k-desc.h: Regenerate. + * iq2000-desc.h: Regenerate. + * lm32-desc.h: Regenerate. + * m32c-desc.h: Regenerate. + * m32c-opc.h: Regenerate. + * m32r-desc.h: Regenerate. + * mep-desc.h: Regenerate. + * mt-desc.h: Regenerate. + * openrisc-desc.h: Regenerate. + * xc16x-desc.h: Regenerate. + * xstormy16-desc.h: Regenerate. + +2009-10-22 DJ Delorie <dj@redhat.com> + + * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE. + * rx-decode.c: Regenerated. + +2009-10-20 H.J. Lu <hongjiu.lu@intel.com> + + PR gas/10775 + * i386-dis.c: Document LB, LS and LV macros. + (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction + with the 64-bit displacement or immediate operand. + (putop): Handle LB, LS and LV macros. + +2009-10-18 Doug Evans <dje@sebabeach.org> + + * lm32-opinst.c: Regenerate. + * m32c-desc.c: Regenerate. + * m32r-opinst.c: Regenerate. + * openrisc-ibld.c: Regenerate. + * xc16x-desc.c: Regenerate. + * xc16x-desc.h: Regenerate. + +2009-10-17 Doug Evans <dje@sebabeach.org> + + * Makefile.am (CGEN_CPUS): Add iq2000, lm32. + (FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are + sorted alphabetically. + (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen + stamp-* rules are sorted alphabetically. + * Makefile.in: Regenerate. + +2009-10-16 H.J. Lu <hongjiu.lu@intel.com> + + * i386-opc.h: Use enum instead of nested macros. + +2009-10-16 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c: Simplify enums. + +2009-10-15 H.J. Lu <hongjiu.lu@intel.com> + Ineiev <ineiev@gmail.com> + + PR binutils/10767 + * i386-dis.c: Use enum instead of nested macros. + +2009-10-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (MAX_BYTEMODE): Removed. + +2009-10-14 Tomas Hurka <tom@hukatronic.cz> + + PR 969 + * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl. + +2009-10-13 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg + and vex_w_done. + +2009-10-07 Michael Eager <eager@eagercon.com> + + * microblaze-dis.c: Add include for microblaze-dis.h, + eliminate local extern decls. + * microblaze-dis.h: New. + +2009-10-06 Nick Clifton <nickc@redhat.com> + + * po/fi.po: Updated Finnish translation. + +2009-10-03 Andreas Schwab <schwab@linux-m68k.org> + + * opc2c.c: Include "libiberty.h" and <errno.h>. + (orig_filename): Constify. + (dump_lines): Fix line number directive. + (main): Set orig_filename to basename of input file. Use + xstrerror. + + * Makefile.am (rx-dis.lo): Remove explicit dependencies. + ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD) + instead of $(EXEEXT). + (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use + $(LINK_FOR_BUILD). Link with libiberty. + (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD). + (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c. + * Makefile.in: Regenerated. + * rx-decode.c: Regenerated. + +2009-10-03 Paul Reed <paulreed@paddedcell.com> + + * arm-dis.c (print_insn): Check symtab_size not *symtab. + +2009-10-02 H.J. Lu <hongjiu.lu@intel.com> + + * i386-opc.tbl: Drop Disp64 on jump and loop instructions. + * i386-tbl.h: Regenerated. + +2009-10-02 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-dis.c (ppc_opts): Add "476" entry. + * ppc-opc.c (PPC476): Define. + (powerpc_opcodes): Update mnemonics where required for 476. + +2009-10-01 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2. + * ppc-dis.c (ppc_opts): Likewise. + Rename "ppca2" to "a2". + +2009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com> + + * crx-dis.c (match_opcode): Truncate mcode to 32-bit. + +2009-09-29 DJ Delorie <dj@redhat.com> + + * Makefile.am: Add RX files. + * configure.in: Add support for RX target. + * disassemble.c: Likewise. + * Makefile.in: Regenerate. + * configure: Regenerate. + * opc2c.c: New file. + * rx-decode.c: New file. + * rx-decode.opc: New file. + * rx-dis.c: New file. + +2009-09-29 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux", + "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes. + +2009-09-25 Michael Eager <eager@eagercon.com> + + * microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address, + microblaze_decode_insn): Add declarations. + (get_delay_slots_microblaze): Remove. + +2009-09-25 Martin Thuresson <martint@google.com> + + Update sources to make arc and arm targets compile cleanly with + -Wc++-compat: + * arc-dis.c Fix casts. + * arc-ext.c: Add casts. + * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous + enum. + +2009-09-24 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (opcode_modifiers): Remove Vex256. + (set_bitfield): Handle XXX=V. + + * i386-opc.h (Vex): Update comments. + (Vex256): Removed. + (VexNDS): Updated. + (i386_opcode_modifier): Change vex to 2 bits. Remove vex256. + + * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2. + * i386-tbl.h: Regenerated. + +2009-09-23 Nick Clifton <nickc@redhat.com> + + * po/fr.po: Updated French translation. + +2009-09-21 Ben Elliston <bje@au.ibm.com> + Peter Bergner <bergner@vnet.ibm.com> + + * ppc-dis.c (ppc_opts): Add "ppca2" entry. + * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx., + eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx, + icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx., + ici mnemonics. + (ERAT_T): New operand. + (XWC_MASK): New mask. + (XOPL2): New macro. + (PPCA2): Define. + +2009-09-18 Nick Clifton <nickc@redhat.com> + + * po/es.po: Updated Spanish translation. + * po/vi.po: Updated Vietnamese translation. + +2009-09-15 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if + disp == -disp. + +2009-09-14 Nick Clifton <nickc@redhat.com> + + * po/nl.po: Updated Dutch translation. + +2009-09-11 Nick Clifton <nickc@redhat.com> + + * po/opcodes.pot: Updated by the Translation project. + +2009-09-11 Martin Thuresson <martint@google.com> + + Updated sources to compile cleanly with -Wc++-compat: + * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level. + * ldcref.c: Add casts. + * ldctor.c: Add casts. + * ldexp.c + * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level. + * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer. + * ldlang.h (enum statement_enum): Move to top level. + * ldmain.c: Add casts. + * ldwrite.c: Add casts. + * lexsup.c: Add casts. (enum control_enum): Move to top level. + * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer. + +2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * s390-dis.c (print_insn_s390): Avoid 'long long'. + +2009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> + + * s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands. + (print_insn_s390): Signextend and shift pcrel operands before printing. + +2009-09-09 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to + VEX_LEN_AE_R_X_M_0 in comments. + +2009-09-08 DJ Delorie <dj@redhat.com> + + * mep-opc.c: Regenerate. + +2009-09-08 Andreas Schwab <schwab@linux-m68k.org> + + * z8kgen.c (struct op): Replace unused flavor with id. + (opt): Remove extra xorb entry. + (func): Use id field as fallback. + (sub): Return new string, caller changed. + (internal): Allocate end marker. Assign unique id before sorting. + (gas): Likewise. Fix loop end condition. + * z8k-opc.h: Regenerate. + +2009-09-08 Alan Modra <amodra@bigpond.net.au> + + * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64. + +2009-09-07 Alan Modra <amodra@bigpond.net.au> + + * z8kgen.c (func): Fix thinko last patch. + +2009-09-07 Alan Modra <amodra@bigpond.net.au> + + * z8kgen.c (func): Stabilize qsort of identically named entries. + * z8k-opc.h: Regenerate. + +2009-09-07 Tristan Gingold <gingold@adacore.com> + + * po/opcodes.pot: Regenerate. + +2009-09-07 Alan Modra <amodra@bigpond.net.au> + + * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst. + * configure: Regenerate. + * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete. + (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use.. + (i386-gen, ia64-gen, z8kgen): ..here. + * Makefile.in: Regenerate. + +2009-09-07 Tristan Gingold <gingold@adacore.com> + + * z8k-opc.h: Regenerate. + +2009-09-05 Martin Thuresson <martin@mtme.org> + + * ia64-dis.c (print_insn_ia64): Update code to use renamed member. + * m88k-dis.c (m88kdis): Rename variable class to in_class. + * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol): + Rename argument class to symbol_class. + +2009-09-04 Jie Zhang <jie.zhang@analog.com> + + * bfin-dis.c (decode_pseudodbg_assert_0): Change according + to the new encoding of DBGA, DBGAH, and DBGAL. + (_print_insn_bfin): Likewise. + +2009-09-03 Jie Zhang <jie.zhang@analog.com> + + * bfin-dis.c (_print_insn_bfin): Don't declare. + (print_insn_bfin): Don't declare. + (dregs_pair): Remove. + (ignore_bits): Remove. + (ccstat): Remove. + +2009-09-03 Jie Zhang <jie.zhang@analog.com> + + * bfin-dis.c (IS_DREG): Define. + (IS_PREG): Define. + (IS_AREG): Define. + (IS_GENREG): Define. + (IS_DAGREG): Define. + (IS_SYSREG): Define. + (decode_REGMV_0): Check illegal register move instructions. + +2009-09-03 Dave Korn <dave.korn.cygwin@gmail.com> + + * Makefile.am (BUILD_LIBINTL): New variable. + (i386-gen$(EXEEXT_FOR_BUILD)): Use it. + (ia64-gen$(EXEEXT_FOR_BUILD)): And here. + (z8kgen$(EXEEXT_FOR_BUILD)): And here. + * Makefile.in: Regenerate. + +2009-09-01 DJ Delorie <dj@redhat.com> + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + * mep-opc.c: Regenerate. + +2009-09-01 Tristan Gingold <gingold@adacore.com> + + * makefile.vms: Ported to Itanium VMS. Remove useless targets and + dependencies. Remove unused FORMAT variable. + * configure.com: New file to create build.com DCL script for + Itanium VMS or Alpha VMS. + +2009-08-29 Martin Thuresson <martin@mtme.org> + + * cris-dis.c (bytes_to_skip): Update code to use new name. + * i386-dis.c (putop): Update code to use new name. + * i386-gen.c (process_i386_opcodes): Update code to use + new name. + * i386-opc.h (struct template): Rename struct template to + insn_template. Update code accordingly. + * i386-tbl.h (i386_optab): Update type to use new name. + * ia64-dis.c (print_insn_ia64): Rename variable template + to template_val. + * tic30-dis.c (struct instruction, get_tic30_instruction): + Update code to use new name. + * tic54x-dis.c (has_lkaddr, get_insn_size) + (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn): + Update code to use new name. + * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab): + Update type to new name. + * z8kgen.c (internal, gas): Rename variable new to new_op. + +2009-08-28 H.J. Lu <hongjiu.lu@intel.com> + + * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS. + Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD. + (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with + CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD. + * Makefile.in: Regenerated. + +2009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> + + * Makefile.am (bfdlibdir, bfdincludedir): Move definition ... + [INSTALL_LIBBFD]: ... here, ... + [INSTALL_LIBBFD]: ... and empty overrides here. + [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable. + [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it. + * Makefile.in: Regenerate. + * configure: Regenerate. + +2009-08-26 Philippe De Muyter <phdm@macqel.be> + + * m68k-dis.c (print_insn_arg): Add movecr register names for + coldfire v4e families. + +2009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> + + * Makefile.am (SUBDIRS): Build '.' before 'po'. + (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY) + (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables. + (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite + using *BUILD variables, depend upon $(BUILD_LIBIBERTY). + (i386-gen.o): New rule. + ($(srcdir)/i386-init.h): Adjust. + (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h. + (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise. + (ia64-gen.o): New rule. + (ia64_asmtab_deps): New variable. + ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise. + (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c. + (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust + likewise. + (s390-opc.tab): Adjust. + (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New + rules. + (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h. + * Makefile.in: Regenerate. + * z8kgen.c (gas): Avoid '/*' in comment. + * z8k-opc.h (func): Regenerate. + +2009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> + + * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken + from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c, + i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c, + ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and + msp430-dis.c added. + (LIBOPCODES_CFILES): New variable, adding to + TARGET_LIBOPCODES_CFILES also non-target library sources. + (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator + files. + (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES). + (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES). + * Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + +2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> + + * Makefile.am (libopcodes_la_LDFLAGS): Initialize early. + [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition. + [INSTALL_LIBBFD] (bfdinclude_DATA): New. + [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New. + [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la + is built shared even if it is not to be installed. + (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES) + (install_libopcodes, uninstall_libopcodes): Remove. + (AM_CPPFLAGS): Renamed from ... + (INCLUDES): ... this. + * Makefile.in: Regenerate. + + * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add + 1.11, foreign, no-dist. + (MKDEP, m32c_opc_h): Remove variables. + (disassemble.lo): Rewrite using automake-style dependency + tracking rules; only list the dependency upon the primary source + file, but no included headers. + (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo) + (i386-gen.o, ia64-gen.o): Remove dependency statements. + (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to + ensure all dependency fragments are included in the Makefile. + (s390-opc.lo): Depend on s390-opc.tab. + (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules. + (mkdep section): Remove. + * Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + + * Makefile.am (install-pdf, install-html): Remove. + * Makefile.in: Regenerate. + + * Makefile.in: Regenerate. + * aclocal.m4: Likewise. + * config.in: Likewise. + * configure: Likewise. + +2009-08-06 Michael Eager <eager@eagercon.com> + + * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to + CFILES, microblaze-dis.lo to ALL_MACHINES, targets. + * Makefile.in: Regenerate. + * configure.in: Add bfd_microblaze_arch target. + * configure: Regenerate. + * disassemble.c: Define ARCH_microblaze, return + print_insn_microblaze(). + * microblaze-dis.c: New MicroBlaze disassembler. + * microblaze-opc.h: New MicroBlaze opcode definitions. + * microblaze-opcm.h: New MicroBlaze opcode types. + +2009-07-25 H.J. Lu <hongjiu.lu@intel.com> + + * configure.in: Handle bfd_l1om_arch. + * disassemble.c (disassembler): Likewise. + + * configure: Regenerated. + + * i386-dis.c (print_insn): Handle bfd_mach_l1om and + bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM. + + * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM. + Add CPU_L1OM_FLAGS. + (cpu_flags): Add CpuL1OM. + (set_bitfield): Take an argument to set the value field. + (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY). + (process_i386_opcode_modifier): Updated. + (process_i386_operand_type): Likewise. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + + * i386-opc.h (CpuL1OM): New. + (CpuXsave): Updated. + (i386_cpu_flags): Add cpul1om. + +2009-07-24 Jan Beulich <jbeulich@novell.com> + + * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add + frstpm. + * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed. + (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP. + (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387. + * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP): + Define. + (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687, + and cpufisttp. + * i386-opc.tbl: Qualify floating point instructions by their + respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos, + and fsincos to be avilable only on 387. Fix fstsw ax to be + available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm, + and frstpm. + * i386-init.h, i386-tbl.h: Regenerate. + +2009-07-20 Nick Clifton <nickc@redhat.com> + + PR 10288 + * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register + offset or indexed based addressing mode 3. + +2009-07-14 Nick Clifton <nickc@redhat.com> + + PR 10288 + * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1 + patterns. + (arm_decode_shift): Catch illegal register based shifts. + (print_insn_arm): Properly handle negative register r0 + post-indexed addressing. + +2009-07-10 Doug Kwan <dougkwan@google.com> + + * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only + lower 32 bits of long types to make hexadecimal output consistent + on both 32-bit and 64-bit hosts. + +2009-07-10 Alan Modra <amodra@bigpond.net.au> + + * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h, + * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h, + * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h, + * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h, + * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h, + * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c, + * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, + * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h, + * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h, + * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h, + * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h, + * xstormy16-opc.c, * xstormy16-opc.h: Regenerate. + +2009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw> + + * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus. + +2009-07-07 Nick Clifton <nickc@redhat.com> + + PR 10288 + * arm-dis.c (arm_opcodes): Be more strict about decoding scaled + addressing modes. + +2009-07-06 DJ Delorie <dj@redhat.com> + + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> + + * i386-opc.h (CpuFMA4): Add CpuFMA4. + (i386_cpu_flags): New. + * i386-gen.c: Add CPU_FMA4_FLAGS. + * i386-opc.tbl: Add FMA4 instructions. + * i386-tbl.h: Regenerate. + * i386-init.h: Regenerate. + * i386-dis.c (OP_VEX_FMA): New. Handle FMA4. + (OP_XMM_VexW): Ditto. + (OP_EX_VexW): Ditto. + (VEXI4_Fixup): Ditto. + (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros. + (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New. + (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New. + (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New. + (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New. + (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New. + (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New. + (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New. + (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New. + (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New. + (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New. + (get_vex_imm8): New. handle FMA4. + (OP_EX_VexReg): Ditto. + +2009-06-30 Nick Clifton <nickc@redhat.com> + + PR 10288 + * arm-dis.c (coprocessor): Print the LDC and STC versions of the + LFM and SFM instructions as comments,. + Improve consistency of formatting for instructions displayed as + comments and decimal values displayed with their hexadecimal + equivalents. + Formatting tidy ups. + +2009-06-29 Nick Clifton <nickc@redhat.com> + + PR 10288 + * arm-dis.c (enum opcode_sentinels): New: Used to mark the + boundary between variaant and generic coprocessor instuctions. + (coprocessor): Use it. + Fix architecture version of MCRR and MRRC instructions. + (arm_opcdes): Fix patterns for STRB and STRH instructions. + (print_insn_coprocessor): Check architecture and extension masks. + Print a hexadecimal version of any decimal constant that is + outside of the range of -16 to +32. + (print_arm_address): Add a return value of the offset used in the + adress, if it is worth printing a hexadecimal version of it. + (print_insn_neon): Print a hexadecimal version of any decimal + constant that is outside of the range of -16 to +32. + (print_insn_arm): Likewise. + (print_insn_thumb16): Likewise. + (print_insn_thumb32): Likewise. + + PR 10297 + * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description + of an undefined instruction. + (arm_opcodes): Use it. + (thumb_opcod): Use it. + (thumb32_opc): Use it. + +2009-06-23 DJ Delorie <dj@redhat.com> + + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + + * mep-asm.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-06-22 Nick Clifton <nickc@redhat.com> + + * po/fi.po: Updated Finish translation. + +2009-06-22 Alan Modra <amodra@bigpond.net.au> + + * m32c-asm.c: Regenerate. + +2009-06-22 Alan Modra <amodra@bigpond.net.au> + + * score-dis.c (print_insn_score48, print_insn_score32): Move default + case label to proper lexical block. + * score7-dis.c (print_insn_score32): Likewise. + +2009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com> + + * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT, + MASK_RX_0RRD_OPT): New instruction formats with optional arguments. + * s390-opc.txt (nopr, nop): Use new instruction format. + +2009-06-18 Nick Clifton <nickc@redhat.com> + + PR 10288 + * arm-dis.c (print_insn_coprocessor): Check that a user specified + ARM architecture supports the matched instruction. + (print_insn_arm): Likewise. + (select_arm_features): New function. Fills in the fields of an + arm_feature_set structure based on a given arm machine number. + (print_insn): Initialise an arm_feature_set structure. + +2009-06-16 Maciej W. Rozycki <macro@linux-mips.org> + + * vax-dis.c (is_function_entry): Return success for synthetic + symbols too. + (is_plt_tail): New function. + (print_insn_vax): Decode PLT entry offset longword. + +2009-06-15 Nick Clifton <nickc@redhat.com> + + PR 10186 + * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W + instruction. + + PR 10173 + * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice. + +2009-06-15 Nick Clifton <nickc@redhat.com> + + PR 10263 + * arm-dis.c (print_insn): Ignore is_data if the user has requested + the disassembly of data as well as instructions. + +2009-06-11 Doug Evans <dje@sebabeach.org> + + * cgen.sh: Handle multiple simultaneous runs for parallel makes. + +2009-06-11 Anthony Green <green@moxielogic.com> + + * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions. + (moxie_form3_opc_info): Add branch instructions. + * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL + encoded instructions. + +2009-06-06 Anthony Green <green@moxielogic.com> + + * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M. + * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case. + +2009-06-04 Alan Modra <amodra@bigpond.net.au> + + * dep-in.sed: Don't use \n in replacement part of s command. + * Makefile.am (DEP1): LC_ALL for uniq. + * Makefile.in: Regenerate. + +2009-06-02 Nick Clifton <nickc@redhat.com> + + * po/nl.po: Updated Dutch translation. + +2009-06-02 Tristan Gingold <gingold@adacore.com> + + * ia64-gen.c (parse_resource_users, print_dependency_table, + add_dis_table_ent, finish_distable, insert_bit_table_ent, + add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq, + get_prefix_len, compute_completer_bits, insert_opcode_dependencies, + insert_completer_entry, print_completer_entry, print_completer_table, + opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions. + +2009-05-28 DJ Delorie <dj@redhat.com> + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + +2009-05-26 DJ Delorie <dj@redhat.com> + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-05-26 Nick Clifton <nickc@redhat.com> + + * po/id.po: Updated Indonesian translation. + * po/opcodes.pot: Updated template file. + +2009-05-26 Alan Modra <amodra@bigpond.net.au> + + * dep-in.sed: Don't modify .o to .lo here. Output one filename + per line with all lines having continuation backslash. Prefix + first line with "A", following lines with "B". + * Makefile.am (DEP): Don't use dep.sed here. + (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use + dep.sed here on dependencies, sort and uniq. + * Makefile.in: Regenerate. + +2009-05-25 Tristan Gingold <gingold@adacore.com> + + * makefile.vms (OPT): New variable. + (CFLAGS): Update compilation flags. + +2009-05-22 DJ Delorie <dj@redhat.com> + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> + + * i386-opc.h (Cpusse5): Delete. + (i386_cpu_flags): Delete. + * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc. + * i386-opc.tbl: Remove SSE5 instructions. + * i386-tbl.h: Regenerate. + * i386-init.h: Regenerate. + * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling. + (print_drex_arg): Delete. + (OP_DREX4): Delete. + (OP_DREX3): Delete. + (OP_DREX_ICMP): Delete. + (OP_DREX_FCMP): Delete. + (DREX_*): Delete. + (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete. + +2009-05-22 Alan Modra <amodra@bigpond.net.au> + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + +2009-05-19 DJ Delorie <dj@redhat.com> + + * mep-asm.c: Regenerate. + * mep-opc.c: Regenerate. + +2009-04-30 DJ Delorie <dj@redhat.com> + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-04-17 DJ Delorie <dj@redhat.com + + * mep-desc.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-04-15 Anthony Green <green@moxielogic.com> + + * moxie-opc.c, moxie-dis.c: Created. + * Makefile.am: Build the moxie source files. + * configure.in: Add moxie support. + * Makefile.in, configure: Rebuilt. + * disassemble.c (disassembler): Add moxie support. + (ARCH_moxie): Define. + +2009-04-15 Jan Beulich <jbeulich@novell.com> + + * i386-opc.tbl (protb, protw, protd, protq): Set opcode + extension to None. + (pshab, pshaw, pshad, pshaq): Likewise. + * i386-tbl.h: Re-generate. + +2009-04-08 DJ Delorie <dj@redhat.com + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-04-07 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva", + "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation. + Reorder entries so the extended mnemonics are listed before tlbilx. + +2009-04-02 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect + due to -many/-Many. + (print_insn_powerpc): Make sure we only deprecate instructions using + the original dialect and not a modified dialect due to -Many handling. + Move the handling of the condition register and default operands to + the end of the if/else if/else chain. + * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that + instructions from newer processors are listed before older ones. + <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors + that have instructions with conflicting opcodes. + +2009-04-01 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and + E500MC entries. + +2009-04-01 Christophe Lyon <christophe.lyon@st.com> + + * arm-dis.c (print_insn): Print BE8 opcodes in little endianness. + +2009-03-30 Joseph Myers <joseph@codesourcery.com> + + * arm-dis.c (print_insn): Also check section matches in backwards + search for mapping symbol. + +2009-03-26 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (get_valid_dis386): Abort on unhandled table. + +2009-03-18 Alan Modra <amodra@bigpond.net.au> + + * cgen-opc.c: Include alloca-conf.h rather than alloca.h. + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + * openrisc-opc.c: Regenerate. + +2009-03-10 Nick Clifton <nickc@redhat.com> + + * po/id.po: Updated Indonesian translation. + +2009-03-10 Alan Modra <amodra@bigpond.net.au> + + * ppc-dis.c: Include "opintl.h". + (struct ppc_mopt, ppc_opts): New. + (ppc_parse_cpu): New function. + (powerpc_init_dialect): Use it. + (print_ppc_disassembler_options): Dump options from ppc_opts. + Internationalize message. + +2009-03-06 Nick Clifton <nickc@redhat.com> + + * po/es.po: Updated Spanish translation. + +2009-03-04 Alan Modra <amodra@bigpond.net.au> + + PR 6768 + * configure.in: Test for ld --as-needed support. Link shared + libopcodes against libm. + * configure: Regenerate. + +2009-03-03 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that + instructions from newer processors are listed before older ones. + +2009-03-03 Alan Modra <amodra@bigpond.net.au> + + * Makefile.am: Run "make dep-am". + (HFILES): Move lm32-desc.h and lm32-opc.h from.. + (CFILES): ..here. + * Makefile.in: Regenerate. + +2009-03-02 Qinwei <qinwei@sunnorth.com.cn> + + * score7-dis.c: New file. + * Makefile.am: Add dependencies for score7-dis.c. + * Makefile.in: Regenerate. + * configure.in: Add score7-dis to score files. + * configure: Regenerate. + * score-dis.c: Add support for score7 architecture. + * score-opc.h: Likewise. + +2009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> + + * configure: Regenerate. + +2009-02-27 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E. + +2009-02-26 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble + the power7 and the isel instructions. + * ppc-opc.c (insert_xc6, extract_xc6): New static functions. + (insert_dm, extract_dm): Likewise. + (XB6): Update comment to include XX2 form. + (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK, + XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New. + (RemoveXX3DM): Delete. + (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr", + "mftgpr">: Deprecate for POWER7. + <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte", + "frsqrte.">: Deprecate the three operand form and enable the two + operand form for POWER7 and later. + <"wait">: Extend to accept optional parameter. Enable for POWER7. + <"waitsrv", "waitimpl">: Add extended opcodes. + <"ldbrx", "stdbrx">: Enable for POWER7. + <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes. + <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde", + "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo", + "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.", + "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.", + "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.", + "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx", + "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes. + <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx", + "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp", + "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds", + "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp", + "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp", + "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp", + "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic", + "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp", + "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp", + "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp", + "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.", + "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp", + "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp", + "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp", + "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp", + "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp", + "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp", + "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp", + "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp", + "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp", + "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi", + "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp", + "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp", + "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp", + "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor", + "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd", + "xxspltw", "xxswapd">: Add VSX opcodes. + +2009-02-23 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4. + (operand_types): Remove Vex_Imm4. + + * i386-opc.h (Vex_Imm4): Removed. + (OTMax): Updated. + (i386_operand_type): Remove vex_imm4. + + * i386-opc.tbl: Remove Vex_Imm4 comments. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2009-02-23 Richard Earnshaw <rearnsha@arm.com> + + * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for + vq{r}shr{u}n.s64 insnstructions. + +2009-02-19 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first + operand to be a float point register (FRT/FRS). + +2009-02-18 Adam Nemet <anemet@caviumnetworks.com> + + * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific + dmfc2 and dmtc2 before the architecture-level variants. + +2009-02-18 Pierre Muller <muller@ics.u-strasbg.fr> + + * fr30-opc.c: Regenerate. + * frv-opc.c: Regenerate. + * ip2k-opc.c: Regenerate. + * iq2000-opc.c: Regenerate. + * lm32-opc.c: Regenerate. + * m32c-opc.c: Regenerate. + * m32r-opc.c: Regenerate. + * mep-opc.c: Regenerate. + * mt-opc.c: Regenerate. + * xc16x-opc.c: Regenerate. + * xstormy16-opc.c: Regenerate. + * tic54x-dis.c (print_instruction): Avoid compiler warning on + sprintf call. + +2009-02-12 Nathan Sidwell <nathan@codesourcery.com> + + * m68k-opc.c (m68k_opcodes): Add stldsr instruction. + +2009-02-05 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-opc.c: Update copyright year. + (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand + ordering for POWER4 and later and use the correct Server ordering. + +2009-02-04 H.J. Lu <hongjiu.lu@intel.com> + + AVX Programming Reference (January, 2009) + * i386-dis.c (PREFIX_VEX_3A44): New. + (VEX_LEN_3A44_P_2): Likewise. + (PREFIX_VEX_3A48): Updated. + (VEX_LEN_3A4C_P_2): Likewise. + (prefix_table): Add PREFIX_VEX_3A44. + (vex_table): Likewise. + (vex_len_table): Add VEX_LEN_3A44_P_2. + + * i386-opc.tbl: Add PCLMUL + AVX instructions. + * i386-tbl.h: Regenerated. + +2009-02-03 Sandip Matte <sandip@rmicorp.com> + + * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define. + (mips_arch_choices): Add XLR entry. + * mips-opc.c (XLR): Define. + (mips_builtin_opcodes): Add XLR instructions. + +2009-02-03 Carlos O'Donell <carlos@codesourcery.com> + + * Makefile.am: Add install-pdf target. + * po/Make-in: Add install-pdf target. + * Makefile.in: Regenerate. + +2009-02-02 DJ Delorie <dj@redhat.com> + + * mep-asm.c: Regenerate. + * mep-desc.c: Regenerate. + * mep-desc.h: Regenerate. + * mep-dis.c: Regenerate. + * mep-ibld.c: Regenerate. + * mep-opc.c: Regenerate. + * mep-opc.h: Regenerate. + +2009-01-29 Mark Mitchell <mark@codesourcery.com> + + * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd, + qsub, and qdsub. + +2009-01-28 Chao-ying Fu <fu@mips.com> + + * mips-opc.c (suxc1): Add the flag of FP_D. + +2009-01-20 Alan Modra <amodra@bigpond.net.au> + + * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c, + * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c, + * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c, + * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c, + * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c, + * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c, + * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c, + * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate. + +2009-01-16 Alan Modra <amodra@bigpond.net.au> + + * configure.in (commonbfdlib): Delete. + (SHARED_LIBADD): Add pic libiberty if such is available. + * configure: Regenerate. + * po/POTFILES.in: Regenerate. + +2009-01-14 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated. + * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two + operand form and enable the four operand form for POWER6 and later. + <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the + three operand form for POWER6 and later. + +2009-01-14 Mike Frysinger <vapier@gentoo.org> + + * bfin-dis.c (OUTS): Use "%s" as format string. + +2009-01-13 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (cpu_flag_init): Remove a white space. + (operand_type_init): Likewise. + +2009-01-12 H.J. Lu <hongjiu.lu@intel.com> + + * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence. + * i386-tbl.h: Regenerated. + +2009-01-12 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB, + subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS, + subS, xorS and cmpS. + +2009-01-10 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with + CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add + CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS. + (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush + and CpuSYSCALL. + (lineno): Removed. + (set_bitfield): Take an argument, lineno. Don't report lineno + on error if it is -1. + (process_i386_cpu_flag): Take an argument, lineno. + (process_i386_opcode_modifier): Likewise. + (process_i386_operand_type): Likewise. + (output_i386_opcode): Likewise. + (opcode_hash_entry): Add lineno. + (process_i386_opcodes): Updated. + (process_i386_registers): Likewise. + (process_i386_initializers): Likewise. + + * i386-opc.h (CpuP4): Removed. + (CpuK6): Likewise. + (CpuK8): Likewise. + (CpuClflush): New. + (CpuSYSCALL): Likewise. + (CpuMMX): Updated. + (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add + cpuclflush and cpusyscall. + + * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause, + syscall and sysret. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2009-01-09 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS + and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS. + (cpu_flags): Add CpuRdtscp. + (set_bitfield): Remove CpuSledgehammer check. + + * i386-opc.h (CpuRdtscp): New. + (CpuLM): Updated. + (i386_cpu_flags): Add cpurdtscp. + + * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2009-01-09 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-opc.c (PPCNONE): Define. + (NOPOWER4): Delete. + (powerpc_opcodes): Initialize the new "deprecated" field. + +2009-01-06 H.J. Lu <hongjiu.lu@intel.com> + + AVX Programming Reference (December, 2008) + * i386-dis.c (VEX_LEN_2B_M_0): Removed. + (VEX_LEN_E7_P_2_M_0): Likewise. + (VEX_LEN_2C_P_1): Updated. + (VEX_LEN_E8_P_2): Likewise. + (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0. + (mod_table): Likewise. + + * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps. + * i386-tbl.h: Regenerated. + +2009-01-05 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (process_copyright): Update for 2009. + + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2009-01-05 H.J. Lu <hongjiu.lu@intel.com> + + AVX Programming Reference (December, 2008) + * i386-dis.c (OP_VEX_FMA): Removed. + (OP_EX_VexW): Likewise. + (OP_EX_VexImmW): Likewise. + (OP_XMM_VexW): Likewise. + (VEXI4_Fixup): Likewise. + (VPERMIL2_Fixup): Likewise. + (VexI4): Likewise. + (VexFMA): Likewise. + (Vex128FMA): Likewise. + (EXVexW): Likewise. + (EXdVexW): Likewise. + (EXqVexW): Likewise. + (EXVexImmW): Likewise. + (XMVexW): Likewise. + (VPERMIL2): Likewise. + (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise. + (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise. + (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise. + (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise. + (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise. + (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise. + (get_vex_imm8): Likewise. + (OP_EX_VexReg): Likewise. + vpermil2_op): Likewise. + (EXVexWdq): New. + (vex_w_dq_mode): Likewise. + (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise. + (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise. + (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise. + (es_reg): Updated. + (PREFIX_VEX_38DB): Likewise. + (PREFIX_VEX_3A4A): Likewise. + (PREFIX_VEX_3A60): Likewise. + (PREFIX_VEX_3ADF): Likewise. + (VEX_LEN_3ADF_P_2): Likewise. + (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A, + PREFIX_VEX_3A5C...PREFIX_VEX_3A5F, + PREFIX_VEX_3A68...PREFIX_VEX_3A6F and + PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add + PREFIX_VEX_3896...PREFIX_VEX_389F, + PREFIX_VEX_38A6...PREFIX_VEX_38AF and + PREFIX_VEX_38B6...PREFIX_VEX_38BF. + (vex_table): Likewise. + (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2 + and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2. + (putop): Support "%XW". + (intel_operand_size): Handle vex_w_dq_mode. + + * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS. + + * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA + instructions. Add new FMA instructions. + * i386-tbl.h: Regenerated. + +2009-01-02 Matthias Klose <doko@ubuntu.com> + + * or32-opc.c (or32_print_register, or32_print_immediate, + disassemble_insn): Don't rely on undefined sprintf behaviour. + +For older changes see ChangeLog-2008 + +Local Variables: +mode: change-log +left-margin: 8 +fill-column: 74 +version-control: never +End: |