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-rw-r--r--ld/testsuite/ChangeLog14
-rw-r--r--ld/testsuite/ld-mips-elf/mips-elf.exp1
-rw-r--r--ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d32
-rw-r--r--ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got18
-rw-r--r--ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d32
-rw-r--r--ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got22
-rw-r--r--ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d12
-rw-r--r--ld/testsuite/ld-mips-elf/vxworks-forced-local-1.s13
-rw-r--r--ld/testsuite/ld-mips-elf/vxworks-forced-local-1.ver1
-rw-r--r--ld/testsuite/ld-mips-elf/vxworks1-lib.dd2
-rw-r--r--ld/testsuite/ld-mips-elf/vxworks1-lib.rd5
11 files changed, 96 insertions, 56 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index af09908..5e0310f 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,17 @@
+2007-08-13 Richard Sandiford <richard@codesourcery.com>
+
+ * ld-mips-elf/vxworks-forced-local-1.d,
+ * ld-mips-elf/vxworks-forced-local-1.s,
+ * ld-mips-elf/vxworks-forced-local-1.ver: New test.
+ * ld-mips-elf/mips-elf.exp: Run it.
+ * ld-mips-elf/tlsdyn-o32-2.d: Adjust for removal of unnecessary
+ local GOT entry.
+ * ld-mips-elf/tlsdyn-o32-2.got: Likewise.
+ * ld-mips-elf/tlsdyn-o32-3.d: Likewise.
+ * ld-mips-elf/tlsdyn-o32-3.got: Likewise.
+ * ld-mips-elf/vxworks1-lib.dd: Likewise.
+ * ld-mips-elf/vxworks1-lib.rd: Likewise.
+
2007-08-13 Alan Modra <amodra@bigpond.net.au>
* ld-powerpc/relbrlt.s (.text.pad2): Adjust space.
diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp
index ca496c3..663ce35 100644
--- a/ld/testsuite/ld-mips-elf/mips-elf.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf.exp
@@ -44,6 +44,7 @@ if {[istarget "mips*-*-vxworks"]} {
}
run_ld_link_tests $mipsvxtests
run_dump_test "vxworks1-static"
+ run_dump_test "vxworks-forced-local-1"
return
}
diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d b/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d
index 0c466b6..3637049 100644
--- a/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d
+++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d
@@ -11,20 +11,20 @@ Disassembly of section .text:
.*: afbe0008 sw s8,8\(sp\)
.*: 03a0f021 move s8,sp
.*: afbc0000 sw gp,0\(sp\)
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 27848048 addiu a0,gp,-32696
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848044 addiu a0,gp,-32700
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 2784803c addiu a0,gp,-32708
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848038 addiu a0,gp,-32712
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 27848034 addiu a0,gp,-32716
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848030 addiu a0,gp,-32720
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
@@ -33,10 +33,10 @@ Disassembly of section .text:
.*: 24638000 addiu v1,v1,-32768
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
- .*: 8f838050 lw v1,-32688\(gp\)
+ .*: 8f83804c lw v1,-32692\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
- .*: 8f838044 lw v1,-32700\(gp\)
+ .*: 8f838040 lw v1,-32704\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
@@ -61,20 +61,20 @@ Disassembly of section .text:
.*: afbe0008 sw s8,8\(sp\)
.*: 03a0f021 move s8,sp
.*: afbc0000 sw gp,0\(sp\)
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 27848048 addiu a0,gp,-32696
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848044 addiu a0,gp,-32700
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 2784803c addiu a0,gp,-32708
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848038 addiu a0,gp,-32712
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 27848034 addiu a0,gp,-32716
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848030 addiu a0,gp,-32720
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
@@ -83,10 +83,10 @@ Disassembly of section .text:
.*: 24638000 addiu v1,v1,-32768
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
- .*: 8f838050 lw v1,-32688\(gp\)
+ .*: 8f83804c lw v1,-32692\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
- .*: 8f838044 lw v1,-32700\(gp\)
+ .*: 8f838040 lw v1,-32704\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got b/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got
index ba617bb..eb4d2c1a 100644
--- a/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got
+++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got
@@ -4,17 +4,17 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE \*ABS\*
-10000058 R_MIPS_TLS_DTPMOD32 tlsbin_gd
-1000005c R_MIPS_TLS_DTPREL32 tlsbin_gd
-1000004c R_MIPS_TLS_DTPMOD32 tlsvar_gd
-10000050 R_MIPS_TLS_DTPREL32 tlsvar_gd
-10000054 R_MIPS_TLS_TPREL32 tlsvar_ie
-10000060 R_MIPS_TLS_TPREL32 tlsbin_ie
+10000054 R_MIPS_TLS_DTPMOD32 tlsbin_gd
+10000058 R_MIPS_TLS_DTPREL32 tlsbin_gd
+10000048 R_MIPS_TLS_DTPMOD32 tlsvar_gd
+1000004c R_MIPS_TLS_DTPREL32 tlsvar_gd
+10000050 R_MIPS_TLS_TPREL32 tlsvar_ie
+1000005c R_MIPS_TLS_TPREL32 tlsbin_ie
Contents of section .got:
10000020 00000000 80000000 00000000 00000000 .*
- 10000030 00000000 00000000 00000000 00000000 .*
- 10000040 0040053c 00000001 00000000 00000000 .*
+ 10000030 00000000 00000000 00000000 0040053c .*
+ 10000040 00000001 00000000 00000000 00000000 .*
10000050 00000000 00000000 00000000 00000000 .*
- 10000060 00000000 00000000 00000000 00000000 .*
+ 10000060 00000000 00000000 00000000 .*
diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d b/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d
index 31f1666..9e7da50 100644
--- a/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d
+++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d
@@ -11,20 +11,20 @@ Disassembly of section .text:
.*: afbe0008 sw s8,8\(sp\)
.*: 03a0f021 move s8,sp
.*: afbc0000 sw gp,0\(sp\)
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 27848048 addiu a0,gp,-32696
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848044 addiu a0,gp,-32700
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 2784803c addiu a0,gp,-32708
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848038 addiu a0,gp,-32712
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 27848034 addiu a0,gp,-32716
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848030 addiu a0,gp,-32720
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
@@ -33,10 +33,10 @@ Disassembly of section .text:
.*: 24638000 addiu v1,v1,-32768
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
- .*: 8f838050 lw v1,-32688\(gp\)
+ .*: 8f83804c lw v1,-32692\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
- .*: 8f838044 lw v1,-32700\(gp\)
+ .*: 8f838040 lw v1,-32704\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
@@ -57,20 +57,20 @@ Disassembly of section .text:
.*: afbe0008 sw s8,8\(sp\)
.*: 03a0f021 move s8,sp
.*: afbc0000 sw gp,0\(sp\)
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 27848048 addiu a0,gp,-32696
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848044 addiu a0,gp,-32700
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 2784803c addiu a0,gp,-32708
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848038 addiu a0,gp,-32712
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
.*: 00000000 nop
- .*: 8f998030 lw t9,-32720\(gp\)
- .*: 27848034 addiu a0,gp,-32716
+ .*: 8f99802c lw t9,-32724\(gp\)
+ .*: 27848030 addiu a0,gp,-32720
.*: 0320f809 jalr t9
.*: 00000000 nop
.*: 8fdc0000 lw gp,0\(s8\)
@@ -79,10 +79,10 @@ Disassembly of section .text:
.*: 24638000 addiu v1,v1,-32768
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
- .*: 8f838050 lw v1,-32688\(gp\)
+ .*: 8f83804c lw v1,-32692\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
- .*: 8f838044 lw v1,-32700\(gp\)
+ .*: 8f838040 lw v1,-32704\(gp\)
.*: 00000000 nop
.*: 00621821 addu v1,v1,v0
.*: 7c02283b rdhwr v0,\$5
diff --git a/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got b/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got
index addfc0f..a5242aa 100644
--- a/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got
+++ b/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got
@@ -4,17 +4,17 @@
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
00000000 R_MIPS_NONE \*ABS\*
-10000058 R_MIPS_TLS_DTPMOD32 tlsbin_gd
-1000005c R_MIPS_TLS_DTPREL32 tlsbin_gd
-1000004c R_MIPS_TLS_DTPMOD32 tlsvar_gd
-10000050 R_MIPS_TLS_DTPREL32 tlsvar_gd
-10000054 R_MIPS_TLS_TPREL32 tlsvar_ie
-10000060 R_MIPS_TLS_TPREL32 tlsbin_ie
+10000054 R_MIPS_TLS_DTPMOD32 tlsbin_gd
+10000058 R_MIPS_TLS_DTPREL32 tlsbin_gd
+10000048 R_MIPS_TLS_DTPMOD32 tlsvar_gd
+1000004c R_MIPS_TLS_DTPREL32 tlsvar_gd
+10000050 R_MIPS_TLS_TPREL32 tlsvar_ie
+1000005c R_MIPS_TLS_TPREL32 tlsbin_ie
Contents of section .got:
- 10000020 00000000 80000000 00000000 00000000 ................
- 10000030 00000000 00000000 00000000 00000000 ................
- 10000040 004005ec 00000001 00000000 00000000 .@..............
- 10000050 00000000 00000000 00000000 00000000 ................
- 10000060 00000000 00000000 00000000 00000000 ................
+ 10000020 00000000 80000000 00000000 00000000 .*
+ 10000030 00000000 00000000 00000000 004005ec .*
+ 10000040 00000001 00000000 00000000 00000000 .*
+ 10000050 00000000 00000000 00000000 00000000 .*
+ 10000060 00000000 00000000 00000000 .*
diff --git a/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d b/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d
new file mode 100644
index 0000000..dc02a3b
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.d
@@ -0,0 +1,12 @@
+#as: -mips2 -mvxworks-pic
+#source: vxworks-forced-local-1.s
+#ld: -shared -Tvxworks1.ld --version-script vxworks-forced-local-1.ver
+#readelf: --relocs
+
+Relocation section '\.rela\.dyn' .*
+.*
+0008140c 00000002 R_MIPS_32 *00080810
+00081410 00000002 R_MIPS_32 *00080814
+00081414 00000002 R_MIPS_32 *00080818
+00081418 00000302 R_MIPS_32 *00000000 *bar \+ 0
+#pass
diff --git a/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.s b/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.s
new file mode 100644
index 0000000..a0c0212
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.s
@@ -0,0 +1,13 @@
+ .globl foo1
+ .globl foo2
+ .globl foo3
+ lw $4,%call16(foo1)($gp)
+ lw $4,%call16(foo2)($gp)
+ lw $4,%call16(foo3)($gp)
+ lw $4,%got(bar)($gp)
+foo1:
+ nop
+foo2:
+ nop
+foo3:
+ nop
diff --git a/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.ver b/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.ver
new file mode 100644
index 0000000..a53c620
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/vxworks-forced-local-1.ver
@@ -0,0 +1 @@
+{ local: foo*; };
diff --git a/ld/testsuite/ld-mips-elf/vxworks1-lib.dd b/ld/testsuite/ld-mips-elf/vxworks1-lib.dd
index ab060d9..17ea125 100644
--- a/ld/testsuite/ld-mips-elf/vxworks1-lib.dd
+++ b/ld/testsuite/ld-mips-elf/vxworks1-lib.dd
@@ -22,7 +22,7 @@ Disassembly of section \.text:
80c0c: 3c1c0000 lui gp,0x0
80c10: 8f9c0000 lw gp,0\(gp\)
80c14: 8f9c0000 lw gp,0\(gp\)
- 80c18: 8f820014 lw v0,20\(gp\)
+ 80c18: 8f820010 lw v0,16\(gp\)
80c1c: 8c430000 lw v1,0\(v0\)
80c20: 24630001 addiu v1,v1,1
80c24: ac430000 sw v1,0\(v0\)
diff --git a/ld/testsuite/ld-mips-elf/vxworks1-lib.rd b/ld/testsuite/ld-mips-elf/vxworks1-lib.rd
index 56bc9a8..12ceb00 100644
--- a/ld/testsuite/ld-mips-elf/vxworks1-lib.rd
+++ b/ld/testsuite/ld-mips-elf/vxworks1-lib.rd
@@ -9,9 +9,8 @@ Relocation section '\.rela\.dyn' at offset .* contains .* entries:
00081804 00000002 R_MIPS_32 00081800
00081808 .*02 R_MIPS_32 00081808 dglobal \+ 0
0008180c .*02 R_MIPS_32 00000000 dexternal \+ 0
-00081424 .*02 R_MIPS_32 00081c00 x \+ 0
-00000000 00000000 R_MIPS_NONE 00000000
-#...
+00081420 .*02 R_MIPS_32 00081c00 x \+ 0
+
Relocation section '\.rela\.plt' at offset .* contains 2 entries:
Offset Info Type Sym\.Value Sym\. Name \+ Addend
00081400 .*7f R_MIPS_JUMP_SLOT 00000000 sexternal \+ 0
generated by cgit v1.1 at 2024-12-18 03:18:37 +0000