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-rw-r--r--ld/ChangeLog16
-rw-r--r--ld/Makefile.am15
-rw-r--r--ld/Makefile.in15
-rw-r--r--ld/NEWS2
-rw-r--r--ld/configure.tgt3
-rw-r--r--ld/emulparams/elf32xc16x.sh8
-rw-r--r--ld/emulparams/elf32xc16xl.sh8
-rw-r--r--ld/emulparams/elf32xc16xs.sh8
-rw-r--r--ld/scripttempl/elf32xc16x.sc61
-rw-r--r--ld/scripttempl/elf32xc16xl.sc64
-rw-r--r--ld/scripttempl/elf32xc16xs.sc64
-rw-r--r--ld/testsuite/ChangeLog13
-rw-r--r--ld/testsuite/ld-xc16x/absrel.d28
-rw-r--r--ld/testsuite/ld-xc16x/absrel.s31
-rw-r--r--ld/testsuite/ld-xc16x/offset.d18
-rw-r--r--ld/testsuite/ld-xc16x/offset.s13
-rw-r--r--ld/testsuite/ld-xc16x/pcreloc.d34
-rw-r--r--ld/testsuite/ld-xc16x/pcreloc.s27
-rw-r--r--ld/testsuite/ld-xc16x/pcrelocl.d34
-rw-r--r--ld/testsuite/ld-xc16x/xc16x.exp65
20 files changed, 527 insertions, 0 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 6fc0d7b..eaf4e1a 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,19 @@
+2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
+ Anil Paranjape <anilp1@kpitcummins.com>
+ Shilin Shakti <shilins@kpitcummins.com>
+
+ * scripttemp/elf32xc16x.sc: Default linker script for tiny model.
+ * scripttemp/elf32xc16xl.sc: Default linker script for large model.
+ * scripttemp/elf32xc16xs.sc: Default linker script for small model.
+ * emulparams/elf32xc16x.sh: Emulation script for tiny model.
+ * emulparams/elf32xc16xl.sh: Emulation script for large model.
+ * emulparams/elf32xc16xs.sh: Emulation script for small model.
+ * Makefile.am: Add entry to make xc16x target.
+ * Makefile.in: Regenerate.
+ * configure.tgt: Specify default and other emulation parameters
+ for xc16x.
+ * NEWS: Announce the support for the new target.
+
2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
* configure.tgt (mips*el-*-netbsd*, mips*-*-netbsd*):
diff --git a/ld/Makefile.am b/ld/Makefile.am
index d550053..e73075d 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -183,6 +183,9 @@ ALL_EMULATIONS = \
eelf32ppcwindiss.o \
eelf32ppcvxworks.o \
eelf32vax.o \
+ eelf32xc16x.o \
+ eelf32xc16xl.o \
+ eelf32xc16xs.o \
eelf32xstormy16.o \
eelf32xtensa.o \
eelf_i386.o \
@@ -624,6 +627,18 @@ eelf32bfin.c: $(srcdir)/emulparams/bfin.sh \
eelf32_dlx.c: $(srcdir)/emulparams/elf32_dlx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/dlx.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32_dlx "$(tdir_elf32_dlx)"
+eelf32xc16x.c: $(srcdir)/emulparams/elf32xc16x.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16x "$(tdir_xc16x)"
+eelf32xc16xl.c: $(srcdir)/emulparams/elf32xc16xl.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16xl "$(tdir_xc16xl)"
+eelf32xc16xs.c: $(srcdir)/emulparams/elf32xc16xs.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16xs "$(tdir_xc16xs)"
eelf32xstormy16.c: $(srcdir)/emulparams/elf32xstormy16.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/xstormy16.sc ${GEN_DEPENDS}
diff --git a/ld/Makefile.in b/ld/Makefile.in
index def9770..2f92508 100644
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -406,6 +406,9 @@ ALL_EMULATIONS = \
eelf32ppcwindiss.o \
eelf32ppcvxworks.o \
eelf32vax.o \
+ eelf32xc16x.o \
+ eelf32xc16xl.o \
+ eelf32xc16xs.o \
eelf32xstormy16.o \
eelf32xtensa.o \
eelf_i386.o \
@@ -1428,6 +1431,18 @@ eelf32bfin.c: $(srcdir)/emulparams/bfin.sh \
eelf32_dlx.c: $(srcdir)/emulparams/elf32_dlx.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/dlx.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32_dlx "$(tdir_elf32_dlx)"
+eelf32xc16x.c: $(srcdir)/emulparams/elf32xc16x.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16x "$(tdir_xc16x)"
+eelf32xc16xl.c: $(srcdir)/emulparams/elf32xc16xl.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16xl "$(tdir_xc16xl)"
+eelf32xc16xs.c: $(srcdir)/emulparams/elf32xc16xs.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32xc16xs "$(tdir_xc16xs)"
eelf32xstormy16.c: $(srcdir)/emulparams/elf32xstormy16.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/emultempl/needrelax.em \
$(srcdir)/scripttempl/xstormy16.sc ${GEN_DEPENDS}
diff --git a/ld/NEWS b/ld/NEWS
index 7ec8921..77659b6 100644
--- a/ld/NEWS
+++ b/ld/NEWS
@@ -1,5 +1,7 @@
-*- text -*-
+* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
+
* Modify the Linux linker to seach /etc/ld.so.conf first before
checking default search directories for DT_NEEDED entries.
diff --git a/ld/configure.tgt b/ld/configure.tgt
index d2bc712..56e1ae4 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -554,6 +554,9 @@ vax-*-linux-*) targ_emul=elf32vax
;;
w65-*-*) targ_emul=w65
;;
+xc16x-*-elf) targ_emul=elf32xc16x
+ targ_extra_emuls="elf32xc16xl elf32xc16xs"
+ ;;
xstormy16-*-*) targ_emul=elf32xstormy16
;;
xtensa-*-*) targ_emul=elf32xtensa
diff --git a/ld/emulparams/elf32xc16x.sh b/ld/emulparams/elf32xc16x.sh
new file mode 100644
index 0000000..808feed
--- /dev/null
+++ b/ld/emulparams/elf32xc16x.sh
@@ -0,0 +1,8 @@
+SCRIPT_NAME=elf32xc16x
+TEMPLATE_NAME=elf32
+OUTPUT_FORMAT="elf32-xc16x"
+TEXT_START_ADDR=0x00400
+ARCH=xc16x
+MAXPAGESIZE=256
+ENTRY=_start
+EMBEDDED=yes
diff --git a/ld/emulparams/elf32xc16xl.sh b/ld/emulparams/elf32xc16xl.sh
new file mode 100644
index 0000000..333f2a6
--- /dev/null
+++ b/ld/emulparams/elf32xc16xl.sh
@@ -0,0 +1,8 @@
+SCRIPT_NAME=elf32xc16xl
+TEMPLATE_NAME=elf32
+OUTPUT_FORMAT="elf32-xc16x"
+TEXT_START_ADDR=0xc00300
+ARCH=xc16x:xc16xl
+MAXPAGESIZE=256
+ENTRY=_start
+EMBEDDED=yes
diff --git a/ld/emulparams/elf32xc16xs.sh b/ld/emulparams/elf32xc16xs.sh
new file mode 100644
index 0000000..df36f41
--- /dev/null
+++ b/ld/emulparams/elf32xc16xs.sh
@@ -0,0 +1,8 @@
+SCRIPT_NAME=elf32xc16xs
+TEMPLATE_NAME=elf32
+OUTPUT_FORMAT="elf32-xc16x"
+TEXT_START_ADDR=0xc00300
+ARCH=xc16x:xc16xs
+MAXPAGESIZE=256
+ENTRY=_start
+EMBEDDED=yes
diff --git a/ld/scripttempl/elf32xc16x.sc b/ld/scripttempl/elf32xc16x.sc
new file mode 100644
index 0000000..7ffdc38
--- /dev/null
+++ b/ld/scripttempl/elf32xc16x.sc
@@ -0,0 +1,61 @@
+cat <<EOF
+OUTPUT_FORMAT("${OUTPUT_FORMAT}")
+OUTPUT_ARCH(${ARCH})
+ENTRY("_start")
+MEMORY
+{
+
+ vectarea : o =0x00000, l = 0x0300
+
+ introm : o = 0x00400, l = 0x16000
+ /* The stack starts at the top of main ram. */
+
+ dram : o = 0x8000 , l = 0xffff
+ /* At the very top of the address space is the 8-bit area. */
+
+ ldata : o =0x4000 ,l = 0x0200
+}
+
+SECTIONS
+{
+.init :
+ {
+ *(.init)
+ } ${RELOCATING+ >introm}
+
+.text :
+ {
+ *(.rodata)
+ *(.text.*)
+ *(.text)
+ ${RELOCATING+ _etext = . ; }
+ } ${RELOCATING+ > introm}
+.data :
+ {
+ *(.data)
+ *(.data.*)
+
+ ${RELOCATING+ _edata = . ; }
+ } ${RELOCATING+ > dram}
+
+.bss :
+ {
+ ${RELOCATING+ _bss_start = . ;}
+ *(.bss)
+ *(COMMON)
+ ${RELOCATING+ _end = . ; }
+ } ${RELOCATING+ > dram}
+
+ .ldata :
+ {
+ *(.ldata)
+ } ${RELOCATING+ > ldata}
+
+
+ .vects :
+ {
+ *(.vects)
+ } ${RELOCATING+ > vectarea}
+
+}
+EOF
diff --git a/ld/scripttempl/elf32xc16xl.sc b/ld/scripttempl/elf32xc16xl.sc
new file mode 100644
index 0000000..215b50a
--- /dev/null
+++ b/ld/scripttempl/elf32xc16xl.sc
@@ -0,0 +1,64 @@
+cat <<EOF
+OUTPUT_FORMAT("${OUTPUT_FORMAT}")
+OUTPUT_ARCH(${ARCH})
+ENTRY("_start")
+MEMORY
+{
+ vectarea : o =0xc00000, l = 0x0300
+
+ introm : o = 0xc00300, l = 0x16000
+ /* The stack starts at the top of main ram. */
+
+ dram : o = 0x8000 , l = 0xffff
+ /* At the very top of the address space is the 8-bit area. */
+
+ ldata : o =0x4000 ,l = 0x0200
+}
+SECTIONS
+{
+/*.vects :
+ {
+ *(.vects)
+ } ${RELOCATING+ > vectarea} */
+.init :
+ {
+ *(.init)
+ } ${RELOCATING+ >introm}
+
+.text :
+ {
+ *(.rodata)
+ *(.text.*)
+ *(.text)
+ ${RELOCATING+ _etext = . ; }
+ } ${RELOCATING+ > introm}
+.data :
+ {
+ *(.data)
+ *(.data.*)
+
+ ${RELOCATING+ _edata = . ; }
+ } ${RELOCATING+ > dram}
+
+.bss :
+ {
+ ${RELOCATING+ _bss_start = . ;}
+ *(.bss)
+ *(COMMON)
+ ${RELOCATING+ _end = . ; }
+ } ${RELOCATING+ > dram}
+
+ .ldata :
+ {
+ *(.ldata)
+ } ${RELOCATING+ > ldata}
+
+
+ .vects :
+ {
+ *(.vects)
+ } ${RELOCATING+ > vectarea}
+
+
+}
+EOF
diff --git a/ld/scripttempl/elf32xc16xs.sc b/ld/scripttempl/elf32xc16xs.sc
new file mode 100644
index 0000000..215b50a
--- /dev/null
+++ b/ld/scripttempl/elf32xc16xs.sc
@@ -0,0 +1,64 @@
+cat <<EOF
+OUTPUT_FORMAT("${OUTPUT_FORMAT}")
+OUTPUT_ARCH(${ARCH})
+ENTRY("_start")
+MEMORY
+{
+ vectarea : o =0xc00000, l = 0x0300
+
+ introm : o = 0xc00300, l = 0x16000
+ /* The stack starts at the top of main ram. */
+
+ dram : o = 0x8000 , l = 0xffff
+ /* At the very top of the address space is the 8-bit area. */
+
+ ldata : o =0x4000 ,l = 0x0200
+}
+SECTIONS
+{
+/*.vects :
+ {
+ *(.vects)
+ } ${RELOCATING+ > vectarea} */
+.init :
+ {
+ *(.init)
+ } ${RELOCATING+ >introm}
+
+.text :
+ {
+ *(.rodata)
+ *(.text.*)
+ *(.text)
+ ${RELOCATING+ _etext = . ; }
+ } ${RELOCATING+ > introm}
+.data :
+ {
+ *(.data)
+ *(.data.*)
+
+ ${RELOCATING+ _edata = . ; }
+ } ${RELOCATING+ > dram}
+
+.bss :
+ {
+ ${RELOCATING+ _bss_start = . ;}
+ *(.bss)
+ *(COMMON)
+ ${RELOCATING+ _end = . ; }
+ } ${RELOCATING+ > dram}
+
+ .ldata :
+ {
+ *(.ldata)
+ } ${RELOCATING+ > ldata}
+
+
+ .vects :
+ {
+ *(.vects)
+ } ${RELOCATING+ > vectarea}
+
+
+}
+EOF
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index d1692ed..3d964b0 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,16 @@
+2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
+ Anil Paranjape <anilp1@kpitcummins.com>
+ Shilin Shakti <shilins@kpitcummins.com>
+
+ * ld-xc16x: New directory.
+ * ld-xc16x/absrel.d: New file.
+ * ld-xc16x/absrel.s: New file.
+ * ld-xc16x/offset.d: New file.
+ * ld-xc16x/offset.s: New file.
+ * ld-xc16x/pcreloc.d: New file.
+ * ld-xc16x/pcreloc.s: New file.
+ * ld-xc16x/xc16x.exp: New file.
+
2006-02-07 Paul Brook <paul@codesourcery.com>
* ld-arm/arm-elf.exp: Add thumb-entry test.
diff --git a/ld/testsuite/ld-xc16x/absrel.d b/ld/testsuite/ld-xc16x/absrel.d
new file mode 100644
index 0000000..a6941c2
--- /dev/null
+++ b/ld/testsuite/ld-xc16x/absrel.d
@@ -0,0 +1,28 @@
+
+.*: file format elf32-xc16x
+
+Disassembly of section .text:
+
+00000400 <_start>:
+ 400: e0 f5 mov r5,#0xf
+ 402: e0 f6 mov r6,#0xf
+
+00000404 <.12>:
+ 404: f2 f5 1c 04 mov r5,0x41c
+ 408: e0 d6 mov r6,#0xd
+ 40a: f2 f7 1c 04 mov r7,0x41c
+ 40e: e0 d8 mov r8,#0xd
+
+00000410 <.13>:
+ 410: f2 f5 1c 04 mov r5,0x41c
+ 414: e0 f6 mov r6,#0xf
+ 416: f2 f7 1c 04 mov r7,0x41c
+ 41a: e0 f8 mov r8,#0xf
+
+0000041c <.end>:
+.*: ca 09 04 04 calla- cc_nusr0,404 <.12>
+.*: ca 19 04 04 calla- cc_nusr1,404 <.12>
+.*: ca 29 04 04 calla- cc_usr0,404 <.12>
+.*: ea 09 04 04 jmpa- cc_nusr0,404 <.12>
+.*: ea 19 04 04 jmpa- cc_nusr1,404 <.12>
+.*: ea 29 04 04 jmpa- cc_usr0,404 <.12>
diff --git a/ld/testsuite/ld-xc16x/absrel.s b/ld/testsuite/ld-xc16x/absrel.s
new file mode 100644
index 0000000..3bfe70e
--- /dev/null
+++ b/ld/testsuite/ld-xc16x/absrel.s
@@ -0,0 +1,31 @@
+ .global _start
+_start:
+ mov r5,#0xf
+ mov r6,#0xf
+
+.12:
+ mov r5,.end
+ mov r6,#0xd
+ mov r7,.end
+ mov r8,#0xd
+.13:
+ mov r5,.end
+ mov r6,#0xf
+ mov r7,.end
+ mov r8,#0xf
+.end:
+ ;calla cc_UC,.13
+ ;calla cc_usr1,.12
+
+ ;calla+ cc_UGT,.12
+ calla- cc_nusr0,.12
+ calla- cc_nusr1,.12
+ calla- cc_usr0,.12
+
+ ;jmpa cc_UGT,.end
+ ;jmpa cc_nusr0,.end
+
+ ;jmpa+ cc_UGT,.12
+ jmpa- cc_nusr0,.12
+ jmpa- cc_nusr1,.12
+ jmpa- cc_usr0,.12
diff --git a/ld/testsuite/ld-xc16x/offset.d b/ld/testsuite/ld-xc16x/offset.d
new file mode 100644
index 0000000..a879c44
--- /dev/null
+++ b/ld/testsuite/ld-xc16x/offset.d
@@ -0,0 +1,18 @@
+
+.*: file format elf32-xc16x
+
+Disassembly of section .text:
+
+00000400 <_start>:
+ 400: e0 f8 mov r8,#0xf
+ 402: fa 00 08 04 jmps #seg:0x0,#sof:0x408
+ 406: e0 f9 mov r9,#0xf
+
+00000408 <.12>:
+ 408: e0 f5 mov r5,#0xf
+ 40a: e0 f7 mov r7,#0xf
+ 40c: da 00 10 04 calls #seg:0x0,#sof:0x410
+
+00000410 <.13>:
+ 410: e0 f6 mov r6,#0xf
+ 412: e0 f8 mov r8,#0xf
diff --git a/ld/testsuite/ld-xc16x/offset.s b/ld/testsuite/ld-xc16x/offset.s
new file mode 100644
index 0000000..b3aad19
--- /dev/null
+++ b/ld/testsuite/ld-xc16x/offset.s
@@ -0,0 +1,13 @@
+ .global _start
+_start:
+ mov r8,#0xf
+ jmps #seg:.12,#sof:.12
+ mov r9,#0xf
+.12:
+ mov r5,#0xf
+ mov r7,#0xf
+ calls #seg:.13,#sof:.13
+.13:
+ mov r6,#0xf
+ mov r8,#0xf
+ \ No newline at end of file
diff --git a/ld/testsuite/ld-xc16x/pcreloc.d b/ld/testsuite/ld-xc16x/pcreloc.d
new file mode 100644
index 0000000..8f363b5
--- /dev/null
+++ b/ld/testsuite/ld-xc16x/pcreloc.d
@@ -0,0 +1,34 @@
+
+.*: file format elf32-xc16x
+
+Disassembly of section .text:
+
+00000400 <_start>:
+ 400: e0 f5 mov r5,#0xf
+ 402: e0 f6 mov r6,#0xf
+ 404: e0 f7 mov r7,#0xf
+ 406: e0 f8 mov r8,#0xf
+ 408: e0 f9 mov r9,#0xf
+ 40a: e0 fa mov r10,#0xf
+ 40c: e0 fb mov r11,#0xf
+ 40e: e0 fc mov r12,#0xf
+
+00000410 <.12>:
+ 410: 2d 07 jmpr cc_Z,7
+ 412: 3d fe jmpr cc_NZ,254
+ 414: 8d fd jmpr cc_ULT,253
+ 416: 8d 45 jmpr cc_ULT,69
+ 418: 9d 06 jmpr cc_UGE,6
+ 41a: 0d 05 jmpr cc_UC,5
+ 41c: 2d 04 jmpr cc_Z,4
+ 41e: 3d 03 jmpr cc_NZ,3
+
+00000420 <.13>:
+ 420: fd 02 jmpr cc_ULE,2
+ 422: dd 01 jmpr cc_SGE,1
+ 424: bd 00 jmpr cc_SLE,0
+
+00000426 <.end>:
+ 426: 1d f4 jmpr cc_NET,244
+ 428: bb fe callr 254
+ 42a: bb fd callr 253
diff --git a/ld/testsuite/ld-xc16x/pcreloc.s b/ld/testsuite/ld-xc16x/pcreloc.s
new file mode 100644
index 0000000..ed77101
--- /dev/null
+++ b/ld/testsuite/ld-xc16x/pcreloc.s
@@ -0,0 +1,27 @@
+ .global _start
+_start:
+ mov r5,#0xf
+ mov r6,#0xf
+ mov r7,#0xf
+ mov r8,#0xf
+ mov r9,#0xf
+ mov r10,#0xf
+ mov r11,#0xf
+ mov r12,#0xf
+.12:
+ jmpr cc_Z,.13
+ jmpr cc_NZ,.12
+ jmpr cc_C,.12
+ jmpr cc_C,0x45
+ jmpr cc_NC,.end
+ jmpr cc_UC,.end
+ jmpr cc_EQ,.end
+ jmpr cc_NE,.end
+.13:
+ jmpr cc_ULE,.end
+ jmpr cc_SGE,.end
+ jmpr cc_SLE,.end
+.end:
+ jmpr cc_NET,.12
+ callr .end
+ callr .end
diff --git a/ld/testsuite/ld-xc16x/pcrelocl.d b/ld/testsuite/ld-xc16x/pcrelocl.d
new file mode 100644
index 0000000..48d9c82
--- /dev/null
+++ b/ld/testsuite/ld-xc16x/pcrelocl.d
@@ -0,0 +1,34 @@
+
+.*: file format elf32-xc16x
+
+Disassembly of section .text:
+
+00c00300 <_start>:
+ c00300: e0 f5 mov r5,#0xf
+ c00302: e0 f6 mov r6,#0xf
+ c00304: e0 f7 mov r7,#0xf
+ c00306: e0 f8 mov r8,#0xf
+ c00308: e0 f9 mov r9,#0xf
+ c0030a: e0 fa mov r10,#0xf
+ c0030c: e0 fb mov r11,#0xf
+ c0030e: e0 fc mov r12,#0xf
+
+00c00310 <.12>:
+ c00310: 2d 07 jmpr cc_Z,7
+ c00312: 3d fe jmpr cc_NZ,254
+ c00314: 8d fd jmpr cc_ULT,253
+ c00316: 8d 45 jmpr cc_ULT,69
+ c00318: 9d 06 jmpr cc_UGE,6
+ c0031a: 0d 05 jmpr cc_UC,5
+ c0031c: 2d 04 jmpr cc_Z,4
+ c0031e: 3d 03 jmpr cc_NZ,3
+
+00c00320 <.13>:
+ c00320: fd 02 jmpr cc_ULE,2
+ c00322: dd 01 jmpr cc_SGE,1
+ c00324: bd 00 jmpr cc_SLE,0
+
+00c00326 <.end>:
+ c00326: 1d f4 jmpr cc_NET,244
+ c00328: bb fe callr 254
+ c0032a: bb fd callr 253
diff --git a/ld/testsuite/ld-xc16x/xc16x.exp b/ld/testsuite/ld-xc16x/xc16x.exp
new file mode 100644
index 0000000..5732649
--- /dev/null
+++ b/ld/testsuite/ld-xc16x/xc16x.exp
@@ -0,0 +1,65 @@
+# Expect script for ld-xstormy16 tests
+# Copyright (C) 2003 Free Software Foundation
+#
+# This file is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#
+
+# Test xc16x linking of pc-relative relocs. This tests the assembler and
+# tools like objdump as well as the linker.
+
+if {!([istarget "xc16x*-*-*"]) } {
+ return
+}
+
+# Set up a list as described in ld-lib.exp
+
+set xc16x_tests {
+ {
+ "xc16x pc-relative relocs linker test"
+ ""
+ ""
+ { "pcreloc.s" }
+ { {objdump -Dz pcreloc.d} }
+ "pcreloc"
+ }
+}
+
+set xc16xabs_tests {
+ {
+ "xc16x absolute relative address linker test"
+ ""
+ ""
+ { "absrel.s" }
+ { {objdump -Dz absrel.d} }
+ "absrel"
+ }
+}
+
+set xc16xoffset_tests {
+ {
+ "xc16x offset linker test"
+ ""
+ ""
+ { "offset.s" }
+ { {objdump -Dz offset.d} }
+ "offset"
+ }
+}
+
+ run_ld_link_tests $xc16x_tests
+ run_ld_link_tests $xc16xabs_tests
+ run_ld_link_tests $xc16xoffset_tests
+
+
generated by cgit v1.1 at 2025-03-07 09:31:35 +0000