diff options
Diffstat (limited to 'ld')
| -rw-r--r-- | ld/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | ld/testsuite/ld-spu/ovl.d | 12 | ||||
| -rw-r--r-- | ld/testsuite/ld-spu/ovl2.d | 3 |
3 files changed, 20 insertions, 0 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index cc46a65..519fe24 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2007-09-25 Alan Modra <amodra@bigpond.net.au> + + * ld-spu/ovl.d: Adjust for stub relocs. + * ld-spu/ovl2.d: Likewise. + 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 diff --git a/ld/testsuite/ld-spu/ovl.d b/ld/testsuite/ld-spu/ovl.d index 5f126fc..0f3deb2 100644 --- a/ld/testsuite/ld-spu/ovl.d +++ b/ld/testsuite/ld-spu/ovl.d @@ -26,28 +26,40 @@ Disassembly of section \.text: 0000012c <f0>: 12c: 35 00 00 00 bi \$0 + 00000130 <00000000\.ovl_call\.f1_a1>: 130: 42 02 00 4f ila \$79,1024 # 400 134: 32 00 02 80 br 148 .* + 134: SPU_REL16 \*ABS\*\+0x148 + 00000138 <00000000\.ovl_call\.f2_a1>: 138: 42 02 02 4f ila \$79,1028 # 404 13c: 32 00 01 80 br 148 .* + 13c: SPU_REL16 \*ABS\*\+0x148 + 00000140 <00000000\.ovl_call\.f4_a1>: 140: 42 02 08 4f ila \$79,1040 # 410 144: 40 20 00 00 nop \$0 148: 42 00 00 ce ila \$78,1 14c: 32 00 0a 80 br 1a0 <__ovly_load> # 1a0 + 14c: SPU_REL16 __ovly_load + 00000150 <00000000\.ovl_call\.f1_a2>: 150: 42 02 00 4f ila \$79,1024 # 400 154: 32 00 02 80 br 168 .* + 154: SPU_REL16 \*ABS\*\+0x168 + 00000158 <00000000\.ovl_call\.f2_a2>: 158: 42 02 12 4f ila \$79,1060 # 424 15c: 32 00 01 80 br 168 .* + 15c: SPU_REL16 \*ABS\*\+0x168 + 00000160 <00000000\.ovl_call\.14:8>: 160: 42 02 1a 4f ila \$79,1076 # 434 164: 40 20 00 00 nop \$0 168: 42 00 01 4e ila \$78,2 16c: 32 00 06 80 br 1a0 <__ovly_load> # 1a0 + 16c: SPU_REL16 __ovly_load #... [0-9a-f]+ <__ovly_return>: [0-9a-f ]+: 3f e1 00 4e shlqbyi \$78,\$0,4 diff --git a/ld/testsuite/ld-spu/ovl2.d b/ld/testsuite/ld-spu/ovl2.d index 52b362d..e4a47a6 100644 --- a/ld/testsuite/ld-spu/ovl2.d +++ b/ld/testsuite/ld-spu/ovl2.d @@ -26,18 +26,21 @@ Disassembly of section \.text: 124: 40 20 00 00 nop \$0 128: 42 00 00 4e ila \$78,0 12c: 32 00 0a 80 br 180 <__ovly_load> # 180 + 12c: SPU_REL16 __ovly_load 00000130 <00000000\.ovl_call.f1_a1>: 130: 42 02 00 4f ila \$79,1024 # 400 134: 40 20 00 00 nop \$0 138: 42 00 00 ce ila \$78,1 13c: 32 00 08 80 br 180 <__ovly_load> # 180 + 13c: SPU_REL16 __ovly_load 00000140 <_SPUEAR_f1_a2>: 140: 42 02 00 4f ila \$79,1024 # 400 144: 40 20 00 00 nop \$0 148: 42 00 01 4e ila \$78,2 14c: 32 00 06 80 br 180 <__ovly_load> # 180 + 14c: SPU_REL16 __ovly_load #... Disassembly of section \.ov_a1: |