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-rw-r--r--ld/testsuite/ld-mips-elf/mips-elf.exp117
-rw-r--r--ld/testsuite/ld-mips-elf/mips16-pic-3.dd265
-rw-r--r--ld/testsuite/ld-mips-elf/mips16-pic-3.gd23
-rw-r--r--ld/testsuite/ld-mips-elf/mips16-pic-3.inc59
-rw-r--r--ld/testsuite/ld-mips-elf/mips16-pic-3.rd7
-rw-r--r--ld/testsuite/ld-mips-elf/mips16-pic-3a.s59
-rw-r--r--ld/testsuite/ld-mips-elf/mips16-pic-3b.s14
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-1-rel.dd46
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-1-rel.nd5
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-1.dd46
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-1.ld9
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-1.nd9
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-1a.s31
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-1b.s9
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d23
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-2a.s7
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-2b.s6
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3-error.d5
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.dd39
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.gd18
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.ld23
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.s29
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd20
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ad27
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.dd53
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.gd28
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ld35
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.nd9
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.pd5
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.rd4
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.s22
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd27
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-4-error.d5
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-4a.s22
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ad26
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.dd10
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.gd7
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ld33
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.nd12
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.rd7
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.s13
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd27
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-5a.s16
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ad32
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.dd35
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.gd26
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ld38
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.nd10
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.pd7
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.rd13
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.s9
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd27
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.ad27
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.dd102
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.gd32
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.nd17
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.pd6
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.rd14
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd27
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32a.s48
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32b.s39
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s25
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.ad27
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd102
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.gd32
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.nd17
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.pd7
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.rd30
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd25
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64a.s48
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64b.s39
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s25
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.ad27
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.dd102
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.gd32
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.nd17
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.pd6
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.rd14
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd27
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32a.s48
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32b.s37
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s25
-rw-r--r--ld/testsuite/ld-mips-elf/pic-and-nonpic-6.ld40
83 files changed, 2517 insertions, 1 deletions
diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp
index 368335a..72964f9 100644
--- a/ld/testsuite/ld-mips-elf/mips-elf.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf.exp
@@ -77,7 +77,14 @@ if { $linux_gnu } {
{ readelf --symbols mips16-pic-2.nd } \
{ readelf --relocs mips16-pic-2.rd } \
{ readelf -d mips16-pic-2.ad } } \
- "mips16-pic-2"]]
+ "mips16-pic-2"] \
+ [list "MIPS16 PIC test 3" \
+ "-melf32btsmip -T mips16-pic-1.ld tmpdir/mips16-pic-1-dummy.so" \
+ "-EB -32 -I $srcdir/$subdir" { mips16-pic-3a.s mips16-pic-3b.s } \
+ { { objdump -dr mips16-pic-3.dd } \
+ { readelf --relocs mips16-pic-3.rd } \
+ { readelf -A mips16-pic-3.gd } } \
+ "mips16-pic-3"]]
}
if { [istarget mips64*-linux-gnu] } {
@@ -133,6 +140,114 @@ if { $linux_gnu } {
run_dump_test "rel32-o32"
run_dump_test "rel32-n32"
run_dump_test "rel64"
+ # The first test checks that a mixed PIC/non-PIC relocatable link
+ # will not introduce any stubs itself, but will flag PIC functions
+ # for the final link.
+ #
+ # The second test checks that we insert stubs for calls from
+ # non-PIC functions to PIC functions when linking the original
+ # two objects together.
+ #
+ # The third test checks that we do the same when linking the
+ # result of the first link (with no other source files).
+ run_ld_link_tests {
+ {"PIC and non-PIC test 1 (relocatable)" "-r -melf32btsmip"
+ "-32 -EB -mips2" {pic-and-nonpic-1a.s pic-and-nonpic-1b.s}
+ {{objdump -dr pic-and-nonpic-1-rel.dd}
+ {readelf --symbols pic-and-nonpic-1-rel.nd}}
+ "pic-and-nonpic-1-rel.o"}
+ {"PIC and non-PIC test 1 (static 1)"
+ "-melf32btsmip -Tpic-and-nonpic-1.ld"
+ "-32 -EB -mips2" {pic-and-nonpic-1a.s pic-and-nonpic-1b.s}
+ {{objdump -dr pic-and-nonpic-1.dd}
+ {readelf --symbols pic-and-nonpic-1.nd}}
+ "pic-and-nonpic-1-static1.o"}
+ {"PIC and non-PIC test 1 (static 2)"
+ "-melf32btsmip -Tpic-and-nonpic-1.ld tmpdir/pic-and-nonpic-1-rel.o"
+ "" {}
+ {{objdump -dr pic-and-nonpic-1.dd}
+ {readelf --symbols pic-and-nonpic-1.nd}}
+ "pic-and-nonpic-1-static2.o"}
+ }
+ run_dump_test "pic-and-nonpic-2"
+ run_ld_link_tests {
+ {"PIC and non-PIC test 3 (shared library)"
+ "-melf32btsmip -shared -Tpic-and-nonpic-3a.ld"
+ "-32 -EB -mips2" {pic-and-nonpic-3a.s}
+ {{readelf --segments pic-and-nonpic-3a.sd}
+ {readelf -A pic-and-nonpic-3a.gd}
+ {objdump -dr pic-and-nonpic-3a.dd}}
+ "pic-and-nonpic-3a.so"}
+ {"PIC and non-PIC test 3 (executable)"
+ "-melf32btsmip -Tpic-and-nonpic-3b.ld tmpdir/pic-and-nonpic-3a.so"
+ "-32 -EB -mips2" {pic-and-nonpic-3b.s}
+ {{readelf --segments pic-and-nonpic-3b.sd}
+ {objdump -dr pic-and-nonpic-3b.dd}
+ {objdump {-s -j.got.plt} pic-and-nonpic-3b.pd}
+ {readelf -A pic-and-nonpic-3b.gd}
+ {readelf --relocs pic-and-nonpic-3b.rd}
+ {readelf --symbols pic-and-nonpic-3b.nd}
+ {readelf -d pic-and-nonpic-3b.ad}}
+ "pic-and-nonpic-3b"}
+ }
+ run_dump_test "pic-and-nonpic-3-error"
+ run_ld_link_tests {
+ {"PIC and non-PIC test 4 (shared library)"
+ "-melf32btsmip -shared -Tpic-and-nonpic-3a.ld"
+ "-32 -EB -mips2" {pic-and-nonpic-4a.s}
+ {}
+ "pic-and-nonpic-4a.so"}
+ {"PIC and non-PIC test 4 (executable)"
+ "-melf32btsmip -Tpic-and-nonpic-4b.ld tmpdir/pic-and-nonpic-4a.so"
+ "-32 -EB -mips2" {pic-and-nonpic-4b.s}
+ {{readelf --segments pic-and-nonpic-4b.sd}
+ {objdump -dr pic-and-nonpic-4b.dd}
+ {objdump {-s -j.got -j.data} pic-and-nonpic-4b.gd}
+ {readelf --relocs pic-and-nonpic-4b.rd}
+ {readelf --symbols pic-and-nonpic-4b.nd}
+ {readelf -d pic-and-nonpic-4b.ad}}
+ "pic-and-nonpic-4b"}
+ }
+ run_dump_test "pic-and-nonpic-4-error"
+ run_ld_link_tests {
+ {"PIC and non-PIC test 5 (executable)"
+ "-melf32btsmip -Tpic-and-nonpic-5b.ld tmpdir/pic-and-nonpic-3a.so tmpdir/pic-and-nonpic-4a.so"
+ "-32 -EB -mips2" {pic-and-nonpic-5a.s pic-and-nonpic-5b.s}
+ {{readelf --segments pic-and-nonpic-5b.sd}
+ {objdump -dr pic-and-nonpic-5b.dd}
+ {objdump {-s -j.got.plt -j.data} pic-and-nonpic-5b.pd}
+ {readelf -A pic-and-nonpic-5b.gd}
+ {readelf --relocs pic-and-nonpic-5b.rd}
+ {readelf --symbols pic-and-nonpic-5b.nd}
+ {readelf -d pic-and-nonpic-5b.ad}}
+ "pic-and-nonpic-5b"}
+ }
+ set abis { o32 -32 elf32btsmip }
+ if $has_newabi {
+ lappend abis n32 -n32 elf32btsmipn32
+ lappend abis n64 -64 elf64btsmip
+ }
+ foreach { abi flag emul } $abis {
+ run_ld_link_tests [list \
+ [list "PIC and non-PIC test 6 ($abi shared library)" \
+ "-m$emul -shared -Tpic-and-nonpic-3a.ld" \
+ "$flag -EB -mips3" \
+ [list "pic-and-nonpic-6-${abi}a.s"] {} \
+ "pic-and-nonpic-6-${abi}.so"] \
+ [list "PIC and non-PIC test 6 ($abi executable)" \
+ "-m$emul -Tpic-and-nonpic-6.ld tmpdir/pic-and-nonpic-6-${abi}.so" \
+ "$flag -EB -mips3" \
+ [list "pic-and-nonpic-6-${abi}b.s" \
+ "pic-and-nonpic-6-${abi}c.s"] \
+ [list "readelf {--wide --segments} pic-and-nonpic-6-${abi}.sd" \
+ "objdump -dr pic-and-nonpic-6-${abi}.dd" \
+ "objdump {-s -j.got.plt} pic-and-nonpic-6-${abi}.pd" \
+ "readelf -A pic-and-nonpic-6-${abi}.gd" \
+ "readelf --relocs pic-and-nonpic-6-${abi}.rd" \
+ "readelf --symbols pic-and-nonpic-6-${abi}.nd" \
+ "readelf -d pic-and-nonpic-6-${abi}.ad"] \
+ "pic-and-nonpic-6-${abi}"]]
+ }
}
if { $embedded_elf } {
diff --git a/ld/testsuite/ld-mips-elf/mips16-pic-3.dd b/ld/testsuite/ld-mips-elf/mips16-pic-3.dd
new file mode 100644
index 0000000..93ba085
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/mips16-pic-3.dd
@@ -0,0 +1,265 @@
+
+.*
+
+
+Disassembly of section \.text:
+
+00040400 <unused1>:
+.*: e820 jr ra
+.*: 6500 nop
+
+00040404 <unused2>:
+.*: e820 jr ra
+.*: 6500 nop
+
+00040408 <unused3>:
+.*: e820 jr ra
+.*: 6500 nop
+
+0004040c <unused4>:
+.*: e820 jr ra
+.*: 6500 nop
+
+00040410 <used1>:
+.*: 03e00008 jr ra
+.*: 00000000 nop
+
+00040418 <used2>:
+.*: 03e00008 jr ra
+.*: 00000000 nop
+
+00040420 <used3>:
+.*: 03e00008 jr ra
+.*: 00000000 nop
+
+00040428 <used4>:
+.*: 03e00008 jr ra
+.*: 00000000 nop
+
+00040430 <used5>:
+.*: 03e00008 jr ra
+.*: 00000000 nop
+
+00040438 <used6>:
+.*: 03e00008 jr ra
+.*: 00000000 nop
+
+00040440 <used7>:
+.*: 03e00008 jr ra
+.*: 00000000 nop
+
+00040448 <used8>:
+.*: 03e00008 jr ra
+.*: 00000000 nop
+
+00040450 <used9>:
+.*: 03e00008 jr ra
+.*: 00000000 nop
+
+00040458 <used10>:
+.*: 03e00008 jr ra
+.*: 00000000 nop
+
+00040460 <test_unused1>:
+.*: .* jal .* <unused1>
+
+00040464 <test_used1>:
+.*: .* jalx .* <__call_used1>
+
+00040468 <test_used3>:
+.*: .* jalx .* <__call_used3>
+
+0004046c <test_used7>:
+.*: .* jalx .* <__call_used7>
+
+00040470 <test_extern1>:
+.*: .* jalx .* <__call_extern1>
+
+00040474 <test_unused2>:
+.*: .* jal .* <unused2>
+
+00040478 <test_used2>:
+.*: .* jalx .* <__call_fp_used2>
+
+0004047c <test_used4>:
+.*: .* jalx .* <__call_fp_used4>
+
+00040480 <test_used8>:
+.*: .* jalx .* <__call_fp_used8>
+
+00040484 <test_extern2>:
+.*: .* jalx .* <__call_fp_extern2>
+#...
+
+00040490 <test_unused3>:
+.*: .* jal .* <unused3>
+
+00040494 <test_used5>:
+.*: .* jalx .* <__call_used5>
+
+00040498 <test_used9>:
+.*: .* jalx .* <__call_used9>
+
+0004049c <test_extern3>:
+.*: .* jalx .* <__call_extern3>
+
+000404a0 <test_unused4>:
+.*: .* jal .* <unused4>
+
+000404a4 <test_used6>:
+.*: .* jalx .* <__call_fp_used6>
+
+000404a8 <test_used10>:
+.*: .* jalx .* <__call_fp_used10>
+
+000404ac <test_extern4>:
+.*: .* jalx .* <__call_fp_extern4>
+
+000404b0 <__call_used1>:
+.*: 3c190004 lui t9,.*
+.*: 27390410 addiu t9,t9,.*
+.*: 03200008 jr t9
+.*: 44846000 mtc1 a0,\$f12
+
+000404c0 <__call_used3>:
+.*: 3c190004 lui t9,.*
+.*: 27390420 addiu t9,t9,.*
+.*: 03200008 jr t9
+.*: 44846000 mtc1 a0,\$f12
+
+000404d0 <__call_used7>:
+.*: 3c190004 lui t9,.*
+.*: 27390440 addiu t9,t9,.*
+.*: 03200008 jr t9
+.*: 44846000 mtc1 a0,\$f12
+
+000404e0 <__call_extern1>:
+.*: 3c190004 lui t9,.*
+.*: 27390650 addiu t9,t9,.*
+.*: 03200008 jr t9
+.*: 44846000 mtc1 a0,\$f12
+
+000404f0 <__call_fp_used2>:
+.*: 03e09021 move s2,ra
+.*: 3c190004 lui t9,.*
+.*: 27390418 addiu t9,t9,.*
+.*: 0320f809 jalr t9
+.*: 44846000 mtc1 a0,\$f12
+.*: 44020000 mfc1 v0,\$f0
+.*: 02400008 jr s2
+.*: 00000000 nop
+
+00040510 <__call_fp_used4>:
+.*: 03e09021 move s2,ra
+.*: 3c190004 lui t9,.*
+.*: 27390428 addiu t9,t9,.*
+.*: 0320f809 jalr t9
+.*: 44846000 mtc1 a0,\$f12
+.*: 44020000 mfc1 v0,\$f0
+.*: 02400008 jr s2
+.*: 00000000 nop
+
+00040530 <__call_fp_used8>:
+.*: 03e09021 move s2,ra
+.*: 3c190004 lui t9,.*
+.*: 27390448 addiu t9,t9,.*
+.*: 0320f809 jalr t9
+.*: 44846000 mtc1 a0,\$f12
+.*: 44020000 mfc1 v0,\$f0
+.*: 02400008 jr s2
+.*: 00000000 nop
+
+00040550 <__call_fp_extern2>:
+.*: 03e09021 move s2,ra
+.*: 3c190004 lui t9,.*
+.*: 27390630 addiu t9,t9,.*
+.*: 0320f809 jalr t9
+.*: 44846000 mtc1 a0,\$f12
+.*: 44020000 mfc1 v0,\$f0
+.*: 02400008 jr s2
+.*: 00000000 nop
+
+00040570 <__call_used5>:
+.*: 3c190004 lui t9,.*
+.*: 27390430 addiu t9,t9,.*
+.*: 03200008 jr t9
+.*: 44846000 mtc1 a0,\$f12
+
+00040580 <__call_used9>:
+.*: 3c190004 lui t9,.*
+.*: 27390450 addiu t9,t9,.*
+.*: 03200008 jr t9
+.*: 44846000 mtc1 a0,\$f12
+
+00040590 <__call_extern3>:
+.*: 3c190004 lui t9,.*
+.*: 27390620 addiu t9,t9,.*
+.*: 03200008 jr t9
+.*: 44846000 mtc1 a0,\$f12
+
+000405a0 <__call_fp_used6>:
+.*: 03e09021 move s2,ra
+.*: 3c190004 lui t9,.*
+.*: 27390438 addiu t9,t9,.*
+.*: 0320f809 jalr t9
+.*: 44846000 mtc1 a0,\$f12
+.*: 44020000 mfc1 v0,\$f0
+.*: 02400008 jr s2
+.*: 00000000 nop
+
+000405c0 <__call_fp_used10>:
+.*: 03e09021 move s2,ra
+.*: 3c190004 lui t9,.*
+.*: 27390458 addiu t9,t9,.*
+.*: 0320f809 jalr t9
+.*: 44846000 mtc1 a0,\$f12
+.*: 44020000 mfc1 v0,\$f0
+.*: 02400008 jr s2
+.*: 00000000 nop
+
+000405e0 <__call_fp_extern4>:
+.*: 03e09021 move s2,ra
+.*: 3c190004 lui t9,.*
+.*: 27390640 addiu t9,t9,.*
+.*: 0320f809 jalr t9
+.*: 44846000 mtc1 a0,\$f12
+.*: 44020000 mfc1 v0,\$f0
+.*: 02400008 jr s2
+.*: 00000000 nop
+
+Disassembly of section \.plt:
+
+00040600 <.*>:
+.*: 3c1c0005 lui gp,0x5
+.*: 8f990400 lw t9,1024\(gp\)
+.*: 279c0400 addiu gp,gp,1024
+.*: 031cc023 subu t8,t8,gp
+.*: 03e07821 move t7,ra
+.*: 0018c082 srl t8,t8,0x2
+.*: 0320f809 jalr t9
+.*: 2718fffe addiu t8,t8,-2
+
+00040620 <extern3@plt>:
+.*: 3c0f0005 lui t7,0x5
+.*: 8df90408 lw t9,1032\(t7\)
+.*: 25f80408 addiu t8,t7,1032
+.*: 03200008 jr t9
+
+00040630 <extern2@plt>:
+.*: 3c0f0005 lui t7,0x5
+.*: 8df9040c lw t9,1036\(t7\)
+.*: 25f8040c addiu t8,t7,1036
+.*: 03200008 jr t9
+
+00040640 <extern4@plt>:
+.*: 3c0f0005 lui t7,0x5
+.*: 8df90410 lw t9,1040\(t7\)
+.*: 25f80410 addiu t8,t7,1040
+.*: 03200008 jr t9
+
+00040650 <extern1@plt>:
+.*: 3c0f0005 lui t7,0x5
+.*: 8df90414 lw t9,1044\(t7\)
+.*: 25f80414 addiu t8,t7,1044
+.*: 03200008 jr t9
+.*: 00000000 nop
diff --git a/ld/testsuite/ld-mips-elf/mips16-pic-3.gd b/ld/testsuite/ld-mips-elf/mips16-pic-3.gd
new file mode 100644
index 0000000..9297fe6
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/mips16-pic-3.gd
@@ -0,0 +1,23 @@
+
+Primary GOT:
+ Canonical gp value: 00057ff0
+
+ Reserved entries:
+ Address Access Initial Purpose
+ 00050000 -32752\(gp\) 00000000 Lazy resolver
+ 00050004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
+
+
+PLT GOT:
+
+ Reserved entries:
+ Address Initial Purpose
+ 00050400 00000000 PLT lazy resolver
+ 00050404 00000000 Module pointer
+
+ Entries:
+ Address Initial Sym.Val. Type Ndx Name
+ 00050408 00040600 00040620 FUNC UND extern3
+ 0005040c 00040600 00040630 FUNC UND extern2
+ 00050410 00040600 00040640 FUNC UND extern4
+ 00050414 00040600 00040650 FUNC UND extern1
diff --git a/ld/testsuite/ld-mips-elf/mips16-pic-3.inc b/ld/testsuite/ld-mips-elf/mips16-pic-3.inc
new file mode 100644
index 0000000..9611611
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/mips16-pic-3.inc
@@ -0,0 +1,59 @@
+ .macro test_call,name
+ .set mips16
+ .text
+ .ent test_\name
+test_\name:
+ jal \name
+ .end test_\name
+ .endm
+
+ .macro call_stub,name
+ .set nomips16
+ .section .mips16.call.\name, "ax", @progbits
+ .ent __call_\name
+__call_\name:
+ la $25,\name
+ jr $25
+ mtc1 $4,$f12
+ .end __call_\name
+
+ test_call \name
+ .endm
+
+ .macro call_fp_stub,name
+ .set nomips16
+ .section .mips16.call.fp.\name, "ax", @progbits
+ .ent __call_fp_\name
+__call_fp_\name:
+ move $18,$31
+ la $25,\name
+ jalr $25
+ mtc1 $4,$f12
+ mfc1 $2,$f0
+ jr $18
+ nop
+ .end __call_fp_\name
+
+ test_call \name
+ .endm
+
+ .macro lstub,name,mode
+ .set \mode
+ .text
+ .ent \name
+\name:
+ jr $31
+ nop
+ .end \name
+ .endm
+
+ .macro hstub,name,mode
+ .globl \name
+ .hidden \name
+ lstub \name, \mode
+ .endm
+
+ .macro gstub,name,mode
+ .globl \name
+ lstub \name, \mode
+ .endm
diff --git a/ld/testsuite/ld-mips-elf/mips16-pic-3.rd b/ld/testsuite/ld-mips-elf/mips16-pic-3.rd
new file mode 100644
index 0000000..6293cf7
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/mips16-pic-3.rd
@@ -0,0 +1,7 @@
+
+Relocation section '\.rel\.plt' at offset .* contains 4 entries:
+ Offset Info Type Sym\.Value Sym\. Name
+00050408 .*7f R_MIPS_JUMP_SLOT 00040620 extern3
+0005040c .*7f R_MIPS_JUMP_SLOT 00040630 extern2
+00050410 .*7f R_MIPS_JUMP_SLOT 00040640 extern4
+00050414 .*7f R_MIPS_JUMP_SLOT 00040650 extern1
diff --git a/ld/testsuite/ld-mips-elf/mips16-pic-3a.s b/ld/testsuite/ld-mips-elf/mips16-pic-3a.s
new file mode 100644
index 0000000..bbe3a67
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/mips16-pic-3a.s
@@ -0,0 +1,59 @@
+ .abicalls
+ .option pic0
+ .set noreorder
+ .include "mips16-pic-3.inc"
+
+ # For symbols called by a .call stub in this file.
+ hstub unused1,mips16
+
+ # For symbols called by a .call.fp stub in this file.
+ hstub unused2,mips16
+
+ # For symbols called by a .call stub in another file.
+ hstub unused3,mips16
+
+ # For symbols called by a .call.fp stub in another file.
+ hstub unused4,mips16
+
+
+ # For symbols called by a .call stub in this file.
+ lstub used1,nomips16
+
+ # For symbols called by a .call.fp stub in this file.
+ lstub used2,nomips16
+
+ # For symbols called by a .call stub in this file.
+ hstub used3,nomips16
+
+ # For symbols called by a .call.fp stub in this file.
+ hstub used4,nomips16
+
+ # For symbols called by a .call stub in another file.
+ hstub used5,nomips16
+
+ # For symbols called by a .call.fp stub in another file.
+ hstub used6,nomips16
+
+ # For symbols called by a .call stub in this file.
+ gstub used7,nomips16
+
+ # For symbols called by a .call.fp stub in this file.
+ gstub used8,nomips16
+
+ # For symbols called by a .call stub in another file.
+ gstub used9,nomips16
+
+ # For symbols called by a .call.fp stub in another file.
+ gstub used10,nomips16
+
+ call_stub unused1
+ call_stub used1
+ call_stub used3
+ call_stub used7
+ call_stub extern1
+
+ call_fp_stub unused2
+ call_fp_stub used2
+ call_fp_stub used4
+ call_fp_stub used8
+ call_fp_stub extern2
diff --git a/ld/testsuite/ld-mips-elf/mips16-pic-3b.s b/ld/testsuite/ld-mips-elf/mips16-pic-3b.s
new file mode 100644
index 0000000..3003145
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/mips16-pic-3b.s
@@ -0,0 +1,14 @@
+ .abicalls
+ .option pic0
+ .set noreorder
+ .include "mips16-pic-3.inc"
+
+ call_stub unused3
+ call_stub used5
+ call_stub used9
+ call_stub extern3
+
+ call_fp_stub unused4
+ call_fp_stub used6
+ call_fp_stub used10
+ call_fp_stub extern4
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-1-rel.dd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1-rel.dd
new file mode 100644
index 0000000..4d15a58
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1-rel.dd
@@ -0,0 +1,46 @@
+
+.*
+
+Disassembly of section \.text:
+
+00000000 <f1>:
+ 0: 3c1c0000 lui gp,0x0
+ 0: R_MIPS_HI16 _gp_disp
+ 4: 279c0000 addiu gp,gp,0
+ 4: R_MIPS_LO16 _gp_disp
+ 8: 0399e021 addu gp,gp,t9
+ c: 0c000000 jal 0 .*
+ c: R_MIPS_26 f3
+ 10: 00000000 nop
+ 14: 03e00008 jr ra
+ 18: 00000000 nop
+
+0000001c <f2>:
+ 1c: 3c1c0000 lui gp,0x0
+ 1c: R_MIPS_HI16 _gp_disp
+ 20: 279c0000 addiu gp,gp,0
+ 20: R_MIPS_LO16 _gp_disp
+ 24: 0399e021 addu gp,gp,t9
+ 28: 03e00008 jr ra
+ 2c: 00000000 nop
+
+00000030 <f3>:
+ 30: f000 6a00 li v0,0
+ 30: R_MIPS16_HI16 _gp_disp
+ 34: f000 0b00 la v1,34 .*
+ 34: R_MIPS16_LO16 _gp_disp
+ 38: f400 3240 sll v0,16
+ 3c: e269 addu v0,v1
+ 3e: 6500 nop
+
+00000040 <__start>:
+ 40: 0c000000 jal 0 .*
+ 40: R_MIPS_26 f1
+ 44: 00000000 nop
+ 48: 0c000000 jal 0 .*
+ 48: R_MIPS_26 f2
+ 4c: 00000000 nop
+ 50: 0c000000 jal 0 .*
+ 50: R_MIPS_26 f3
+ 54: 00000000 nop
+ ...
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-1-rel.nd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1-rel.nd
new file mode 100644
index 0000000..c5f0b51
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1-rel.nd
@@ -0,0 +1,5 @@
+#...
+.*: 00000030 14 FUNC GLOBAL DEFAULT \[MIPS16\] .* f3
+.*: 00000040 24 FUNC GLOBAL DEFAULT .* __start
+.*: 0000001c 20 FUNC GLOBAL DEFAULT \[MIPS PIC\] .* f2
+.*: 00000000 28 FUNC GLOBAL DEFAULT \[MIPS PIC\] .* f1
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-1.dd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1.dd
new file mode 100644
index 0000000..9d5b1db
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1.dd
@@ -0,0 +1,46 @@
+
+.*
+
+Disassembly of section \.text:
+
+00041000 <\.pic\.f2>:
+ 41000: 3c190004 lui t9,0x4
+ 41004: 0801040f j 4103c <f2>
+ 41008: 2739103c addiu t9,t9,4156
+ \.\.\.
+
+00041018 <\.pic\.f1>:
+ 41018: 3c190004 lui t9,0x4
+ 4101c: 27391020 addiu t9,t9,4128
+
+00041020 <f1>:
+ 41020: 3c1c0002 lui gp,0x2
+ 41024: 279c6fe0 addiu gp,gp,28640
+ 41028: 0399e021 addu gp,gp,t9
+ 4102c: 74010414 jalx 41050 <f3>
+ 41030: 00000000 nop
+ 41034: 03e00008 jr ra
+ 41038: 00000000 nop
+
+0004103c <f2>:
+ 4103c: 3c1c0002 lui gp,0x2
+ 41040: 279c6fc4 addiu gp,gp,28612
+ 41044: 0399e021 addu gp,gp,t9
+ 41048: 03e00008 jr ra
+ 4104c: 00000000 nop
+
+00041050 <f3>:
+ 41050: f000 6a02 li v0,2
+ 41054: f7ad 0b0c la v1,48000 .*
+ 41058: f400 3240 sll v0,16
+ 4105c: e269 addu v0,v1
+ 4105e: 6500 nop
+
+00041060 <__start>:
+ 41060: 0c010406 jal 41018 <\.pic\.f1>
+ 41064: 00000000 nop
+ 41068: 0c010400 jal 41000 <\.pic\.f2>
+ 4106c: 00000000 nop
+ 41070: 74010414 jalx 41050 <f3>
+ 41074: 00000000 nop
+ \.\.\.
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-1.ld b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1.ld
new file mode 100644
index 0000000..3aa140e
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1.ld
@@ -0,0 +1,9 @@
+SECTIONS
+{
+ . = 0x40000;
+ .reginfo : { *(.reginfo) }
+ .pdr : { *(.pdr) }
+ . = 0x41000;
+ .text : { *(.text) }
+ _gp = 0x68000;
+}
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-1.nd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1.nd
new file mode 100644
index 0000000..506685a
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1.nd
@@ -0,0 +1,9 @@
+#...
+.*: 00041018 8 FUNC LOCAL DEFAULT .* .pic.f1
+.*: 00041000 16 FUNC LOCAL DEFAULT .* .pic.f2
+.*: 00000000 0 OBJECT GLOBAL DEFAULT UND _gp_disp
+.*: 00068000 0 NOTYPE GLOBAL DEFAULT ABS _gp
+.*: 00041050 14 FUNC GLOBAL DEFAULT \[MIPS16\] .* f3
+.*: 00041060 24 FUNC GLOBAL DEFAULT .* __start
+.*: 0004103c 20 FUNC GLOBAL DEFAULT .* f2
+.*: 00041020 28 FUNC GLOBAL DEFAULT .* f1
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-1a.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1a.s
new file mode 100644
index 0000000..c54030e
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1a.s
@@ -0,0 +1,31 @@
+ .abicalls
+ .global f1
+ .global f2
+ .global f3
+ .ent f1
+f1:
+ .set noreorder
+ .cpload $25
+ .set reorder
+ .option pic0
+ jal f3
+ .option pic2
+ jr $31
+ .end f1
+
+ .ent f2
+f2:
+ .set noreorder
+ .cpload $25
+ .set reorder
+ jr $31
+ .end f2
+
+ .set mips16
+ .ent f3
+f3:
+ li $2,%hi(_gp_disp)
+ addiu $3,$pc,%lo(_gp_disp)
+ sll $2,16
+ addu $2,$2,$3
+ .end f3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-1b.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1b.s
new file mode 100644
index 0000000..5739fef
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-1b.s
@@ -0,0 +1,9 @@
+ .abicalls
+ .option pic0
+ .global __start
+ .ent __start
+__start:
+ jal f1
+ jal f2
+ jal f3
+ .end __start
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d b/ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d
new file mode 100644
index 0000000..da28cc3
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d
@@ -0,0 +1,23 @@
+#source: pic-and-nonpic-2a.s
+#source: pic-and-nonpic-2b.s
+#as: -32 -EB
+#ld: -melf32btsmip -Tpic-and-nonpic-1.ld
+#objdump: -dr
+
+.*
+
+Disassembly of section \.text:
+
+00041000 <__start>:
+ 41000: 0c010406 jal 41018 <\.pic\.foo@@V2>
+ 41004: 00000000 nop
+ \.\.\.
+
+00041018 <\.pic\.foo@@V2>:
+ 41018: 3c190004 lui t9,0x4
+ 4101c: 27391020 addiu t9,t9,4128
+
+00041020 <foo2>:
+ 41020: 03e00008 jr ra
+ 41024: 00000000 nop
+ \.\.\.
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-2a.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-2a.s
new file mode 100644
index 0000000..45a490f
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-2a.s
@@ -0,0 +1,7 @@
+ .abicalls
+ .option pic0
+ .global __start
+ .ent __start
+__start:
+ jal foo
+ .end __start
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-2b.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-2b.s
new file mode 100644
index 0000000..4770b22
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-2b.s
@@ -0,0 +1,6 @@
+ .abicalls
+ .symver foo2,foo@@V2
+ .global foo2
+ .ent foo2
+foo2: jr $31
+ .end foo2
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3-error.d b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3-error.d
new file mode 100644
index 0000000..975ffa7
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3-error.d
@@ -0,0 +1,5 @@
+#name: PIC and non-PIC test 3 (error)
+#source: pic-and-nonpic-3b.s
+#as: -EB -32 -mips2
+#ld: tmpdir/pic-and-nonpic-3a.so -melf32btsmip -znocopyreloc
+#error: .*: non-dynamic relocations refer to dynamic symbol foo
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.dd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.dd
new file mode 100644
index 0000000..320e4ca
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.dd
@@ -0,0 +1,39 @@
+# GOT layout:
+#
+# -32752: lazy resolution function
+# -32748: reserved for module pointer
+# -32744: the GOT page entry
+# -32740: foo's GOT entry
+# -32736: ext's GOT entry
+
+.*
+
+Disassembly of section \.text:
+
+00000800 <foo>:
+ 800: 3c1c0001 lui gp,0x1
+ 804: 279c7bf0 addiu gp,gp,31728
+ 808: 0399e021 addu gp,gp,t9
+ 80c: 8f99801c lw t9,-32740\(gp\)
+ 810: 8f828018 lw v0,-32744\(gp\)
+ 814: 03200008 jr t9
+ 818: 24420000 addiu v0,v0,0
+
+0000081c <bar>:
+ 81c: f000 6a01 li v0,1
+ 820: f3cf 0a10 la v0,83f0 .*
+ 824: f400 3240 sll v0,16
+ 828: e269 addu v0,v1
+ 82a: f030 9a60 lw v1,-32736\(v0\)
+ 82e: 659a move gp,v0
+ 830: eb00 jr v1
+ 832: 653b move t9,v1
+#...
+Disassembly of section \.MIPS\.stubs:
+
+00000c00 <.MIPS.stubs>:
+ c00: 8f998010 lw t9,-32752\(gp\)
+ c04: 03e07821 move t7,ra
+ c08: 0320f809 jalr t9
+ c0c: 24180007 li t8,7
+ \.\.\.
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.gd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.gd
new file mode 100644
index 0000000..aa9579b
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.gd
@@ -0,0 +1,18 @@
+
+Primary GOT:
+ Canonical gp value: 000183f0
+
+ Reserved entries:
+ Address Access Initial Purpose
+ 00010400 -32752\(gp\) 00000000 Lazy resolver
+ 00010404 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
+
+ Local entries:
+ Address Access Initial
+ 00010408 -32744\(gp\) 00010000
+
+ Global entries:
+ Address Access Initial Sym\.Val\. Type Ndx Name
+ 0001040c -32740\(gp\) 00000800 00000800 FUNC 6 foo
+ 00010410 -32736\(gp\) 00000c00 00000c00 FUNC UND ext
+
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.ld b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.ld
new file mode 100644
index 0000000..cc4bd55
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.ld
@@ -0,0 +1,23 @@
+SECTIONS
+{
+ . = 0;
+ .reginfo : { *(.reginfo) }
+
+ . = ALIGN (0x400);
+ .dynamic : { *(.dynamic) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = ALIGN (0x400);
+ .text : { *(.text) }
+
+ . = ALIGN (0x400);
+ .MIPS.stubs : { *(.MIPS.stubs) }
+
+ . = ALIGN (0x10000);
+ .data : { *(.data) }
+
+ . = ALIGN (0x400);
+ _gp = . + 0x7ff0;
+ .got : { *(.got) }
+}
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.s
new file mode 100644
index 0000000..385e7fd
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.s
@@ -0,0 +1,29 @@
+ .abicalls
+ .set noreorder
+ .set nomips16
+ .global foo
+ .ent foo
+foo:
+ .cpload $25
+ lw $25,%call16(foo)($28)
+ lw $2,%got(data)($28)
+ jr $25
+ addiu $2,$2,%lo(data)
+ .end foo
+
+ .set mips16
+ .global bar
+ .ent bar
+bar:
+ li $2,%hi(_gp_disp)
+ addiu $2,$pc,%lo(_gp_disp)
+ sll $2,16
+ addu $2,$2,$3
+ lw $3,%call16(ext)($2)
+ move $28,$2
+ jr $3
+ move $25,$3
+ .end bar
+
+ .data
+data: .word 0x12345678
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd
new file mode 100644
index 0000000..58b50c3
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd
@@ -0,0 +1,20 @@
+
+Elf file type is DYN \(Shared object file\)
+Entry point .*
+There are 5 program headers, starting at offset .*
+
+Program Headers:
+ * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
+ * REGINFO * [^ ]+ * 0x0+00000 * 0x0+00000 [^ ]+ * [^ ]+ * R * 0x.*
+ * LOAD * [^ ]+ * 0x0+00000 * 0x0+00000 [^ ]+ * [^ ]+ * R E * 0x.*
+ * LOAD * [^ ]+ * 0x0+10000 * 0x0+10000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * DYNAMIC * [^ ]+ * 0x0+00400 * 0x0+00400 .*
+ * NULL * .*
+
+ *Section to Segment mapping:
+ *Segment Sections\.\.\.
+ *0*0 * \.reginfo *
+ *0*1 * \.reginfo \.dynamic \.dynsym \.dynstr \.hash \.text \.MIPS.stubs *
+ *0*2 * \.data \.got *
+ *0*3 * \.dynamic *
+ *0*4 *
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ad b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ad
new file mode 100644
index 0000000..fdcc0b1
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ad
@@ -0,0 +1,27 @@
+
+Dynamic section at offset .* contains .*:
+ * Tag * Type * Name/Value
+ 0x00000001 \(NEEDED\) .*
+ 0x00000004 \(HASH\) .*
+ 0x00000005 \(STRTAB\) .*
+ 0x00000006 \(SYMTAB\) .*
+ 0x0000000a \(STRSZ\) .*
+ 0x0000000b \(SYMENT\) .*
+ 0x70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x00000015 \(DEBUG\) * 0x0
+ 0x00000003 \(PLTGOT\) * 0xa0000
+ 0x70000001 \(MIPS_RLD_VERSION\) * 1
+ 0x70000005 \(MIPS_FLAGS\) * NOTPOT
+ 0x70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
+# This must be the number of GOT entries - 1, the last entry being for "bar".
+ 0x7000000a \(MIPS_LOCAL_GOTNO\) * 3
+# This must be MIPS_GOTSYM + 1.
+ 0x70000011 \(MIPS_SYMTABNO\) * 8
+ 0x70000012 \(MIPS_UNREFEXTNO\) .*
+# This must be the index of "bar".
+ 0x70000013 \(MIPS_GOTSYM\) * 0x7
+ 0x00000014 \(PLTREL\) * REL
+ 0x00000017 \(JMPREL\) * 0x43000
+ 0x00000002 \(PLTRELSZ\) * 8 \(bytes\)
+ 0x70000032 \(MIPS_PLTGOT\) * 0x81000
+ 0x00000000 \(NULL\) * 0x0
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.dd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.dd
new file mode 100644
index 0000000..b0dfafc
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.dd
@@ -0,0 +1,53 @@
+# GOT layout:
+#
+# -32752: lazy resolution function
+# -32748: reserved for module pointer
+# -32744: GOT page entry.
+# -32740: bar's GOT entry
+
+.*
+
+Disassembly of section \.plt:
+
+00043020 <.*>:
+.*: 3c1c0008 lui gp,0x8
+.*: 8f991000 lw t9,4096\(gp\)
+.*: 279c1000 addiu gp,gp,4096
+.*: 031cc023 subu t8,t8,gp
+.*: 03e07821 move t7,ra
+.*: 0018c082 srl t8,t8,0x2
+.*: 0320f809 jalr t9
+.*: 2718fffe addiu t8,t8,-2
+
+00043040 <foo@plt>:
+.*: 3c0f0008 lui t7,0x8
+.*: 8df91008 lw t9,4104\(t7\)
+.*: 25f81008 addiu t8,t7,4104
+.*: 03200008 jr t9
+.*: 00000000 nop
+
+Disassembly of section \.text:
+
+00044000 <__start>:
+.*: 0c010c10 jal 43040 <foo@plt>
+.*: 00000000 nop
+.*: 08011004 j 44010 <ext>
+.*: 00000000 nop
+
+00044010 <ext>:
+.*: 3c1c000a lui gp,0xa
+.*: 279c7ff0 addiu gp,gp,32752
+.*: 8f828018 lw v0,-32744\(gp\)
+.*: 24421000 addiu v0,v0,4096
+.*: 8f99801c lw t9,-32740\(gp\)
+.*: 03200008 jr t9
+.*: 00000000 nop
+.*: 00000000 nop
+Disassembly of section .MIPS.stubs:
+
+00044030 <\.MIPS\.stubs>:
+.*: 8f998010 lw t9,-32752\(gp\)
+.*: 03e07821 move t7,ra
+.*: 0320f809 jalr t9
+.*: 24180007 li t8,7
+ \.\.\.
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.gd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.gd
new file mode 100644
index 0000000..6d3d677
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.gd
@@ -0,0 +1,28 @@
+
+Primary GOT:
+ Canonical gp value: 000a7ff0
+
+ Reserved entries:
+ Address Access Initial Purpose
+ 000a0000 -32752\(gp\) 00000000 Lazy resolver
+ 000a0004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
+
+ Local entries:
+ Address Access Initial
+ 000a0008 -32744\(gp\) 000a0000
+
+ Global entries:
+ Address Access Initial Sym\.Val\. Type Ndx Name
+ 000a000c -32740\(gp\) 00044030 00044030 FUNC UND bar
+
+
+PLT GOT:
+
+ Reserved entries:
+ Address Initial Purpose
+ 00081000 00000000 PLT lazy resolver
+ 00081004 00000000 Module pointer
+
+ Entries:
+ Address Initial Sym.Val. Type Ndx Name
+ 00081008 00043020 00000000 FUNC UND foo
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ld b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ld
new file mode 100644
index 0000000..d41c8f9
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ld
@@ -0,0 +1,35 @@
+SECTIONS
+{
+ . = 0x40000 + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+
+ . = 0x41000;
+ .reginfo : { *(.reginfo) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = 0x42000;
+ .dynamic : { *(.dynamic) }
+
+ . = 0x43000;
+ .rel.plt : { *(.rel.plt) }
+ .plt : { *(.plt) }
+
+ . = 0x44000;
+ .text : { *(.text) }
+ .MIPS.stubs : { *(.MIPS.stubs) }
+
+ . = 0x80000;
+ .rld_map : { *(.rld_map) }
+
+ . = 0x81000;
+ .got.plt : { *(.got.plt) }
+
+ . = 0xa0000;
+ _gp = . + 0x7ff0;
+ .got : { *(.got) }
+
+ . = 0xa1000;
+ .data : { *(.data) }
+}
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.nd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.nd
new file mode 100644
index 0000000..f115be5
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.nd
@@ -0,0 +1,9 @@
+
+Symbol table '\.dynsym' contains .*:
+#...
+.*: 00000000 * 0 * FUNC * GLOBAL * DEFAULT * UND * foo
+# The index on the next line should correspond to MIPS_GOTSYM.
+#...
+ *7: 00044030 * 0 * FUNC * GLOBAL * DEFAULT * UND * bar
+
+#pass
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.pd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.pd
new file mode 100644
index 0000000..00f8713
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.pd
@@ -0,0 +1,5 @@
+
+.*
+
+Contents of section \.got\.plt:
+ 81000 00000000 00000000 00043020 .*
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.rd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.rd
new file mode 100644
index 0000000..d3418db
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.rd
@@ -0,0 +1,4 @@
+
+Relocation section '\.rel\.plt' at offset .* contains .*:
+ * Offset * Info * Type * Sym\.Value * Sym\. Name
+00081008 * 0000057f * R_MIPS_JUMP_SLOT * 00000000 * foo
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.s
new file mode 100644
index 0000000..571c774
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.s
@@ -0,0 +1,22 @@
+ .abicalls
+ .option pic0
+ .global __start
+ .ent __start
+__start:
+ jal foo
+ j ext
+ .end __start
+
+ .global ext
+ .ent ext
+ext:
+ lui $gp,%hi(__gnu_local_gp)
+ addiu $gp,$gp,%lo(__gnu_local_gp)
+ lw $2,%got(local)($gp)
+ addiu $2,$2,%lo(local)
+ lw $25,%call16(bar)($gp)
+ jr $25
+ .end ext
+
+ .data
+local: .word 1
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd
new file mode 100644
index 0000000..c73ac59
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd
@@ -0,0 +1,27 @@
+
+Elf file type is EXEC \(Executable file\)
+Entry point 0x44000
+There are 8 program headers, starting at offset .*
+
+Program Headers:
+ * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
+ * PHDR * .*
+ * INTERP * .*
+.*
+ * REGINFO * [^ ]+ * 0x0+41000 * 0x0+41000 * [^ ]+ * [^ ]+ * R * 0x.*
+ * LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
+ * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
+ * NULL * .*
+
+ *Section to Segment mapping:
+ *Segment Sections\.\.\.
+ *0*0 *
+ *0*1 *\.interp *
+ *0*2 *\.reginfo *
+ *0*3 *\.interp \.reginfo \.hash \.dynsym \.dynstr \.dynamic \.rel\.plt \.plt \.text \.MIPS.stubs *
+ *0*4 *\.rld_map \.got\.plt *
+ *0*5 *\.got \.data *
+ *0*6 *\.dynamic *
+ *0*7 *
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-4-error.d b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4-error.d
new file mode 100644
index 0000000..7bc0c25
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4-error.d
@@ -0,0 +1,5 @@
+#name: PIC and non-PIC test 4 (error)
+#source: pic-and-nonpic-4b.s
+#as: -EB -32 -mips2
+#ld: tmpdir/pic-and-nonpic-4a.so -melf32btsmip -znocopyreloc
+#error: .*: non-dynamic relocations refer to dynamic symbol obj1
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-4a.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4a.s
new file mode 100644
index 0000000..54b285a
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4a.s
@@ -0,0 +1,22 @@
+ .abicalls
+ .option pic0
+ .global obj1
+ .global obj2
+ .global obj3
+
+ .type obj1,%object
+ .type obj2,%object
+ .type obj3,%object
+
+ .size obj1,8
+ .size obj2,4
+ .size obj3,16
+
+ .data
+obj1:
+ .word 1, 2
+obj2:
+ .word 3
+obj3:
+ .word 5, 6, 7, 8
+
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ad b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ad
new file mode 100644
index 0000000..ad300b4
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ad
@@ -0,0 +1,26 @@
+
+Dynamic section at offset .* contains .*:
+ * Tag * Type * Name/Value
+ 0x00000001 \(NEEDED\) .*
+ 0x00000004 \(HASH\) .*
+ 0x00000005 \(STRTAB\) .*
+ 0x00000006 \(SYMTAB\) .*
+ 0x0000000a \(STRSZ\) .*
+ 0x0000000b \(SYMENT\) .*
+ 0x70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x00000015 \(DEBUG\) * 0x0
+ 0x00000003 \(PLTGOT\) * 0xa0000
+ 0x00000011 \(REL\) * 0x43000
+ 0x00000012 \(RELSZ\) * 32 \(bytes\)
+ 0x00000013 \(RELENT\) * 8 \(bytes\)
+ 0x70000001 \(MIPS_RLD_VERSION\) * 1
+ 0x70000005 \(MIPS_FLAGS\) * NOTPOT
+ 0x70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
+# This must be the number of GOT entries - 1, the last entry being for "obj3".
+ 0x7000000a \(MIPS_LOCAL_GOTNO\) * 2
+# This must be MIPS_GOTSYM + 1.
+ 0x70000011 \(MIPS_SYMTABNO\) * 8
+ 0x70000012 \(MIPS_UNREFEXTNO\) .*
+# This must be the index of "obj3".
+ 0x70000013 \(MIPS_GOTSYM\) * 0x7
+ 0x00000000 \(NULL\) * 0x0
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.dd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.dd
new file mode 100644
index 0000000..d276098
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.dd
@@ -0,0 +1,10 @@
+
+.*
+
+Disassembly of section \.text:
+
+00044000 <__start>:
+ 44000: 3c02000a lui v0,0xa
+ 44004: 24422000 addiu v0,v0,8192
+ 44008: 000a2008 .*
+ 4400c: 00000000 nop
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.gd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.gd
new file mode 100644
index 0000000..0a8a77d
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.gd
@@ -0,0 +1,7 @@
+
+.*
+
+Contents of section \.got:
+ a0000 00000000 80000000 00000000 .*
+Contents of section \.data:
+ a1000 000a2008 00000000 00000000 00000000 .*
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ld b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ld
new file mode 100644
index 0000000..bcf9e3a
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ld
@@ -0,0 +1,33 @@
+SECTIONS
+{
+ . = 0x40000 + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+
+ . = 0x41000;
+ .reginfo : { *(.reginfo) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = 0x42000;
+ .dynamic : { *(.dynamic) }
+
+ . = 0x43000;
+ .rel.dyn : { *(.rel.dyn) }
+
+ . = 0x44000;
+ .text : { *(.text) }
+
+ . = 0x80000;
+ .rld_map : { *(.rld_map) }
+
+ . = 0xa0000;
+ _gp = . + 0x7ff0;
+ .got : { *(.got) }
+
+ . = 0xa1000;
+ .data : { *(.data) }
+
+ . = 0xa2000;
+ .bss : { *(.dynbss) }
+}
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.nd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.nd
new file mode 100644
index 0000000..d63426c
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.nd
@@ -0,0 +1,12 @@
+
+Symbol table '\.dynsym' contains .*:
+# The order of the next two symbols is not important.
+#...
+.*: 000a2000 * 8 * OBJECT * GLOBAL * DEFAULT * [0-9]+ * obj1
+#...
+.*: 000a2008 * 4 * OBJECT * GLOBAL * DEFAULT * [0-9]+ * obj2
+# The index on the next line should correspond to MIPS_GOTSYM.
+#...
+ *7: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * obj3
+
+#pass
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.rd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.rd
new file mode 100644
index 0000000..452d9c7
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.rd
@@ -0,0 +1,7 @@
+
+Relocation section '\.rel\.dyn' at offset .* contains .*:
+ * Offset * Info * Type * Sym\.Value * Sym\. Name
+00000000 * 00000000 * R_MIPS_NONE *
+000a2000 * 0000017e * R_MIPS_COPY * 000a2000 * obj1
+000a2008 * 0000047e * R_MIPS_COPY * 000a2008 * obj2
+000a1004 * 00000703 * R_MIPS_REL32 * 00000000 * obj3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.s
new file mode 100644
index 0000000..7e25bf4
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.s
@@ -0,0 +1,13 @@
+ .abicalls
+ .option pic0
+ .global __start
+ .ent __start
+__start:
+ lui $2,%hi(obj1)
+ addiu $2,$2,%lo(obj1)
+ .end __start
+ .word obj2
+
+ .data
+ .word obj2
+ .word obj3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd
new file mode 100644
index 0000000..14b13ed
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd
@@ -0,0 +1,27 @@
+
+Elf file type is EXEC \(Executable file\)
+Entry point 0x44000
+There are 8 program headers, starting at offset .*
+
+Program Headers:
+ * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
+ * PHDR * .*
+ * INTERP * .*
+.*
+ * REGINFO * [^ ]+ * 0x0+41000 * 0x0+41000 * [^ ]+ * [^ ]+ * R * 0x.*
+ * LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
+ * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
+ * NULL * .*
+
+ *Section to Segment mapping:
+ *Segment Sections\.\.\.
+ *0*0 *
+ *0*1 * \.interp *
+ *0*2 * \.reginfo *
+ *0*3 * \.interp \.reginfo \.hash \.dynsym \.dynstr \.dynamic \.rel\.dyn \.text *
+ *0*4 * \.rld_map *
+ *0*5 * \.got \.data \.bss *
+ *0*6 * \.dynamic *
+ *0*7 *
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-5a.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5a.s
new file mode 100644
index 0000000..7452f5e
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5a.s
@@ -0,0 +1,16 @@
+ .abicalls
+ .option pic0
+ .global __start
+ .ent __start
+__start:
+ lui $2,%hi(foo)
+ addiu $2,$2,%lo(foo)
+ lui $2,%hi(obj1)
+ addiu $2,$2,%lo(obj1)
+ .end __start
+
+ .data
+ .word foo
+ .word bar
+ .word obj1
+ .word obj2
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ad b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ad
new file mode 100644
index 0000000..e448ec2
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ad
@@ -0,0 +1,32 @@
+
+Dynamic section at offset .* contains .*:
+ * Tag * Type * Name/Value
+ 0x00000001 \(NEEDED\) .*
+ 0x00000001 \(NEEDED\) .*
+ 0x00000004 \(HASH\) .*
+ 0x00000005 \(STRTAB\) .*
+ 0x00000006 \(SYMTAB\) .*
+ 0x0000000a \(STRSZ\) .*
+ 0x0000000b \(SYMENT\) .*
+ 0x70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x00000015 \(DEBUG\) * 0x0
+ 0x00000016 \(TEXTREL\) * 0x0
+ 0x00000003 \(PLTGOT\) * 0xa0000
+ 0x00000011 \(REL\) * 0x43000
+ 0x00000012 \(RELSZ\) * 48 \(bytes\)
+ 0x00000013 \(RELENT\) * 8 \(bytes\)
+ 0x70000001 \(MIPS_RLD_VERSION\) * 1
+ 0x70000005 \(MIPS_FLAGS\) * NOTPOT
+ 0x70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
+# This must be the number of GOT entries - 2. The last two entries are
+# for "bar" and "obj2".
+ 0x7000000a \(MIPS_LOCAL_GOTNO\) * 2
+# This must be MIPS_GOTSYM + 2.
+ 0x70000011 \(MIPS_SYMTABNO\) * 10
+ 0x70000012 \(MIPS_UNREFEXTNO\) * .*
+ 0x70000013 \(MIPS_GOTSYM\) * 0x8
+ 0x00000014 \(PLTREL\) * REL
+ 0x00000017 \(JMPREL\) * 0x43030
+ 0x00000002 \(PLTRELSZ\) * 8 \(bytes\)
+ 0x70000032 \(MIPS_PLTGOT\) * 0x81000
+ 0x00000000 \(NULL\) * 0x0
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.dd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.dd
new file mode 100644
index 0000000..ff18883
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.dd
@@ -0,0 +1,35 @@
+
+.*
+
+Disassembly of section \.plt:
+
+00043040 <.*>:
+.*: 3c1c0008 lui gp,0x8
+.*: 8f991000 lw t9,4096\(gp\)
+.*: 279c1000 addiu gp,gp,4096
+.*: 031cc023 subu t8,t8,gp
+.*: 03e07821 move t7,ra
+.*: 0018c082 srl t8,t8,0x2
+.*: 0320f809 jalr t9
+.*: 2718fffe addiu t8,t8,-2
+
+00043060 <foo@plt>:
+.*: 3c0f0008 lui t7,0x8
+.*: 8df91008 lw t9,4104\(t7\)
+.*: 25f81008 addiu t8,t7,4104
+.*: 03200008 jr t9
+.*: 00000000 nop
+
+Disassembly of section .text:
+
+00044000 <__start>:
+ 44000: 3c020004 lui v0,0x4
+ 44004: 24423060 addiu v0,v0,12384
+ 44008: 3c02000a lui v0,0xa
+ 4400c: 24422000 addiu v0,v0,8192
+
+00044010 <ext>:
+ 44010: 00043060 .*
+ 44014: 00000000 .*
+ 44018: 000a2000 .*
+ 4401c: 00000000 .*
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.gd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.gd
new file mode 100644
index 0000000..6919a69
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.gd
@@ -0,0 +1,26 @@
+
+Primary GOT:
+ Canonical gp value: 000a7ff0
+
+ Reserved entries:
+ Address Access Initial Purpose
+ 000a0000 -32752\(gp\) 00000000 Lazy resolver
+ 000a0004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
+
+# There must be GOT entries for the R_MIPS_REL32 relocation symbols.
+ Global entries:
+ Address Access Initial Sym\.Val\. Type Ndx Name
+ 000a0008 -32744\(gp\) 00000000 00000000 OBJECT UND obj2
+ 000a000c -32740\(gp\) 00000000 00000000 FUNC UND bar
+
+
+PLT GOT:
+
+ Reserved entries:
+ Address Initial Purpose
+ 00081000 00000000 PLT lazy resolver
+ 00081004 00000000 Module pointer
+
+ Entries:
+ Address Initial Sym.Val. Type Ndx Name
+ 00081008 00043040 00043060 FUNC UND foo
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ld b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ld
new file mode 100644
index 0000000..6cb7530
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ld
@@ -0,0 +1,38 @@
+SECTIONS
+{
+ . = 0x40000 + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+
+ . = 0x41000;
+ .reginfo : { *(.reginfo) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = 0x42000;
+ .dynamic : { *(.dynamic) }
+
+ . = 0x43000;
+ .rel.dyn : { *(.rel.dyn) }
+ .rel.plt : { *(.rel.plt) }
+ .plt : { *(.plt) }
+
+ . = 0x44000;
+ .text : { *(.text) }
+
+ . = 0x80000;
+ .rld_map : { *(.rld_map) }
+
+ . = 0x81000;
+ .got.plt : { *(.got.plt) }
+
+ . = 0xa0000;
+ _gp = . + 0x7ff0;
+ .got : { *(.got) }
+
+ . = 0xa1000;
+ .data : { *(.data) }
+
+ . = 0xa2000;
+ .bss : { *(.dynbss) }
+}
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.nd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.nd
new file mode 100644
index 0000000..5622f91
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.nd
@@ -0,0 +1,10 @@
+
+Symbol table '\.dynsym' contains .*:
+#...
+.*: 00043060 * 0 * FUNC * GLOBAL * DEFAULT * \[MIPS PLT\] * UND * foo
+# The index on the next line should correspond to MIPS_GOTSYM.
+#...
+ *8: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * obj2
+ *9: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * bar
+
+#pass
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.pd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.pd
new file mode 100644
index 0000000..73b2059
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.pd
@@ -0,0 +1,7 @@
+
+.*
+
+Contents of section \.got\.plt:
+ 81000 00000000 00000000 00043040 .*
+Contents of section \.data:
+ a1000 00043060 00000000 000a2000 00000000 .*
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.rd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.rd
new file mode 100644
index 0000000..21b2961
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.rd
@@ -0,0 +1,13 @@
+
+Relocation section '\.rel\.dyn' at offset .* contains .*:
+ * Offset * Info * Type * Sym\.Value * Sym\. Name
+00000000 * 00000000 * R_MIPS_NONE *
+000a2000 * [^ ]*7e * R_MIPS_COPY * 000a2000 * obj1
+0004401c * [^ ]*03 * R_MIPS_REL32 * 00000000 * obj2
+000a100c * [^ ]*03 * R_MIPS_REL32 * 00000000 * obj2
+00044014 * [^ ]*03 * R_MIPS_REL32 * 00000000 * bar
+000a1004 * [^ ]*03 * R_MIPS_REL32 * 00000000 * bar
+
+Relocation section '\.rel\.plt' at offset .* contains .*:
+ * Offset * Info * Type * Sym\.Value * Sym\. Name
+00081008 * [^ ]*7f * R_MIPS_JUMP_SLOT * 00043060 * foo
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.s
new file mode 100644
index 0000000..73b518f
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.s
@@ -0,0 +1,9 @@
+ .abicalls
+ .global ext
+ .ent ext
+ext:
+ .word foo
+ .word bar
+ .word obj1
+ .word obj2
+ .end ext
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd
new file mode 100644
index 0000000..b7d7e3a
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd
@@ -0,0 +1,27 @@
+
+Elf file type is EXEC \(Executable file\)
+Entry point 0x44000
+There are 8 program headers, starting at offset .*
+
+Program Headers:
+ * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
+ * PHDR * .*
+ * INTERP * .*
+.*
+ * REGINFO * [^ ]+ * 0x0+41000 * 0x0+41000 * [^ ]+ * [^ ]+ * R * 0x.*
+ * LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
+ * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
+ * NULL * .*
+
+ *Section to Segment mapping:
+ *Segment Sections\.\.\.
+ *0*0 *
+ *0*1 * \.interp *
+ *0*2 * \.reginfo *
+ *0*3 * \.interp \.reginfo \.hash \.dynsym \.dynstr \.dynamic \.rel\.dyn \.rel\.plt \.plt \.text *
+ *0*4 * \.rld_map \.got\.plt *
+ *0*5 * \.got \.data \.bss *
+ *0*6 * \.dynamic *
+ *0*7 *
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.ad b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.ad
new file mode 100644
index 0000000..4be2ac0
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.ad
@@ -0,0 +1,27 @@
+
+Dynamic section at offset .* contains .*:
+ * Tag * Type * Name/Value
+ 0x00000001 \(NEEDED\) .*
+ 0x00000004 \(HASH\) .*
+ 0x00000005 \(STRTAB\) .*
+ 0x00000006 \(SYMTAB\) .*
+ 0x0000000a \(STRSZ\) .*
+ 0x0000000b \(SYMENT\) .*
+ 0x70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x00000015 \(DEBUG\) * 0x0
+ 0x00000003 \(PLTGOT\) * 0xa0000
+ 0x00000011 \(REL\) * 0x43000
+ 0x00000012 \(RELSZ\) * 40 \(bytes\)
+ 0x00000013 \(RELENT\) * 8 \(bytes\)
+ 0x70000001 \(MIPS_RLD_VERSION\) * 1
+ 0x70000005 \(MIPS_FLAGS\) * NOTPOT
+ 0x70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
+ 0x7000000a \(MIPS_LOCAL_GOTNO\) * 2
+ 0x70000011 \(MIPS_SYMTABNO\) * 14
+ 0x70000012 \(MIPS_UNREFEXTNO\) * .*
+ 0x70000013 \(MIPS_GOTSYM\) * 0x7
+ 0x00000014 \(PLTREL\) * REL
+ 0x00000017 \(JMPREL\) * 0x43028
+ 0x00000002 \(PLTRELSZ\) * 24 \(bytes\)
+ 0x70000032 \(MIPS_PLTGOT\) * 0x81000
+ 0x00000000 \(NULL\) * 0x0
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.dd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.dd
new file mode 100644
index 0000000..068e5b3
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.dd
@@ -0,0 +1,102 @@
+# GOT layout:
+#
+# -32752: lazy resolution function
+# -32748: reserved for module pointer
+# -32744: extf2's GOT entry (undefined 0)
+# -32740: extf3's GOT entry (PLT entry)
+# -32736: extd2's GOT entry (copy reloc)
+# -32732: extf1's GOT entry (.MIPS.stubs entry)
+# -32728: extd1's GOT entry (undefined 0)
+# -32724: extf4's GOT entry (PLT entry)
+# -32620: extd4's GOT entry (undefined 0, reloc only)
+
+.*
+
+Disassembly of section \.plt:
+
+00043040 <.*>:
+.*: 3c0e0008 lui t2,0x8
+.*: 8dd91000 lw t9,4096\(t2\)
+.*: 25ce1000 addiu t2,t2,4096
+.*: 030ec023 subu t8,t8,t2
+.*: 03e07821 move t3,ra
+.*: 0018c082 srl t8,t8,0x2
+.*: 0320f809 jalr t9
+.*: 2718fffe addiu t8,t8,-2
+
+00043060 <extf4@plt>:
+.*: 3c0f0008 lui t3,0x8
+.*: 8df91008 lw t9,4104\(t3\)
+.*: 25f81008 addiu t8,t3,4104
+.*: 03200008 jr t9
+
+00043070 <extf5@plt>:
+.*: 3c0f0008 lui t3,0x8
+.*: 8df9100c lw t9,4108\(t3\)
+.*: 25f8100c addiu t8,t3,4108
+.*: 03200008 jr t9
+
+00043080 <extf3@plt>:
+.*: 3c0f0008 lui t3,0x8
+.*: 8df91010 lw t9,4112\(t3\)
+.*: 25f81010 addiu t8,t3,4112
+.*: 03200008 jr t9
+.*: 00000000 nop
+
+Disassembly of section \.text:
+
+00044000 <.*>:
+ \.\.\.
+
+00044008 <\.pic\.f1>:
+ 44008: 3c190004 lui t9,0x4
+ 4400c: 27394010 addiu t9,t9,16400
+
+00044010 <f1>:
+ 44010: 0c011013 jal 4404c <f3>
+ 44014: 3c020004 lui v0,0x4
+ 44018: 03e00008 jr ra
+ 4401c: 24424020 addiu v0,v0,16416
+
+00044020 <f2>:
+ 44020: 3c1c0006 lui gp,0x6
+ 44024: 0399e021 addu gp,gp,t9
+ 44028: 279c3fd0 addiu gp,gp,16336
+ 4402c: 8f998024 lw t9,-32732\(gp\)
+ 44030: 8f848018 lw a0,-32744\(gp\)
+ 44034: 8f858028 lw a1,-32728\(gp\)
+ 44038: 0320f809 jalr t9
+ 4403c: 8f868020 lw a2,-32736\(gp\)
+ 44040: 8f99801c lw t9,-32740\(gp\)
+ 44044: 03200008 jr t9
+ 44048: 8f84802c lw a0,-32724\(gp\)
+
+0004404c <f3>:
+ 4404c: 03e00008 jr ra
+ 44050: 00000000 nop
+ \.\.\.
+
+00044060 <__start>:
+ 44060: 0c011002 jal 44008 <\.pic\.f1>
+ 44064: 00000000 nop
+ 44068: 3c020004 lui v0,0x4
+ 4406c: 24424020 addiu v0,v0,16416
+ 44070: 0c010c20 jal 43080 <extf3@plt>
+ 44074: 00000000 nop
+ 44078: 0c010c18 jal 43060 <extf4@plt>
+ 4407c: 00000000 nop
+ 44080: 0c010c1c jal 43070 <extf5@plt>
+ 44084: 00000000 nop
+ 44088: 3c02000a lui v0,0xa
+ 4408c: 24422000 addiu v0,v0,8192
+ 44090: 3c02000a lui v0,0xa
+ 44094: 24422018 addiu v0,v0,8216
+ \.\.\.
+Disassembly of section \.MIPS\.stubs:
+
+000440a0 <\.MIPS\.stubs>:
+ 440a0: 8f998010 lw t9,-32752\(gp\)
+ 440a4: 03e07821 move t3,ra
+ 440a8: 0320f809 jalr t9
+ 440ac: 2418000a li t8,10
+ \.\.\.
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.gd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.gd
new file mode 100644
index 0000000..8b6b5a0
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.gd
@@ -0,0 +1,32 @@
+
+Primary GOT:
+ Canonical gp value: 000a7ff0
+
+ Reserved entries:
+ Address Access Initial Purpose
+ 000a0000 -32752\(gp\) 00000000 Lazy resolver
+ 000a0004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
+
+ Global entries:
+ Address Access Initial Sym\.Val\. Type Ndx Name
+ 000a0008 -32744\(gp\) 00000000 00000000 FUNC UND extf2
+ 000a000c -32740\(gp\) 00000000 00000000 FUNC UND extf3
+ 000a0010 -32736\(gp\) 000a2000 000a2000 OBJECT 16 extd2
+ 000a0014 -32732\(gp\) 000440a0 000440a0 FUNC UND extf1
+ 000a0018 -32728\(gp\) 00000000 00000000 OBJECT UND extd1
+ 000a001c -32724\(gp\) 00000000 00000000 FUNC UND extf4
+ 000a0020 -32720\(gp\) 00000000 00000000 OBJECT UND extd4
+
+
+PLT GOT:
+
+ Reserved entries:
+ Address Initial Purpose
+ 00081000 00000000 PLT lazy resolver
+ 00081004 00000000 Module pointer
+
+ Entries:
+ Address Initial Sym.Val. Type Ndx Name
+ 00081008 00043040 00000000 FUNC UND extf4
+ 0008100c 00043040 00000000 FUNC UND extf5
+ 00081010 00043040 00000000 FUNC UND extf3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.nd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.nd
new file mode 100644
index 0000000..8b0d0a6
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.nd
@@ -0,0 +1,17 @@
+
+Symbol table '\.dynsym' contains .*:
+#...
+.*: 00000000 * 0 * FUNC * GLOBAL * DEFAULT * UND * extf5
+# The index on the next line should correspond to MIPS_GOTSYM,
+# and the remaining symbols should have the same order as the
+# GOT layout given in the *.dd dump.
+#...
+ *7: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf2
+ *8: 0+ * 0 * * FUNC * GLOBAL * DEFAULT * UND * extf3
+ *9: 0+a2000 * 24 * OBJECT * GLOBAL * DEFAULT * [0-9]+ * extd2
+ *10: 0+440a0 * 0 * FUNC * GLOBAL * DEFAULT * UND * extf1
+ *11: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd1
+ *12: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf4
+ *13: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd4
+
+#pass
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.pd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.pd
new file mode 100644
index 0000000..5f5de62
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.pd
@@ -0,0 +1,6 @@
+
+.*
+
+Contents of section \.got\.plt:
+ 81000 00000000 00000000 00043040 00043040 .*
+ 81010 00043040 .*
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.rd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.rd
new file mode 100644
index 0000000..0fd5b7e
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.rd
@@ -0,0 +1,14 @@
+
+Relocation section '\.rel\.dyn' at offset .* contains .*:
+ * Offset * Info * Type * Sym\.Value * Sym\. Name
+00000000 * 00000000 * R_MIPS_NONE *
+000a2018 * [^ ]*7e * R_MIPS_COPY * 000a2018 * extd3
+000a2000 * [^ ]*7e * R_MIPS_COPY * 000a2000 * extd2
+000a1000 * [^ ]*03 * R_MIPS_REL32 * 00000000 * extd1
+000a1014 * [^ ]*03 * R_MIPS_REL32 * 00000000 * extd4
+
+Relocation section '\.rel\.plt' at offset .* contains .*:
+ * Offset * Info * Type * Sym\.Value * Sym\. Name
+00081008 * [^ ]*7f * R_MIPS_JUMP_SLOT * 00000000 * extf4
+0008100c * [^ ]*7f * R_MIPS_JUMP_SLOT * 00000000 * extf5
+00081010 * [^ ]*7f * R_MIPS_JUMP_SLOT * 00000000 * extf3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd
new file mode 100644
index 0000000..b5d51b3
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd
@@ -0,0 +1,27 @@
+
+Elf file type is EXEC \(Executable file\)
+Entry point 0x44000
+There are 8 program headers, starting at offset .*
+
+Program Headers:
+ * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
+ * PHDR * .*
+ * INTERP * .*
+.*
+ * REGINFO * [^ ]+ * 0x0+41000 * 0x0+41000 * [^ ]+ * [^ ]+ * R * 0x.*
+ * LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
+ * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
+ * NULL * .*
+
+ *Section to Segment mapping:
+ *Segment Sections\.\.\.
+ *0*0 *
+ *0*1 * \.interp *
+ *0*2 * \.reginfo *
+ *0*3 * \.interp \.reginfo \.hash \.dynsym \.dynstr \.dynamic \.rel\.dyn \.rel\.plt \.plt \.text \.MIPS\.stubs *
+ *0*4 * \.rld_map \.got\.plt *
+ *0*5 * \.got \.data \.bss *
+ *0*6 * \.dynamic *
+ *0*7 *
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32a.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32a.s
new file mode 100644
index 0000000..a4c0075
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32a.s
@@ -0,0 +1,48 @@
+ .abicalls
+ .global extf1
+ .ent extf1
+extf1:
+ jr $31
+ .end extf1
+
+ .global extf2
+ .ent extf2
+extf2:
+ jr $31
+ .end extf2
+
+ .global extf3
+ .ent extf3
+extf3:
+ jr $31
+ .end extf3
+
+ .global extf4
+ .ent extf4
+extf4:
+ jr $31
+ .end extf4
+
+ .global extf5
+ .ent extf5
+extf5:
+ jr $31
+ .end extf5
+
+ .data
+ .global extd1
+ .global extd2
+ .global extd3
+ .global extd4
+ .type extd1,%object
+ .type extd2,%object
+ .type extd3,%object
+ .type extd4,%object
+ .size extd1,20
+ .size extd2,24
+ .size extd3,28
+ .size extd4,8
+extd1: .space 20
+extd2: .space 24
+extd3: .space 28
+extd4: .space 8
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32b.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32b.s
new file mode 100644
index 0000000..48cf97f
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32b.s
@@ -0,0 +1,39 @@
+ .set noreorder
+ .abicalls
+ .global f1
+ .ent f1
+f1:
+ .option pic0
+ jal f3
+ .option pic2
+ lui $2,%hi(f2)
+ jr $31
+ addiu $2,$2,%lo(f2)
+ .end f1
+
+ .global f2
+ .ent f2
+f2:
+ lui $28,%hi(%neg(%gp_rel(f2)))
+ addu $28,$28,$25
+ addiu $28,$28,%lo(%neg(%gp_rel(f2)))
+ lw $25,%call16(extf1)($28)
+ lw $4,%got_disp(extf2)($28)
+ lw $5,%got_disp(extd1)($28)
+ jalr $25
+ lw $6,%got_disp(extd2)($28)
+ lw $25,%call16(extf3)($28)
+ jr $25
+ lw $4,%got_disp(extf4)($28)
+ .end f2
+
+ .global f3
+ .ent f3
+f3:
+ jr $31
+ nop
+ .end f3
+
+ .data
+ .word extd1
+ .word extd3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s
new file mode 100644
index 0000000..578626a
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s
@@ -0,0 +1,25 @@
+ .abicalls
+ .option pic0
+ .set noreorder
+ .global __start
+ .ent __start
+__start:
+ jal f1
+ nop
+ lui $2,%hi(f2)
+ addiu $2,$2,%lo(f2)
+ jal extf3
+ nop
+ jal extf4
+ nop
+ jal extf5
+ nop
+ lui $2,%hi(extd2)
+ addiu $2,$2,%lo(extd2)
+ lui $2,%hi(extd3)
+ addiu $2,$2,%lo(extd3)
+ .end __start
+
+ .data
+ .word extd2
+ .word extd4
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.ad b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.ad
new file mode 100644
index 0000000..2ccb8b8
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.ad
@@ -0,0 +1,27 @@
+
+Dynamic section at offset .* contains .*:
+ * Tag * Type * Name/Value
+ 0x0+00000001 \(NEEDED\) .*
+ 0x0+00000004 \(HASH\) .*
+ 0x0+00000005 \(STRTAB\) .*
+ 0x0+00000006 \(SYMTAB\) .*
+ 0x0+0000000a \(STRSZ\) .*
+ 0x0+0000000b \(SYMENT\) .*
+ 0x0+70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x0+00000015 \(DEBUG\) * 0x0
+ 0x0+00000003 \(PLTGOT\) * 0xa0000
+ 0x0+00000011 \(REL\) * 0x43000
+ 0x0+00000012 \(RELSZ\) * 80 \(bytes\)
+ 0x0+00000013 \(RELENT\) * 16 \(bytes\)
+ 0x0+70000001 \(MIPS_RLD_VERSION\) * 1
+ 0x0+70000005 \(MIPS_FLAGS\) * NOTPOT
+ 0x0+70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
+ 0x0+7000000a \(MIPS_LOCAL_GOTNO\) * 2
+ 0x0+70000011 \(MIPS_SYMTABNO\) * 14
+ 0x0+70000012 \(MIPS_UNREFEXTNO\) * .*
+ 0x0+70000013 \(MIPS_GOTSYM\) * 0x7
+ 0x0+00000014 \(PLTREL\) * REL
+ 0x0+00000017 \(JMPREL\) * 0x43050
+ 0x0+00000002 \(PLTRELSZ\) * 48 \(bytes\)
+ 0x0+70000032 \(MIPS_PLTGOT\) * 0x81000
+ 0x0+00000000 \(NULL\) * 0x0
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd
new file mode 100644
index 0000000..c1a5681
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd
@@ -0,0 +1,102 @@
+# GOT layout:
+#
+# -32752: lazy resolution function
+# -32744: reserved for module pointer
+# -32736: extf2's GOT entry (undefined 0)
+# -32728: extf3's GOT entry (PLT entry)
+# -32720: extd2's GOT entry (copy reloc)
+# -32712: extf1's GOT entry (.MIPS.stubs entry)
+# -32704: extd1's GOT entry (undefined 0)
+# -32696: extf4's GOT entry (PLT entry)
+# -32688: extd4's GOT entry (undefined 0, reloc only)
+
+.*
+
+Disassembly of section \.plt:
+
+0+43080 <.*>:
+.*: 3c0e0008 lui t2,0x8
+.*: ddd91000 ld t9,4096\(t2\)
+.*: 25ce1000 addiu t2,t2,4096
+.*: 030ec023 subu t8,t8,t2
+.*: 03e07821 move t3,ra
+.*: 0018c0c2 srl t8,t8,0x3
+.*: 0320f809 jalr t9
+.*: 2718fffe addiu t8,t8,-2
+
+0+430a0 <extf4@plt>:
+.*: 3c0f0008 lui t3,0x8
+.*: ddf91010 ld t9,4112\(t3\)
+.*: 25f81010 addiu t8,t3,4112
+.*: 03200008 jr t9
+
+0+430b0 <extf5@plt>:
+.*: 3c0f0008 lui t3,0x8
+.*: ddf91018 ld t9,4120\(t3\)
+.*: 25f81018 addiu t8,t3,4120
+.*: 03200008 jr t9
+
+0+430c0 <extf3@plt>:
+.*: 3c0f0008 lui t3,0x8
+.*: ddf91020 ld t9,4128\(t3\)
+.*: 25f81020 addiu t8,t3,4128
+.*: 03200008 jr t9
+.*: 00000000 nop
+
+Disassembly of section \.text:
+
+0+44000 <.*>:
+ \.\.\.
+
+0+44008 <\.pic\.f1>:
+ 44008: 3c190004 lui t9,0x4
+ 4400c: 27394010 addiu t9,t9,16400
+
+0+44010 <f1>:
+ 44010: 0c011013 jal 4404c <f3>
+ 44014: 3c020004 lui v0,0x4
+ 44018: 03e00008 jr ra
+ 4401c: 24424020 addiu v0,v0,16416
+
+0+44020 <f2>:
+ 44020: 3c1c0006 lui gp,0x6
+ 44024: 0399e021 addu gp,gp,t9
+ 44028: 279c3fd0 addiu gp,gp,16336
+ 4402c: df998038 ld t9,-32712\(gp\)
+ 44030: df848020 ld a0,-32736\(gp\)
+ 44034: df858040 ld a1,-32704\(gp\)
+ 44038: 0320f809 jalr t9
+ 4403c: df868030 ld a2,-32720\(gp\)
+ 44040: df998028 ld t9,-32728\(gp\)
+ 44044: 03200008 jr t9
+ 44048: df848048 ld a0,-32696\(gp\)
+
+0+4404c <f3>:
+ 4404c: 03e00008 jr ra
+ 44050: 00000000 nop
+ \.\.\.
+
+0+44060 <__start>:
+ 44060: 0c011002 jal 44008 <\.pic\.f1>
+ 44064: 00000000 nop
+ 44068: 3c020004 lui v0,0x4
+ 4406c: 24424020 addiu v0,v0,16416
+ 44070: 0c010c30 jal 430c0 <extf3@plt>
+ 44074: 00000000 nop
+ 44078: 0c010c28 jal 430a0 <extf4@plt>
+ 4407c: 00000000 nop
+ 44080: 0c010c2c jal 430b0 <extf5@plt>
+ 44084: 00000000 nop
+ 44088: 3c02000a lui v0,0xa
+ 4408c: 24422000 addiu v0,v0,8192
+ 44090: 3c02000a lui v0,0xa
+ 44094: 24422018 addiu v0,v0,8216
+ \.\.\.
+Disassembly of section \.MIPS\.stubs:
+
+0+440a0 <\.MIPS\.stubs>:
+ 440a0: df998010 ld t9,-32752\(gp\)
+ 440a4: 03e0782d move t3,ra
+ 440a8: 0320f809 jalr t9
+ 440ac: 6418000a daddiu t8,zero,10
+ \.\.\.
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.gd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.gd
new file mode 100644
index 0000000..767d150
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.gd
@@ -0,0 +1,32 @@
+
+Primary GOT:
+ Canonical gp value: 00000000000a7ff0
+
+ Reserved entries:
+ Address Access Initial Purpose
+ 00000000000a0000 -32752\(gp\) 0000000000000000 Lazy resolver
+ 00000000000a0008 -32744\(gp\) 8000000000000000 Module pointer \(GNU extension\)
+
+ Global entries:
+ Address Access Initial Sym\.Val\. Type Ndx Name
+ 00000000000a0010 -32736\(gp\) 0000000000000000 0000000000000000 FUNC UND extf2
+ 00000000000a0018 -32728\(gp\) 0000000000000000 0000000000000000 FUNC UND extf3
+ 00000000000a0020 -32720\(gp\) 00000000000a2000 00000000000a2000 OBJECT 16 extd2
+ 00000000000a0028 -32712\(gp\) 00000000000440a0 00000000000440a0 FUNC UND extf1
+ 00000000000a0030 -32704\(gp\) 0000000000000000 0000000000000000 OBJECT UND extd1
+ 00000000000a0038 -32696\(gp\) 0000000000000000 0000000000000000 FUNC UND extf4
+ 00000000000a0040 -32688\(gp\) 0000000000000000 0000000000000000 OBJECT UND extd4
+
+
+PLT GOT:
+
+ Reserved entries:
+ Address Initial Purpose
+ 0000000000081000 0000000000000000 PLT lazy resolver
+ 0000000000081008 0000000000000000 Module pointer
+
+ Entries:
+ Address Initial Sym.Val. Type Ndx Name
+ 0000000000081010 0000000000043080 0000000000000000 FUNC UND extf4
+ 0000000000081018 0000000000043080 0000000000000000 FUNC UND extf5
+ 0000000000081020 0000000000043080 0000000000000000 FUNC UND extf3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.nd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.nd
new file mode 100644
index 0000000..8ee90e4
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.nd
@@ -0,0 +1,17 @@
+
+Symbol table '\.dynsym' contains .*:
+#...
+.*: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf5
+# The index on the next line should correspond to MIPS_GOTSYM,
+# and the remaining symbols should have the same order as the
+# GOT layout given in the *.dd dump.
+#...
+ *7: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf2
+ *8: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf3
+ *9: 0+a2000 * 24 * OBJECT * GLOBAL * DEFAULT * [0-9]+ * extd2
+ *10: 0+440a0 * 0 * FUNC * GLOBAL * DEFAULT * UND * extf1
+ *11: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd1
+ *12: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf4
+ *13: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd4
+
+#pass
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.pd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.pd
new file mode 100644
index 0000000..fed9d94
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.pd
@@ -0,0 +1,7 @@
+
+.*
+
+Contents of section \.got\.plt:
+ 81000 00000000 00000000 00000000 00000000 .*
+ 81010 00000000 00043080 00000000 00043080 .*
+ 81020 00000000 00043080 .*
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.rd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.rd
new file mode 100644
index 0000000..666785e
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.rd
@@ -0,0 +1,30 @@
+
+Relocation section '\.rel\.dyn' at offset .* contains .*:
+ * Offset * Info * Type * Sym\. Value * Sym\. Name
+0+00000 * 0+ * R_MIPS_NONE *
+ *Type2: R_MIPS_NONE *
+ *Type3: R_MIPS_NONE *
+0+a2018 * [^ ]*7e * R_MIPS_COPY * 0+a2018 * extd3
+ *Type2: R_MIPS_NONE *
+ *Type3: R_MIPS_NONE *
+0+a2000 * [^ ]*7e * R_MIPS_COPY * 0+a2000 * extd2
+ *Type2: R_MIPS_NONE *
+ *Type3: R_MIPS_NONE *
+0+a1000 * [^ ]*03 * R_MIPS_REL32 * 0+00000 * extd1
+ *Type2: R_MIPS_64 *
+ *Type3: R_MIPS_NONE *
+0+a1014 * [^ ]*03 * R_MIPS_REL32 * 0+00000 * extd4
+ *Type2: R_MIPS_64 *
+ *Type3: R_MIPS_NONE *
+
+Relocation section '\.rel\.plt' at offset .* contains .*:
+ * Offset * Info * Type * Sym\. Value * Sym\. Name
+0+81010 * [^ ]*7f * R_MIPS_JUMP_SLOT * 0+00000 * extf4
+ *Type2: R_MIPS_NONE *
+ *Type3: R_MIPS_NONE *
+0+81018 * [^ ]*7f * R_MIPS_JUMP_SLOT * 0+00000 * extf5
+ *Type2: R_MIPS_NONE *
+ *Type3: R_MIPS_NONE *
+0+81020 * [^ ]*7f * R_MIPS_JUMP_SLOT * 0+00000 * extf3
+ *Type2: R_MIPS_NONE *
+ *Type3: R_MIPS_NONE *
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd
new file mode 100644
index 0000000..3842baa
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd
@@ -0,0 +1,25 @@
+
+Elf file type is EXEC \(Executable file\)
+Entry point 0x44000
+There are 7 program headers, starting at offset .*
+
+Program Headers:
+ * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
+ * PHDR * .*
+ * INTERP * .*
+.*
+ * LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
+ * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
+ * NULL * .*
+
+ *Section to Segment mapping:
+ *Segment Sections\.\.\.
+ *0*0 *
+ *0*1 * \.interp *
+ *0*2 * \.interp \.hash \.dynsym \.dynstr \.dynamic \.rel\.dyn \.rel\.plt \.plt \.text \.MIPS\.stubs \.MIPS\.options *
+ *0*3 * \.rld_map \.got\.plt *
+ *0*4 * \.got \.data \.bss *
+ *0*5 * \.dynamic *
+ *0*6 *
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64a.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64a.s
new file mode 100644
index 0000000..a4c0075
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64a.s
@@ -0,0 +1,48 @@
+ .abicalls
+ .global extf1
+ .ent extf1
+extf1:
+ jr $31
+ .end extf1
+
+ .global extf2
+ .ent extf2
+extf2:
+ jr $31
+ .end extf2
+
+ .global extf3
+ .ent extf3
+extf3:
+ jr $31
+ .end extf3
+
+ .global extf4
+ .ent extf4
+extf4:
+ jr $31
+ .end extf4
+
+ .global extf5
+ .ent extf5
+extf5:
+ jr $31
+ .end extf5
+
+ .data
+ .global extd1
+ .global extd2
+ .global extd3
+ .global extd4
+ .type extd1,%object
+ .type extd2,%object
+ .type extd3,%object
+ .type extd4,%object
+ .size extd1,20
+ .size extd2,24
+ .size extd3,28
+ .size extd4,8
+extd1: .space 20
+extd2: .space 24
+extd3: .space 28
+extd4: .space 8
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64b.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64b.s
new file mode 100644
index 0000000..7a7979c
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64b.s
@@ -0,0 +1,39 @@
+ .set noreorder
+ .abicalls
+ .global f1
+ .ent f1
+f1:
+ .option pic0
+ jal f3
+ .option pic2
+ lui $2,%hi(f2)
+ jr $31
+ addiu $2,$2,%lo(f2)
+ .end f1
+
+ .global f2
+ .ent f2
+f2:
+ lui $28,%hi(%neg(%gp_rel(f2)))
+ addu $28,$28,$25
+ addiu $28,$28,%lo(%neg(%gp_rel(f2)))
+ ld $25,%call16(extf1)($28)
+ ld $4,%got_disp(extf2)($28)
+ ld $5,%got_disp(extd1)($28)
+ jalr $25
+ ld $6,%got_disp(extd2)($28)
+ ld $25,%call16(extf3)($28)
+ jr $25
+ ld $4,%got_disp(extf4)($28)
+ .end f2
+
+ .global f3
+ .ent f3
+f3:
+ jr $31
+ nop
+ .end f3
+
+ .data
+ .word extd1
+ .word extd3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s
new file mode 100644
index 0000000..578626a
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s
@@ -0,0 +1,25 @@
+ .abicalls
+ .option pic0
+ .set noreorder
+ .global __start
+ .ent __start
+__start:
+ jal f1
+ nop
+ lui $2,%hi(f2)
+ addiu $2,$2,%lo(f2)
+ jal extf3
+ nop
+ jal extf4
+ nop
+ jal extf5
+ nop
+ lui $2,%hi(extd2)
+ addiu $2,$2,%lo(extd2)
+ lui $2,%hi(extd3)
+ addiu $2,$2,%lo(extd3)
+ .end __start
+
+ .data
+ .word extd2
+ .word extd4
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.ad b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.ad
new file mode 100644
index 0000000..4be2ac0
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.ad
@@ -0,0 +1,27 @@
+
+Dynamic section at offset .* contains .*:
+ * Tag * Type * Name/Value
+ 0x00000001 \(NEEDED\) .*
+ 0x00000004 \(HASH\) .*
+ 0x00000005 \(STRTAB\) .*
+ 0x00000006 \(SYMTAB\) .*
+ 0x0000000a \(STRSZ\) .*
+ 0x0000000b \(SYMENT\) .*
+ 0x70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x00000015 \(DEBUG\) * 0x0
+ 0x00000003 \(PLTGOT\) * 0xa0000
+ 0x00000011 \(REL\) * 0x43000
+ 0x00000012 \(RELSZ\) * 40 \(bytes\)
+ 0x00000013 \(RELENT\) * 8 \(bytes\)
+ 0x70000001 \(MIPS_RLD_VERSION\) * 1
+ 0x70000005 \(MIPS_FLAGS\) * NOTPOT
+ 0x70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
+ 0x7000000a \(MIPS_LOCAL_GOTNO\) * 2
+ 0x70000011 \(MIPS_SYMTABNO\) * 14
+ 0x70000012 \(MIPS_UNREFEXTNO\) * .*
+ 0x70000013 \(MIPS_GOTSYM\) * 0x7
+ 0x00000014 \(PLTREL\) * REL
+ 0x00000017 \(JMPREL\) * 0x43028
+ 0x00000002 \(PLTRELSZ\) * 24 \(bytes\)
+ 0x70000032 \(MIPS_PLTGOT\) * 0x81000
+ 0x00000000 \(NULL\) * 0x0
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.dd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.dd
new file mode 100644
index 0000000..731b8ed
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.dd
@@ -0,0 +1,102 @@
+# GOT layout:
+#
+# -32752: lazy resolution function
+# -32748: reserved for module pointer
+# -32744: extf2's GOT entry (undefined 0)
+# -32740: extf3's GOT entry (PLT entry)
+# -32736: extd2's GOT entry (copy reloc)
+# -32732: extf1's GOT entry (.MIPS.stubs entry)
+# -32728: extd1's GOT entry (undefined 0)
+# -32724: extf4's GOT entry (PLT entry)
+# -32620: extd4's GOT entry (undefined 0, reloc only)
+
+.*
+
+Disassembly of section \.plt:
+
+00043040 <.*>:
+.*: 3c1c0008 lui gp,0x8
+.*: 8f991000 lw t9,4096\(gp\)
+.*: 279c1000 addiu gp,gp,4096
+.*: 031cc023 subu t8,t8,gp
+.*: 03e07821 move t7,ra
+.*: 0018c082 srl t8,t8,0x2
+.*: 0320f809 jalr t9
+.*: 2718fffe addiu t8,t8,-2
+
+00043060 <extf4@plt>:
+.*: 3c0f0008 lui t7,0x8
+.*: 8df91008 lw t9,4104\(t7\)
+.*: 25f81008 addiu t8,t7,4104
+.*: 03200008 jr t9
+
+00043070 <extf5@plt>:
+.*: 3c0f0008 lui t7,0x8
+.*: 8df9100c lw t9,4108\(t7\)
+.*: 25f8100c addiu t8,t7,4108
+.*: 03200008 jr t9
+
+00043080 <extf3@plt>:
+.*: 3c0f0008 lui t7,0x8
+.*: 8df91010 lw t9,4112\(t7\)
+.*: 25f81010 addiu t8,t7,4112
+.*: 03200008 jr t9
+.*: 00000000 nop
+
+Disassembly of section \.text:
+
+00044000 <.*>:
+ \.\.\.
+
+00044008 <\.pic\.f1>:
+ 44008: 3c190004 lui t9,0x4
+ 4400c: 27394010 addiu t9,t9,16400
+
+00044010 <f1>:
+ 44010: 0c011013 jal 4404c <f3>
+ 44014: 3c020004 lui v0,0x4
+ 44018: 03e00008 jr ra
+ 4401c: 24424020 addiu v0,v0,16416
+
+00044020 <f2>:
+ 44020: 3c1c0006 lui gp,0x6
+ 44024: 279c3fd0 addiu gp,gp,16336
+ 44028: 0399e021 addu gp,gp,t9
+ 4402c: 8f998024 lw t9,-32732\(gp\)
+ 44030: 8f848018 lw a0,-32744\(gp\)
+ 44034: 8f858028 lw a1,-32728\(gp\)
+ 44038: 0320f809 jalr t9
+ 4403c: 8f868020 lw a2,-32736\(gp\)
+ 44040: 8f99801c lw t9,-32740\(gp\)
+ 44044: 03200008 jr t9
+ 44048: 8f84802c lw a0,-32724\(gp\)
+
+0004404c <f3>:
+ 4404c: 03e00008 jr ra
+ 44050: 00000000 nop
+ \.\.\.
+
+00044060 <__start>:
+ 44060: 0c011002 jal 44008 <\.pic\.f1>
+ 44064: 00000000 nop
+ 44068: 3c020004 lui v0,0x4
+ 4406c: 24424020 addiu v0,v0,16416
+ 44070: 0c010c20 jal 43080 <extf3@plt>
+ 44074: 00000000 nop
+ 44078: 0c010c18 jal 43060 <extf4@plt>
+ 4407c: 00000000 nop
+ 44080: 0c010c1c jal 43070 <extf5@plt>
+ 44084: 00000000 nop
+ 44088: 3c02000a lui v0,0xa
+ 4408c: 24422000 addiu v0,v0,8192
+ 44090: 3c02000a lui v0,0xa
+ 44094: 24422018 addiu v0,v0,8216
+ \.\.\.
+Disassembly of section \.MIPS\.stubs:
+
+000440a0 <\.MIPS\.stubs>:
+ 440a0: 8f998010 lw t9,-32752\(gp\)
+ 440a4: 03e07821 move t7,ra
+ 440a8: 0320f809 jalr t9
+ 440ac: 2418000a li t8,10
+ \.\.\.
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.gd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.gd
new file mode 100644
index 0000000..8b6b5a0
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.gd
@@ -0,0 +1,32 @@
+
+Primary GOT:
+ Canonical gp value: 000a7ff0
+
+ Reserved entries:
+ Address Access Initial Purpose
+ 000a0000 -32752\(gp\) 00000000 Lazy resolver
+ 000a0004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
+
+ Global entries:
+ Address Access Initial Sym\.Val\. Type Ndx Name
+ 000a0008 -32744\(gp\) 00000000 00000000 FUNC UND extf2
+ 000a000c -32740\(gp\) 00000000 00000000 FUNC UND extf3
+ 000a0010 -32736\(gp\) 000a2000 000a2000 OBJECT 16 extd2
+ 000a0014 -32732\(gp\) 000440a0 000440a0 FUNC UND extf1
+ 000a0018 -32728\(gp\) 00000000 00000000 OBJECT UND extd1
+ 000a001c -32724\(gp\) 00000000 00000000 FUNC UND extf4
+ 000a0020 -32720\(gp\) 00000000 00000000 OBJECT UND extd4
+
+
+PLT GOT:
+
+ Reserved entries:
+ Address Initial Purpose
+ 00081000 00000000 PLT lazy resolver
+ 00081004 00000000 Module pointer
+
+ Entries:
+ Address Initial Sym.Val. Type Ndx Name
+ 00081008 00043040 00000000 FUNC UND extf4
+ 0008100c 00043040 00000000 FUNC UND extf5
+ 00081010 00043040 00000000 FUNC UND extf3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.nd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.nd
new file mode 100644
index 0000000..15ace17
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.nd
@@ -0,0 +1,17 @@
+
+Symbol table '\.dynsym' contains .*:
+#...
+.*: 00000000 * 0 * FUNC * GLOBAL * DEFAULT * UND * extf5
+# The index on the next line should correspond to MIPS_GOTSYM,
+# and the remaining symbols should have the same order as the
+# GOT layout given in the *.dd dump.
+#...
+ *7: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf2
+ *8: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf3
+ *9: 0+a2000 * 24 * OBJECT * GLOBAL * DEFAULT * [0-9]+ * extd2
+ *10: 0+440a0 * 0 * FUNC * GLOBAL * DEFAULT * UND * extf1
+ *11: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd1
+ *12: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf4
+ *13: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd4
+
+#pass
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.pd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.pd
new file mode 100644
index 0000000..5f5de62
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.pd
@@ -0,0 +1,6 @@
+
+.*
+
+Contents of section \.got\.plt:
+ 81000 00000000 00000000 00043040 00043040 .*
+ 81010 00043040 .*
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.rd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.rd
new file mode 100644
index 0000000..0fd5b7e
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.rd
@@ -0,0 +1,14 @@
+
+Relocation section '\.rel\.dyn' at offset .* contains .*:
+ * Offset * Info * Type * Sym\.Value * Sym\. Name
+00000000 * 00000000 * R_MIPS_NONE *
+000a2018 * [^ ]*7e * R_MIPS_COPY * 000a2018 * extd3
+000a2000 * [^ ]*7e * R_MIPS_COPY * 000a2000 * extd2
+000a1000 * [^ ]*03 * R_MIPS_REL32 * 00000000 * extd1
+000a1014 * [^ ]*03 * R_MIPS_REL32 * 00000000 * extd4
+
+Relocation section '\.rel\.plt' at offset .* contains .*:
+ * Offset * Info * Type * Sym\.Value * Sym\. Name
+00081008 * [^ ]*7f * R_MIPS_JUMP_SLOT * 00000000 * extf4
+0008100c * [^ ]*7f * R_MIPS_JUMP_SLOT * 00000000 * extf5
+00081010 * [^ ]*7f * R_MIPS_JUMP_SLOT * 00000000 * extf3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd
new file mode 100644
index 0000000..b5d51b3
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd
@@ -0,0 +1,27 @@
+
+Elf file type is EXEC \(Executable file\)
+Entry point 0x44000
+There are 8 program headers, starting at offset .*
+
+Program Headers:
+ * Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
+ * PHDR * .*
+ * INTERP * .*
+.*
+ * REGINFO * [^ ]+ * 0x0+41000 * 0x0+41000 * [^ ]+ * [^ ]+ * R * 0x.*
+ * LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
+ * LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
+ * DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
+ * NULL * .*
+
+ *Section to Segment mapping:
+ *Segment Sections\.\.\.
+ *0*0 *
+ *0*1 * \.interp *
+ *0*2 * \.reginfo *
+ *0*3 * \.interp \.reginfo \.hash \.dynsym \.dynstr \.dynamic \.rel\.dyn \.rel\.plt \.plt \.text \.MIPS\.stubs *
+ *0*4 * \.rld_map \.got\.plt *
+ *0*5 * \.got \.data \.bss *
+ *0*6 * \.dynamic *
+ *0*7 *
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32a.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32a.s
new file mode 100644
index 0000000..a4c0075
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32a.s
@@ -0,0 +1,48 @@
+ .abicalls
+ .global extf1
+ .ent extf1
+extf1:
+ jr $31
+ .end extf1
+
+ .global extf2
+ .ent extf2
+extf2:
+ jr $31
+ .end extf2
+
+ .global extf3
+ .ent extf3
+extf3:
+ jr $31
+ .end extf3
+
+ .global extf4
+ .ent extf4
+extf4:
+ jr $31
+ .end extf4
+
+ .global extf5
+ .ent extf5
+extf5:
+ jr $31
+ .end extf5
+
+ .data
+ .global extd1
+ .global extd2
+ .global extd3
+ .global extd4
+ .type extd1,%object
+ .type extd2,%object
+ .type extd3,%object
+ .type extd4,%object
+ .size extd1,20
+ .size extd2,24
+ .size extd3,28
+ .size extd4,8
+extd1: .space 20
+extd2: .space 24
+extd3: .space 28
+extd4: .space 8
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32b.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32b.s
new file mode 100644
index 0000000..4f8816b
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32b.s
@@ -0,0 +1,37 @@
+ .set noreorder
+ .abicalls
+ .global f1
+ .ent f1
+f1:
+ .option pic0
+ jal f3
+ .option pic2
+ lui $2,%hi(f2)
+ jr $31
+ addiu $2,$2,%lo(f2)
+ .end f1
+
+ .global f2
+ .ent f2
+f2:
+ .cpload $25
+ lw $25,%call16(extf1)($28)
+ lw $4,%got(extf2)($28)
+ lw $5,%got(extd1)($28)
+ jalr $25
+ lw $6,%got(extd2)($28)
+ lw $25,%call16(extf3)($28)
+ jr $25
+ lw $4,%got(extf4)($28)
+ .end f2
+
+ .global f3
+ .ent f3
+f3:
+ jr $31
+ nop
+ .end f3
+
+ .data
+ .word extd1
+ .word extd3
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s
new file mode 100644
index 0000000..578626a
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s
@@ -0,0 +1,25 @@
+ .abicalls
+ .option pic0
+ .set noreorder
+ .global __start
+ .ent __start
+__start:
+ jal f1
+ nop
+ lui $2,%hi(f2)
+ addiu $2,$2,%lo(f2)
+ jal extf3
+ nop
+ jal extf4
+ nop
+ jal extf5
+ nop
+ lui $2,%hi(extd2)
+ addiu $2,$2,%lo(extd2)
+ lui $2,%hi(extd3)
+ addiu $2,$2,%lo(extd3)
+ .end __start
+
+ .data
+ .word extd2
+ .word extd4
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6.ld b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6.ld
new file mode 100644
index 0000000..aff900e
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6.ld
@@ -0,0 +1,40 @@
+SECTIONS
+{
+ . = 0x40000 + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+
+ . = 0x41000;
+ .reginfo : { *(.reginfo) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = 0x42000;
+ .dynamic : { *(.dynamic) }
+
+ . = 0x43000;
+ .rel.dyn : { *(.rel.dyn) }
+ .rel.plt : { *(.rel.plt) }
+ .plt : { *(.plt) }
+
+ . = 0x44000;
+ .text : { *(.text) }
+ .MIPS.stubs : { *(.MIPS.stubs) }
+ .MIPS.options : { *(.MIPS.options) }
+
+ . = 0x80000;
+ .rld_map : { *(.rld_map) }
+
+ . = 0x81000;
+ .got.plt : { *(.got.plt) }
+
+ . = 0xa0000;
+ _gp = . + 0x7ff0;
+ .got : { *(.got) }
+
+ . = 0xa1000;
+ .data : { *(.data) }
+
+ . = 0xa2000;
+ .bss : { *(.dynbss) }
+}