diff options
Diffstat (limited to 'ld/testsuite/ld-arm/stm32l4xx-fix-it-block.d')
| -rw-r--r-- | ld/testsuite/ld-arm/stm32l4xx-fix-it-block.d | 189 |
1 files changed, 189 insertions, 0 deletions
diff --git a/ld/testsuite/ld-arm/stm32l4xx-fix-it-block.d b/ld/testsuite/ld-arm/stm32l4xx-fix-it-block.d new file mode 100644 index 0000000..97bb34d --- /dev/null +++ b/ld/testsuite/ld-arm/stm32l4xx-fix-it-block.d @@ -0,0 +1,189 @@ + +.*: file format elf32-littlearm.* + + +Disassembly of section \.text: + +00008000 <__stm32l4xx_veneer_0>: + 8000: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 8004: e899 0380 ldmia\.w r9, {r7, r8, r9} + 8008: f000 b875 b\.w 80f6 <__stm32l4xx_veneer_0_r> + 800c: f7f0 a000 udf\.w #0 + +00008010 <__stm32l4xx_veneer_1>: + 8010: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 8014: e899 0380 ldmia\.w r9, {r7, r8, r9} + 8018: f000 b872 b\.w 8100 <__stm32l4xx_veneer_1_r> + 801c: f7f0 a000 udf\.w #0 + +00008020 <__stm32l4xx_veneer_2>: + 8020: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 8024: e899 0380 ldmia\.w r9, {r7, r8, r9} + 8028: f000 b86f b\.w 810a <__stm32l4xx_veneer_2_r> + 802c: f7f0 a000 udf\.w #0 + +00008030 <__stm32l4xx_veneer_3>: + 8030: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 8034: e899 0380 ldmia\.w r9, {r7, r8, r9} + 8038: f000 b86e b\.w 8118 <__stm32l4xx_veneer_3_r> + 803c: f7f0 a000 udf\.w #0 + +00008040 <__stm32l4xx_veneer_4>: + 8040: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 8044: e899 0380 ldmia\.w r9, {r7, r8, r9} + 8048: f000 b86d b\.w 8126 <__stm32l4xx_veneer_4_r> + 804c: f7f0 a000 udf\.w #0 + +00008050 <__stm32l4xx_veneer_5>: + 8050: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 8054: e899 0380 ldmia\.w r9, {r7, r8, r9} + 8058: f000 b86c b\.w 8134 <__stm32l4xx_veneer_5_r> + 805c: f7f0 a000 udf\.w #0 + +00008060 <__stm32l4xx_veneer_6>: + 8060: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 8064: e899 0380 ldmia\.w r9, {r7, r8, r9} + 8068: f000 b86b b\.w 8142 <__stm32l4xx_veneer_6_r> + 806c: f7f0 a000 udf\.w #0 + +00008070 <__stm32l4xx_veneer_7>: + 8070: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 8074: e899 0380 ldmia\.w r9, {r7, r8, r9} + 8078: f000 b86c b\.w 8154 <__stm32l4xx_veneer_7_r> + 807c: f7f0 a000 udf\.w #0 + +00008080 <__stm32l4xx_veneer_8>: + 8080: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 8084: e899 0380 ldmia\.w r9, {r7, r8, r9} + 8088: f000 b86d b\.w 8166 <__stm32l4xx_veneer_8_r> + 808c: f7f0 a000 udf\.w #0 + +00008090 <__stm32l4xx_veneer_9>: + 8090: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 8094: e899 0380 ldmia\.w r9, {r7, r8, r9} + 8098: f000 b86e b\.w 8178 <__stm32l4xx_veneer_9_r> + 809c: f7f0 a000 udf\.w #0 + +000080a0 <__stm32l4xx_veneer_a>: + 80a0: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 80a4: e899 0380 ldmia\.w r9, {r7, r8, r9} + 80a8: f000 b86f b\.w 818a <__stm32l4xx_veneer_a_r> + 80ac: f7f0 a000 udf\.w #0 + +000080b0 <__stm32l4xx_veneer_b>: + 80b0: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 80b4: e899 0380 ldmia\.w r9, {r7, r8, r9} + 80b8: f000 b870 b\.w 819c <__stm32l4xx_veneer_b_r> + 80bc: f7f0 a000 udf\.w #0 + +000080c0 <__stm32l4xx_veneer_c>: + 80c0: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 80c4: e899 0380 ldmia\.w r9, {r7, r8, r9} + 80c8: f000 b871 b\.w 81ae <__stm32l4xx_veneer_c_r> + 80cc: f7f0 a000 udf\.w #0 + +000080d0 <__stm32l4xx_veneer_d>: + 80d0: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 80d4: e899 0380 ldmia\.w r9, {r7, r8, r9} + 80d8: f000 b872 b\.w 81c0 <__stm32l4xx_veneer_d_r> + 80dc: f7f0 a000 udf\.w #0 + +000080e0 <__stm32l4xx_veneer_e>: + 80e0: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6} + 80e4: e899 0380 ldmia\.w r9, {r7, r8, r9} + 80e8: f000 b873 b\.w 81d2 <__stm32l4xx_veneer_e_r> + 80ec: f7f0 a000 udf\.w #0 + +000080f0 <_start>: + 80f0: bf08 it eq + 80f2: f7ff bf85 beq\.w 8000 <__stm32l4xx_veneer_0> + +000080f6 <__stm32l4xx_veneer_0_r>: + 80f6: bf04 itt eq + 80f8: f3af 8000 nopeq\.w + 80fc: f7ff bf88 beq\.w 8010 <__stm32l4xx_veneer_1> + +00008100 <__stm32l4xx_veneer_1_r>: + 8100: bf0c ite eq + 8102: f3af 8000 nopeq\.w + 8106: f7ff bf8b bne\.w 8020 <__stm32l4xx_veneer_2> + +0000810a <__stm32l4xx_veneer_2_r>: + 810a: bf02 ittt eq + 810c: f3af 8000 nopeq\.w + 8110: f3af 8000 nopeq\.w + 8114: f7ff bf8c beq\.w 8030 <__stm32l4xx_veneer_3> + +00008118 <__stm32l4xx_veneer_3_r>: + 8118: bf0a itet eq + 811a: f3af 8000 nopeq\.w + 811e: f3af 8000 nopne\.w + 8122: f7ff bf8d beq\.w 8040 <__stm32l4xx_veneer_4> + +00008126 <__stm32l4xx_veneer_4_r>: + 8126: bf06 itte eq + 8128: f3af 8000 nopeq\.w + 812c: f3af 8000 nopeq\.w + 8130: f7ff bf8e bne\.w 8050 <__stm32l4xx_veneer_5> + +00008134 <__stm32l4xx_veneer_5_r>: + 8134: bf0e itee eq + 8136: f3af 8000 nopeq\.w + 813a: f3af 8000 nopne\.w + 813e: f7ff bf8f bne\.w 8060 <__stm32l4xx_veneer_6> + +00008142 <__stm32l4xx_veneer_6_r>: + 8142: bf01 itttt eq + 8144: f3af 8000 nopeq\.w + 8148: f3af 8000 nopeq\.w + 814c: f3af 8000 nopeq\.w + 8150: f7ff bf8e beq\.w 8070 <__stm32l4xx_veneer_7> + +00008154 <__stm32l4xx_veneer_7_r>: + 8154: bf03 ittte eq + 8156: f3af 8000 nopeq\.w + 815a: f3af 8000 nopeq\.w + 815e: f3af 8000 nopeq\.w + 8162: f7ff bf8d bne\.w 8080 <__stm32l4xx_veneer_8> + +00008166 <__stm32l4xx_veneer_8_r>: + 8166: bf05 ittet eq + 8168: f3af 8000 nopeq\.w + 816c: f3af 8000 nopeq\.w + 8170: f3af 8000 nopne\.w + 8174: f7ff bf8c beq\.w 8090 <__stm32l4xx_veneer_9> + +00008178 <__stm32l4xx_veneer_9_r>: + 8178: bf07 ittee eq + 817a: f3af 8000 nopeq\.w + 817e: f3af 8000 nopeq\.w + 8182: f3af 8000 nopne\.w + 8186: f7ff bf8b bne\.w 80a0 <__stm32l4xx_veneer_a> + +0000818a <__stm32l4xx_veneer_a_r>: + 818a: bf09 itett eq + 818c: f3af 8000 nopeq\.w + 8190: f3af 8000 nopne\.w + 8194: f3af 8000 nopeq\.w + 8198: f7ff bf8a beq\.w 80b0 <__stm32l4xx_veneer_b> + +0000819c <__stm32l4xx_veneer_b_r>: + 819c: bf0b itete eq + 819e: f3af 8000 nopeq\.w + 81a2: f3af 8000 nopne\.w + 81a6: f3af 8000 nopeq\.w + 81aa: f7ff bf89 bne\.w 80c0 <__stm32l4xx_veneer_c> + +000081ae <__stm32l4xx_veneer_c_r>: + 81ae: bf0d iteet eq + 81b0: f3af 8000 nopeq\.w + 81b4: f3af 8000 nopne\.w + 81b8: f3af 8000 nopne\.w + 81bc: f7ff bf88 beq\.w 80d0 <__stm32l4xx_veneer_d> + +000081c0 <__stm32l4xx_veneer_d_r>: + 81c0: bf0f iteee eq + 81c2: f3af 8000 nopeq\.w + 81c6: f3af 8000 nopne\.w + 81ca: f3af 8000 nopne\.w + 81ce: f7ff bf87 bne\.w 80e0 <__stm32l4xx_veneer_e> |