diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 16 | ||||
| -rw-r--r-- | include/elf/arc.h | 34 | ||||
| -rw-r--r-- | include/opcode/arc-attrs.h | 72 | ||||
| -rw-r--r-- | include/opcode/arc.h | 88 |
4 files changed, 146 insertions, 64 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 31dc68f..5ee7cba 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,19 @@ +2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> + + * elf/arc.h (SHT_ARC_ATTRIBUTES): Define. + (Tag_ARC_*): Define. + (E_ARC_OSABI_V4): Define. + (E_ARC_OSABI_CURRENT): Reassign it. + (TAG_CPU_*): Define. + * opcode/arc-attrs.h: New file. + * opcode/arc.h (insn_subclass_t): Assign enum values. + (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64. + (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT) + (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP) + (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW) + (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC) + (ARC_CRC): Delete. + 2017-04-20 H.J. Lu <hongjiu.lu@intel.com> PR ld/21382 diff --git a/include/elf/arc.h b/include/elf/arc.h index 944f49a..78da89c 100644 --- a/include/elf/arc.h +++ b/include/elf/arc.h @@ -55,12 +55,42 @@ END_RELOC_NUMBERS (R_ARC_max) #define E_ARC_OSABI_ORIG 0x00000000 /* MUST be 0 for back-compat. */ #define E_ARC_OSABI_V2 0x00000200 #define E_ARC_OSABI_V3 0x00000300 -#define E_ARC_OSABI_CURRENT E_ARC_OSABI_V3 - +#define E_ARC_OSABI_V4 0x00000400 +#define E_ARC_OSABI_CURRENT E_ARC_OSABI_V4 /* Leave bits 0xf0 alone in case we ever have more than 16 cpu types. */ /* File contains position independent code. */ #define EF_ARC_PIC 0x00000100 +/* Additional section types. */ +#define SHT_ARC_ATTRIBUTES 0x70000001 /* Section holds attributes. */ + +/* ARC ABI object attributes. */ +enum { + /* 0-3 are generic. */ + Tag_ARC_PCS_config = 4, + Tag_ARC_CPU_base, + Tag_ARC_CPU_variation, + Tag_ARC_CPU_name, + Tag_ARC_ABI_rf16, + Tag_ARC_ABI_osver, + Tag_ARC_ABI_sda, + Tag_ARC_ABI_pic, + Tag_ARC_ABI_tls, + Tag_ARC_ABI_enumsize, + Tag_ARC_ABI_exceptions, + Tag_ARC_ABI_double_size, + Tag_ARC_ISA_config, + Tag_ARC_ISA_apex, + Tag_ARC_ISA_mpy_option +}; + +/* Values for the Tag_ARC_cpu_base attribute. */ +#define TAG_CPU_NONE 0 +#define TAG_CPU_ARC6xx 1 +#define TAG_CPU_ARC7xx 2 +#define TAG_CPU_ARCEM 3 +#define TAG_CPU_ARCHS 4 + #endif /* _ELF_ARC_H */ diff --git a/include/opcode/arc-attrs.h b/include/opcode/arc-attrs.h new file mode 100644 index 0000000..4c36d00 --- /dev/null +++ b/include/opcode/arc-attrs.h @@ -0,0 +1,72 @@ +/* Copyright (C) 1994-2016 Free Software Foundation, Inc. + + Contributed by Claudiu Zissulescu (claziss@synopsys.com) + + This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and + the GNU Binutils. + + GAS/GDB is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GAS/GDB is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GAS or GDB; see the file COPYING3. If not, write to + the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#ifndef ATTRS_ARC_H +#define ATTRS_ARC_H + +#ifndef FEATURE_LIST_NAME +#define FEATURE_LIST_NAME feature_list +#endif + +/* A table with cpu features. */ +const struct feature_type +{ + unsigned feature; + unsigned cpus; + const char *attr; + const char *name; +} FEATURE_LIST_NAME [] = + { + { BTSCN, ARC_OPCODE_ARCALL, "BITSCAN", "bit-scan" }, + { CD, ARC_OPCODE_ARCV2, "CD", "code-density" }, + { DIV, ARC_OPCODE_ARCV2, "DIV_REM", "div/rem" }, + { DP, ARC_OPCODE_ARCv2HS, "FPUD", "double-precision FPU" }, + { DPA, ARC_OPCODE_ARCv2EM, "FPUDA", "double assist FP" }, + { DPX, ARC_OPCODE_ARCFPX, "DPFP", "double-precision FPX" }, + { LL64, ARC_OPCODE_ARCv2HS, "LL64", "double load/store" }, + { NPS400, ARC_OPCODE_ARC700, "NPS400", "nps400" }, + { QUARKSE1, ARC_OPCODE_ARCv2EM, "QUARKSE1", "QuarkSE-EM" }, + { QUARKSE2, ARC_OPCODE_ARCv2EM, "QUARKSE2", "QuarkSE-EM" }, + { SHFT1, ARC_OPCODE_ARCALL, "SA", "shift assist" }, + { SHFT2, ARC_OPCODE_ARCALL, "BS", "barrel-shifter" }, + { SWAP, ARC_OPCODE_ARCALL, "SWAP", "swap" }, + { SP, ARC_OPCODE_ARCV2, "FPUS", "single-precision FPU" }, + { SPX, ARC_OPCODE_ARCFPX, "SPFP", "single-precision FPX" } + }; + +#ifndef CONFLICT_LIST +#define CONFLICT_LIST conflict_list +#endif + +/* A table with conflicting features. */ +unsigned CONFLICT_LIST [] = { + NPS400 | SPX, + NPS400 | DPX, + DPX | DPA, + SP | DPX, + SP | SPX, + DP | DPX, + DP | SPX, + QUARKSE1 | DP, + QUARKSE1 | SP +}; +#endif diff --git a/include/opcode/arc.h b/include/opcode/arc.h index 97db92c..0524fda 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -85,28 +85,31 @@ typedef enum /* Instruction Subclass. */ typedef enum { - NONE, - CVT, - BTSCN, - CD1, - CD2, - COND, - DIV, - DP, - DPA, - DPX, - MPY1E, - MPY6E, - MPY7E, - MPY8E, - MPY9E, - NPS400, - QUARKSE, - SHFT1, - SHFT2, - SWAP, - SP, - SPX + NONE = 0, + CVT = (1U << 1), + BTSCN = (1U << 2), + CD = (1U << 3), + CD1 = CD, + CD2 = CD, + COND = (1U << 4), + DIV = (1U << 5), + DP = (1U << 6), + DPA = (1U << 7), + DPX = (1U << 8), + LL64 = (1U << 9), + MPY1E = (1U << 10), + MPY6E = (1U << 11), + MPY7E = (1U << 12), + MPY8E = (1U << 13), + MPY9E = (1U << 14), + NPS400 = (1U << 15), + QUARKSE1 = (1U << 16), + QUARKSE2 = (1U << 17), + SHFT1 = (1U << 18), + SHFT2 = (1U << 19), + SWAP = (1U << 20), + SP = (1U << 21), + SPX = (1U << 22) } insn_subclass_t; /* Flags class. */ @@ -197,46 +200,7 @@ extern int arc_opcode_len (const struct arc_opcode *opcode); | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS) #define ARC_OPCODE_ARCFPX (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM) #define ARC_OPCODE_ARCV2 (ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS) - -/* CPU extensions. */ -#define ARC_EA 0x0001 -#define ARC_CD 0x0001 /* Mutual exclusive with EA. */ -#define ARC_LLOCK 0x0002 -#define ARC_ATOMIC 0x0002 /* Mutual exclusive with LLOCK. */ -#define ARC_MPY 0x0004 -#define ARC_MULT 0x0004 -#define ARC_NPS400 0x0008 - -/* Floating point support. */ -#define ARC_DPFP 0x0010 -#define ARC_SPFP 0x0020 -#define ARC_FPU 0x0030 -#define ARC_FPUDA 0x0040 - -/* NORM & SWAP. */ -#define ARC_SWAP 0x0100 -#define ARC_NORM 0x0200 -#define ARC_BSCAN 0x0200 - -/* A7 specific. */ -#define ARC_UIX 0x1000 -#define ARC_TSTAMP 0x1000 - -/* A6 specific. */ -#define ARC_VBFDW 0x1000 -#define ARC_BARREL 0x1000 -#define ARC_DSPA 0x1000 - -/* EM specific. */ -#define ARC_SHIFT 0x1000 - -/* V2 specific. */ -#define ARC_INTR 0x1000 -#define ARC_DIV 0x1000 - -/* V1 specific. */ -#define ARC_XMAC 0x1000 -#define ARC_CRC 0x1000 +#define ARC_OPCODE_ARCMPY6E (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCV2) /* The operands table is an array of struct arc_operand. */ struct arc_operand |