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-rw-r--r--include/ChangeLog5
-rw-r--r--include/elf/sparc.h1
-rw-r--r--include/opcode/sparc.h3
3 files changed, 8 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index e14f707..b1ff61c 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2012-04-12 David S. Miller <davem@davemloft.net>
+
+ * elf/sparc.h (R_SPARC_WDISP10): New reloc.
+ * opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10.
+
2012-04-10 Tristan Gingold <gingold@adacore.com>
* splay-tree.h: Conditionnaly includes stdint.h and inttypes.h
diff --git a/include/elf/sparc.h b/include/elf/sparc.h
index fc8a765..880ead6 100644
--- a/include/elf/sparc.h
+++ b/include/elf/sparc.h
@@ -162,6 +162,7 @@ START_RELOC_NUMBERS (elf_sparc_reloc_type)
RELOC_NUMBER (R_SPARC_H34, 85)
RELOC_NUMBER (R_SPARC_SIZE32, 86)
RELOC_NUMBER (R_SPARC_SIZE64, 87)
+ RELOC_NUMBER (R_SPARC_WDISP10, 88)
EMPTY_RELOC (R_SPARC_max_std)
diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h
index 7ae3641..91dc696 100644
--- a/include/opcode/sparc.h
+++ b/include/opcode/sparc.h
@@ -208,7 +208,8 @@ typedef struct sparc_opcode
0 32/64 bit immediate for set or setx (v9) insns
_ Ancillary state register in rd (v9a)
/ Ancillary state register in rs1 (v9a)
- ( entire floating point state register (%efsr). */
+ ( entire floating point state register (%efsr)
+ = 2+8 bit PC relative immediate. (v9) */
#define OP2(x) (((x) & 0x7) << 22) /* Op2 field of format2 insns. */
#define OP3(x) (((x) & 0x3f) << 19) /* Op3 field of format3 insns. */