diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 8 | ||||
| -rw-r--r-- | include/elf/mips.h | 3 | ||||
| -rw-r--r-- | include/opcode/mips.h | 3 |
3 files changed, 13 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 7d32268..0b57d2a 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,11 @@ +2018-06-13 Scott Egerton <scott.egerton@imgtec.com> + Faraz Shahbazker <Faraz.Shahbazker@mips.com> + + * elf/mips.h (AFL_ASE_CRC): New macro. + (AFL_ASE_MASK): Update to include AFL_ASE_CRC. + * opcode/mips.h (ASE_CRC): New macro. + * opcode/mips.h (ASE_CRC64): Likewise. + 2018-06-04 Max Filippov <jcmvbkbc@gmail.com> * elf/xtensa.h (xtensa_read_table_entries) diff --git a/include/elf/mips.h b/include/elf/mips.h index 9de0b4e..d11b99f 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -1235,7 +1235,8 @@ extern void bfd_mips_elf_swap_abiflags_v0_out #define AFL_ASE_XPA 0x00001000 /* XPA ASE. */ #define AFL_ASE_DSPR3 0x00002000 /* DSP R3 ASE. */ #define AFL_ASE_MIPS16E2 0x00004000 /* MIPS16e2 ASE. */ -#define AFL_ASE_MASK 0x00007fff /* All ASEs. */ +#define AFL_ASE_CRC 0x00008000 /* CRC ASE. */ +#define AFL_ASE_MASK 0x0000ffff /* All ASEs. */ /* Values for the isa_ext word of an ABI flags structure. */ diff --git a/include/opcode/mips.h b/include/opcode/mips.h index a113893..fcc70d5 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -1294,6 +1294,9 @@ static const unsigned int mips_isa_table[] = { /* The Virtualization ASE has eXtended Physical Addressing (XPA) instructions which are only valid when both ASEs are enabled. */ #define ASE_XPA_VIRT 0x00020000 +/* Cyclic redundancy check (CRC) ASE. */ +#define ASE_CRC 0x00040000 +#define ASE_CRC64 0x00080000 /* MIPS ISA defines, use instead of hardcoding ISA level. */ |