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-rw-r--r--include/ChangeLog6
-rw-r--r--include/elf/mips.h3
-rw-r--r--include/opcode/mips.h1
3 files changed, 9 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 3d17849..af061b4 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,9 @@
+2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * elf/mips.h (AFL_ASE_DSPR3): New macro.
+ (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
+ * opcode/mips.h (ASE_DSPR3): New macro.
+
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
Nick Clifton <nickc@redhat.com>
diff --git a/include/elf/mips.h b/include/elf/mips.h
index 46f63fe..70ea43e 100644
--- a/include/elf/mips.h
+++ b/include/elf/mips.h
@@ -1227,7 +1227,8 @@ extern void bfd_mips_elf_swap_abiflags_v0_out
#define AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */
#define AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */
#define AFL_ASE_XPA 0x00001000 /* XPA ASE. */
-#define AFL_ASE_MASK 0x00001fff /* All ASEs. */
+#define AFL_ASE_DSPR3 0x00002000 /* DSP R3 ASE. */
+#define AFL_ASE_MASK 0x00003fff /* All ASEs. */
/* Values for the isa_ext word of an ABI flags structure. */
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 88bf8f8..0af3ed5 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1256,6 +1256,7 @@ static const unsigned int mips_isa_table[] = {
#define ASE_MSA64 0x00001000
/* eXtended Physical Address (XPA) Extension. */
#define ASE_XPA 0x00002000
+#define ASE_DSPR3 0x00004000
/* MIPS ISA defines, use instead of hardcoding ISA level. */