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-rw-r--r--include/ChangeLog6
-rw-r--r--include/dis-asm.h1
-rw-r--r--include/opcode/riscv.h6
3 files changed, 13 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 7375bac..b3fd56b 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,9 @@
+2018-12-06 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * dis-asm.h (riscv_symbol_is_valid): Declare.
+ * opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define.
+ (RISCV_FAKE_LABEL_CHAR): Define.
+
2018-12-03 Kito Cheng <kito@andestech.com>
* opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 8462795..6a55f3c 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -302,6 +302,7 @@ extern void print_wasm32_disassembler_options (FILE *);
extern bfd_boolean aarch64_symbol_is_valid (asymbol *, struct disassemble_info *);
extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *);
extern bfd_boolean csky_symbol_is_valid (asymbol *, struct disassemble_info *);
+extern bfd_boolean riscv_symbol_is_valid (asymbol *, struct disassemble_info *);
extern void disassemble_init_powerpc (struct disassemble_info *);
extern void disassemble_init_s390 (struct disassemble_info *);
extern void disassemble_init_wasm32 (struct disassemble_info *);
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index 12cb4ca..d57f45b 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -270,6 +270,12 @@ static const char * const riscv_pred_succ[16] =
#define NGPR 32
#define NFPR 32
+/* These fake label defines are use by both the assembler, and
+ libopcodes. The assembler uses this when it needs to generate a fake
+ label, and libopcodes uses it to hide the fake labels in its output. */
+#define RISCV_FAKE_LABEL_NAME ".L0 "
+#define RISCV_FAKE_LABEL_CHAR ' '
+
/* Replace bits MASK << SHIFT of STRUCT with the equivalent bits in
VALUE << SHIFT. VALUE is evaluated exactly once. */
#define INSERT_BITS(STRUCT, VALUE, MASK, SHIFT) \