diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/ChangeLog | 5 | ||||
| -rw-r--r-- | include/opcode/ppc.h | 8 |
2 files changed, 13 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 5b1e41e..c47ded6 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2000-05-03 J.T. Conklin <jtc@redback.com> + + * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit. + (PPC_OPERAND_VR): New operand flag for vector registers. + 2000-05-01 Kazu Hirata <kazu@hxi.com> * h8300.h (EOP): Add missing initializer. diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h index 974f0df..246e3c7 100644 --- a/include/opcode/ppc.h +++ b/include/opcode/ppc.h @@ -88,6 +88,9 @@ extern const int powerpc_num_opcodes; /* Opcode is supported as part of the 64-bit bridge. */ #define PPC_OPCODE_64_BRIDGE (0400) +/* Opcode is supported by Altivec Vector Unit */ +#define PPC_OPCODE_ALTIVEC (01000) + /* A macro to extract the major opcode from an instruction. */ #define PPC_OP(i) (((i) >> 26) & 0x3f) @@ -221,6 +224,11 @@ extern const struct powerpc_operand powerpc_operands[]; number is allowed). This flag will only be set for a signed operand. */ #define PPC_OPERAND_NEGATIVE (04000) + +/* This operand names a vector unit register. The disassembler + prints these with a leading 'v'. */ +#define PPC_OPERAND_VR (010000) + /* The POWER and PowerPC assemblers use a few macros. We keep them with the operands table for simplicity. The macro table is an |