diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 5 | ||||
| -rw-r--r-- | include/dis-asm.h | 1 | ||||
| -rw-r--r-- | include/elf/common.h | 5 | ||||
| -rw-r--r-- | include/elf/csky.h | 97 | ||||
| -rw-r--r-- | include/opcode/csky.h | 110 |
5 files changed, 218 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index b56b6ba..650f7c9 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2018-07-30 Andrew Jenner <andrew@codesourcery.com> + + * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define. + * elf/csky.h: New file. + 2018-07-27 Chenghua Xu <paul.hua.gm@gmail.com> Maciej W. Rozycki <macro@linux-mips.org> diff --git a/include/dis-asm.h b/include/dis-asm.h index 77b9e61..949ccde 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -300,6 +300,7 @@ extern void print_s390_disassembler_options (FILE *); extern void print_wasm32_disassembler_options (FILE *); extern bfd_boolean aarch64_symbol_is_valid (asymbol *, struct disassemble_info *); extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *); +extern bfd_boolean csky_symbol_is_valid (asymbol *, struct disassemble_info *); extern void disassemble_init_powerpc (struct disassemble_info *); extern void disassemble_init_s390 (struct disassemble_info *); extern void disassemble_init_wasm32 (struct disassemble_info *); diff --git a/include/elf/common.h b/include/elf/common.h index 3a6244d..1a940ff 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -340,6 +340,7 @@ #define EM_LANAI 244 /* Lanai 32-bit processor. */ #define EM_BPF 247 /* Linux BPF – in-kernel virtual machine. */ #define EM_NFP 250 /* Netronome Flow Processor. */ +#define EM_CSKY 252 /* C-SKY processor family. */ /* If it is necessary to assign new unofficial EM_* values, please pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision @@ -435,6 +436,10 @@ /* Old constant that might be in use by some software. */ #define EM_OPENRISC EM_OR1K +/* C-SKY historically used 39, the same value as MCORE, from which the + architecture was derived. */ +#define EM_CSKY_OLD EM_MCORE + /* See the above comment before you add a new EM_* value here. */ /* Values for e_version. */ diff --git a/include/elf/csky.h b/include/elf/csky.h new file mode 100644 index 0000000..1ccbd62 --- /dev/null +++ b/include/elf/csky.h @@ -0,0 +1,97 @@ +/* C-SKY ELF support for BFD. + Copyright (C) 1998-2018 Free Software Foundation, Inc. + Contributed by C-SKY Microsystems and Mentor Graphics. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + +#ifndef _ELF_CSKY_H +#define _ELF_CSKY_H + +#include "elf/reloc-macros.h" + +/* Values of relocation types according to the ABI doc. + The order should be consistent with csky bfd reloc type + table in bfd-in2.h. */ +START_RELOC_NUMBERS (elf_csky_reloc_type) + RELOC_NUMBER (R_CKCORE_NONE,0) + RELOC_NUMBER (R_CKCORE_ADDR32,1) + RELOC_NUMBER (R_CKCORE_PCREL_IMM8BY4,2) + RELOC_NUMBER (R_CKCORE_PCREL_IMM11BY2,3) + RELOC_NUMBER (R_CKCORE_PCREL_IMM4BY2,4) + RELOC_NUMBER (R_CKCORE_PCREL32,5) + RELOC_NUMBER (R_CKCORE_PCREL_JSR_IMM11BY2,6) + RELOC_NUMBER (R_CKCORE_GNU_VTINHERIT,7) + RELOC_NUMBER (R_CKCORE_GNU_VTENTRY,8) + RELOC_NUMBER (R_CKCORE_RELATIVE,9) + RELOC_NUMBER (R_CKCORE_COPY,10) + RELOC_NUMBER (R_CKCORE_GLOB_DAT,11) + RELOC_NUMBER (R_CKCORE_JUMP_SLOT,12) + RELOC_NUMBER (R_CKCORE_GOTOFF,13) + RELOC_NUMBER (R_CKCORE_GOTPC,14) + RELOC_NUMBER (R_CKCORE_GOT32,15) + RELOC_NUMBER (R_CKCORE_PLT32,16) + RELOC_NUMBER (R_CKCORE_ADDRGOT,17) + RELOC_NUMBER (R_CKCORE_ADDRPLT,18) + RELOC_NUMBER (R_CKCORE_PCREL_IMM26BY2,19) + RELOC_NUMBER (R_CKCORE_PCREL_IMM16BY2,20) + RELOC_NUMBER (R_CKCORE_PCREL_IMM16BY4,21) + RELOC_NUMBER (R_CKCORE_PCREL_IMM10BY2,22) + RELOC_NUMBER (R_CKCORE_PCREL_IMM10BY4,23) + RELOC_NUMBER (R_CKCORE_ADDR_HI16,24) + RELOC_NUMBER (R_CKCORE_ADDR_LO16,25) + RELOC_NUMBER (R_CKCORE_GOTPC_HI16,26) + RELOC_NUMBER (R_CKCORE_GOTPC_LO16,27) + RELOC_NUMBER (R_CKCORE_GOTOFF_HI16,28) + RELOC_NUMBER (R_CKCORE_GOTOFF_LO16,29) + RELOC_NUMBER (R_CKCORE_GOT12,30) + RELOC_NUMBER (R_CKCORE_GOT_HI16,31) + RELOC_NUMBER (R_CKCORE_GOT_LO16,32) + RELOC_NUMBER (R_CKCORE_PLT12,33) + RELOC_NUMBER (R_CKCORE_PLT_HI16,34) + RELOC_NUMBER (R_CKCORE_PLT_LO16,35) + RELOC_NUMBER (R_CKCORE_ADDRGOT_HI16,36) + RELOC_NUMBER (R_CKCORE_ADDRGOT_LO16,37) + RELOC_NUMBER (R_CKCORE_ADDRPLT_HI16,38) + RELOC_NUMBER (R_CKCORE_ADDRPLT_LO16,39) + RELOC_NUMBER (R_CKCORE_PCREL_JSR_IMM26BY2,40) + RELOC_NUMBER (R_CKCORE_TOFFSET_LO16, 41) + RELOC_NUMBER (R_CKCORE_DOFFSET_LO16, 42) + RELOC_NUMBER (R_CKCORE_PCREL_IMM18BY2, 43) + RELOC_NUMBER (R_CKCORE_DOFFSET_IMM18, 44) + RELOC_NUMBER (R_CKCORE_DOFFSET_IMM18BY2, 45) + RELOC_NUMBER (R_CKCORE_DOFFSET_IMM18BY4, 46) + RELOC_NUMBER (R_CKCORE_GOTOFF_IMM18, 47) + RELOC_NUMBER (R_CKCORE_GOT_IMM18BY4, 48) + RELOC_NUMBER (R_CKCORE_PLT_IMM18BY4, 49) + RELOC_NUMBER (R_CKCORE_PCREL_IMM7BY4, 50) + RELOC_NUMBER (R_CKCORE_TLS_LE32, 51) + RELOC_NUMBER (R_CKCORE_TLS_IE32, 52) + RELOC_NUMBER (R_CKCORE_TLS_GD32, 53) + RELOC_NUMBER (R_CKCORE_TLS_LDM32, 54) + RELOC_NUMBER (R_CKCORE_TLS_LDO32, 55) + RELOC_NUMBER (R_CKCORE_TLS_DTPMOD32, 56) + RELOC_NUMBER (R_CKCORE_TLS_DTPOFF32, 57) + RELOC_NUMBER (R_CKCORE_TLS_TPOFF32, 58) + RELOC_NUMBER (R_CKCORE_PCREL_FLRW_IMM8BY4, 59) + RELOC_NUMBER (R_CKCORE_NOJSRI, 60) + RELOC_NUMBER (R_CKCORE_CALLGRAPH, 61) + RELOC_NUMBER (R_CKCORE_IRELATIVE, 62) + RELOC_NUMBER (R_CKCORE_PCREL_BLOOP_IMM4BY4, 63) + RELOC_NUMBER (R_CKCORE_PCREL_BLOOP_IMM12BY4, 64) +END_RELOC_NUMBERS (R_CKCORE_MAX) + +#endif /* _ELF_CSKY_H */ diff --git a/include/opcode/csky.h b/include/opcode/csky.h new file mode 100644 index 0000000..9b193b6 --- /dev/null +++ b/include/opcode/csky.h @@ -0,0 +1,110 @@ +/* C-SKY assembler/disassembler support. + Copyright (C) 2004-2018 Free Software Foundation, Inc. + Contributed by C-SKY Microsystems and Mentor Graphics. + + This file is part of GDB and GAS. + + GDB and GAS are free software; you can redistribute it and/or + modify it under the terms of the GNU General Public License as + published by the Free Software Foundation; either version 3, or (at + your option) any later version. + + GDB and GAS are distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GDB or GAS; see the file COPYING3. If not, write to the + Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "dis-asm.h" + +/* The following bitmasks control instruction set architecture. */ +#define CSKYV1_ISA_E1 (1 << 0) +#define CSKYV2_ISA_E1 (1 << 1) +#define CSKYV2_ISA_1E2 (1 << 2) +#define CSKYV2_ISA_2E3 (1 << 3) +#define CSKYV2_ISA_3E7 (1 << 4) +#define CSKYV2_ISA_7E10 (1 << 5) +#define CSKYV2_ISA_3E3R1 (1 << 6) + +#define CSKY_ISA_TRUST (1 << 11) +#define CSKY_ISA_CACHE (1 << 12) +#define CSKY_ISA_NVIC (1 << 13) +#define CSKY_ISA_CP (1 << 14) +#define CSKY_ISA_MP (1 << 15) +#define CSKY_ISA_MP_1E2 (1 << 16) +#define CSKY_ISA_JAVA (1 << 17) +#define CSKY_ISA_MAC (1 << 18) +#define CSKY_ISA_MAC_DSP (1 << 19) + +/* Base ISA for csky v1 and v2. */ +#define CSKY_ISA_DSP (1 << 20) +#define CSKY_ISA_DSP_1E2 (1 << 21) +#define CSKY_ISA_DSP_ENHANCE (1 << 22) + +/* Base float instruction (803f & 810f). */ +#define CSKY_ISA_FLOAT_E1 (1 << 25) +/* M_FLOAT support (810f). */ +#define CSKY_ISA_FLOAT_1E2 (1 << 26) +/* 803 support (803f). */ +#define CSKY_ISA_FLOAT_1E3 (1 << 27) +/* 807 support (803f & 807f). */ +#define CSKY_ISA_FLOAT_3E4 (1 << 28) +/* Vector DSP support. */ +#define CSKY_ISA_VDSP (1 << 29) + +/* The following bitmasks control cpu architecture for CSKY. */ +#define CSKY_ABI_V1 (1 << 28) +#define CSKY_ABI_V2 (2 << 28) +#define CSKY_ARCH_MASK 0x0000001F +#define CSKY_ABI_MASK 0xF0000000 + +#define CSKY_ARCH_510 0x1 +#define CSKY_ARCH_610 0x2 +#define CSKY_ARCH_801 0xa +#define CSKY_ARCH_802 0x10 +#define CSKY_ARCH_803 0x9 +#define CSKY_ARCH_807 0x6 +#define CSKY_ARCH_810 0x8 + +#define CSKY_ARCH_MAC (1 << 15) +#define CSKY_ARCH_DSP (1 << 14) +#define CSKY_ARCH_FLOAT (1 << 13) +#define CSKY_ARCH_SIMD (1 << 12) +#define CSKY_ARCH_CP (1 << 11) +#define CSKY_ARCH_MP (1 << 10) +#define CSKY_ARCH_CACHE (1 << 9) +#define CSKY_ARCH_JAVA (1 << 8) +#define CSKY_ARCH_APS (1 << 7) + +#define IS_CSKY_V1(a) \ + (((a) & CSKY_ABI_MASK) == CSKY_ABI_V1) +#define IS_CSKY_V2(a) \ + (((a) & CSKY_ABI_MASK) == CSKY_ABI_V2) +#define IS_CSKY_ARCH_V1(a) \ + (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510 \ + || ((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610) +#define IS_CSKY_ARCH_V2(a) \ + (!(IS_CSKY_ARCH_V1 (a))) + +#define IS_CSKY_ARCH_510(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510) +#define IS_CSKY_ARCH_610(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610) +#define IS_CSKY_ARCH_801(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_801) +#define IS_CSKY_ARCH_802(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_802) +#define IS_CSKY_ARCH_803(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_803) +#define IS_CSKY_ARCH_807(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_807) +#define IS_CSKY_ARCH_810(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_810) + +#define CPU_ARCH_MASK \ + (CSKY_ARCH_JAVA | CSKY_ARCH_FLOAT | CSKY_ARCH_DSP | CSKY_ARCH_MASK) + +#ifdef __cplusplus +extern "C" { +#endif +extern int print_insn_csky (bfd_vma memaddr, struct disassemble_info *info); +#ifdef __cplusplus +} +#endif |