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-rw-r--r--include/opcode/ChangeLog14
-rw-r--r--include/opcode/sparc.h30
2 files changed, 34 insertions, 10 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index c509366..aee1bcd 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,17 @@
+Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * sparc.h: Include <ansidecl.h>. Update function declarations to
+ use prototypes, and to use const when appropriate.
+
+Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.h (MN10300_OPERAND_RELAX): Define.
+
+Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * d10v.h: Change pre_defined_registers to
+ d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
+
Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
* mips.h: Add macros for cop0, cop1 cop2 and cop3.
diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h
index f795666..557337d 100644
--- a/include/opcode/sparc.h
+++ b/include/opcode/sparc.h
@@ -1,5 +1,6 @@
/* Definitions for opcode table for the sparc.
- Copyright (C) 1989, 1991, 1992, 1995, 1996 Free Software Foundation, Inc.
+ Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 1997
+ Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and
the GNU Binutils.
@@ -19,6 +20,8 @@ along with GAS or GDB; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
+#include <ansidecl.h>
+
/* The SPARC opcode table (and other related data) is defined in
the opcodes library in sparc-opc.c. If you change anything here, make
sure you fix up that file, and vice versa. */
@@ -53,6 +56,9 @@ enum sparc_opcode_arch_val {
insn encoding/decoding. */
#define SPARC_OPCODE_ARCH_MASK(arch) (1 << (arch))
+/* Given a valid sparc_opcode_arch_val, return non-zero if it's v9. */
+#define SPARC_OPCODE_ARCH_V9_P(arch) ((arch) >= SPARC_OPCODE_ARCH_V9)
+
/* Table of cpu variants. */
struct sparc_opcode_arch {
@@ -132,6 +138,8 @@ Kinds of operands:
m alternate space register (asr) in rd
M alternate space register (asr) in rs1
h 22 high bits.
+ X 5 bit unsigned immediate
+ Y 6 bit unsigned immediate
K MEMBAR mask (7 bits). (v9)
j 10 bit Immediate. (v9)
I 11 bit Immediate. (v9)
@@ -173,9 +181,10 @@ Kinds of operands:
? Privileged Register in rs1 (v9)
* Prefetch function constant. (v9)
x OPF field (v9 impdep).
+ 0 32/64 bit immediate for set or setx (v9) insns
The following chars are unused: (note: ,[] are used as punctuation)
-[XY3450]
+[345]
*/
@@ -197,6 +206,7 @@ The following chars are unused: (note: ,[] are used as punctuation)
#define RS1(x) (((x)&0x1f) << 14) /* rs1 field */
#define ASI_RS2(x) (SIMM13(x))
#define MEMBAR(x) ((x)&0x7f)
+#define SLCPOP(x) (((x)&0x7f) << 6) /* sparclet cpop */
#define ANNUL (1<<29)
#define BPRED (1<<19) /* v9 */
@@ -208,14 +218,14 @@ The following chars are unused: (note: ,[] are used as punctuation)
extern struct sparc_opcode sparc_opcodes[];
extern const int sparc_num_opcodes;
-int sparc_encode_asi ();
-char *sparc_decode_asi ();
-int sparc_encode_membar ();
-char *sparc_decode_membar ();
-int sparc_encode_prefetch ();
-char *sparc_decode_prefetch ();
-int sparc_encode_sparclet_cpreg ();
-char *sparc_decode_sparclet_cpreg ();
+extern int sparc_encode_asi PARAMS ((const char *));
+extern const char *sparc_decode_asi PARAMS ((int));
+extern int sparc_encode_membar PARAMS ((const char *));
+extern const char *sparc_decode_membar PARAMS ((int));
+extern int sparc_encode_prefetch PARAMS ((const char *));
+extern const char *sparc_decode_prefetch PARAMS ((int));
+extern int sparc_encode_sparclet_cpreg PARAMS ((const char *));
+extern const char *sparc_decode_sparclet_cpreg PARAMS ((int));
/*
* Local Variables: