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2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
+ * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
+ (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
+ (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
+ (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
+ (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
+ (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
+ (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
+ (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
+ (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
+ (AARCH64_OPND_SVE_UIMM8_53): Likewise.
+ (aarch64_sve_dupm_mov_immediate_p): Declare.
+
+2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
+
* opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
(AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
(AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)