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-rw-r--r--gold/ChangeLog16
-rw-r--r--gold/aarch64.cc4
-rw-r--r--gold/arm.cc2
-rw-r--r--gold/mips.cc7
-rw-r--r--gold/powerpc.cc15
-rw-r--r--gold/resolve.cc1
-rw-r--r--gold/s390.cc8
-rw-r--r--gold/sparc.cc8
-rw-r--r--gold/tilegx.cc2
-rw-r--r--gold/x86_64.cc2
10 files changed, 47 insertions, 18 deletions
diff --git a/gold/ChangeLog b/gold/ChangeLog
index 1e01a4a..8b917b5 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,19 @@
+2016-10-06 Alan Modra <amodra@gmail.com>
+
+ * aarch64.cc: Spell fall through comments as "// Fall through.".
+ * arm.cc: Likewise.
+ * mips.cc: Likewise.
+ * powerpc.cc: Likewise.
+ * s390.cc: Likewise.
+ * sparc.cc: Likewise.
+ * x86_64.cc: Likewise.
+ * powerpc.cc (Target_powerpc::Relocate::relocate): Add missing
+ fall through comments.
+ * sparc.cc: (Target_sparc::Scan::global): Likewise.
+ (Target_sparc::Relocate::relocate): Likewise.
+ * tilegx.cc (Target_tilegx::Relocate::relocate): Likewise.
+ * resolve.cc (symbol_to_bits): Add missing break.
+
2016-09-26 Cary Coutant <ccoutant@gmail.com>
PR gold/20238
diff --git a/gold/aarch64.cc b/gold/aarch64.cc
index 310331c..28e4d48 100644
--- a/gold/aarch64.cc
+++ b/gold/aarch64.cc
@@ -7084,13 +7084,13 @@ Target_aarch64<size, big_endian>::Relocate::relocate(
// Return false to stop further processing this reloc.
return false;
}
- // Fallthrough
+ // Fall through.
case elfcpp::R_AARCH64_JUMP26:
if (Reloc::maybe_apply_stub(r_type, relinfo, rela, view, address,
gsym, psymval, object,
target->stub_group_size_))
break;
- // Fallthrough
+ // Fall through.
case elfcpp::R_AARCH64_TSTBR14:
case elfcpp::R_AARCH64_CONDBR19:
reloc_status = Reloc::template pcrela_general<32>(
diff --git a/gold/arm.cc b/gold/arm.cc
index 9171d0b..b51612c 100644
--- a/gold/arm.cc
+++ b/gold/arm.cc
@@ -12820,7 +12820,7 @@ Target_arm<big_endian>::apply_cortex_a8_workaround(
// branch to the stub. We use the THUMB-2 encoding here.
upper_insn = 0xf000U;
lower_insn = 0xb800U;
- // Fall through
+ // Fall through.
case arm_stub_a8_veneer_b:
case arm_stub_a8_veneer_bl:
case arm_stub_a8_veneer_blx:
diff --git a/gold/mips.cc b/gold/mips.cc
index 8893e31..61b3513 100644
--- a/gold/mips.cc
+++ b/gold/mips.cc
@@ -10673,8 +10673,7 @@ Target_mips<size, big_endian>::Scan::local(
// no symbol (e.g. part of a compound relocation).
if (r_sym == 0)
break;
-
- // FALLTHROUGH
+ // Fall through.
case elfcpp::R_MIPS16_26:
case elfcpp::R_MIPS_26:
@@ -10903,7 +10902,6 @@ Target_mips<size, big_endian>::Scan::global(
// Most static relocations require pointer equality, except
// for branches.
mips_sym->set_pointer_equality_needed();
-
// Fall through.
case elfcpp::R_MIPS_26:
@@ -11183,8 +11181,7 @@ Target_mips<size, big_endian>::Scan::global(
// and has a special meaning.
if (!mips_obj->is_newabi() && strcmp(gsym->name(), "_gp_disp") == 0)
break;
-
- // FALLTHROUGH
+ // Fall through.
case elfcpp::R_MIPS16_26:
case elfcpp::R_MIPS_26:
diff --git a/gold/powerpc.cc b/gold/powerpc.cc
index 8f5d259..d286f70 100644
--- a/gold/powerpc.cc
+++ b/gold/powerpc.cc
@@ -6092,7 +6092,7 @@ Target_powerpc<size, big_endian>::Scan::global(
ppc_object->set_opd_discard(reloc.get_r_offset());
break;
}
- // Fall thru
+ // Fall through.
case elfcpp::R_PPC64_UADDR64:
case elfcpp::R_POWERPC_ADDR32:
case elfcpp::R_POWERPC_UADDR32:
@@ -6199,7 +6199,7 @@ Target_powerpc<size, big_endian>::Scan::global(
|| gsym->is_preemptible())))
target->make_plt_entry(symtab, layout, gsym);
}
- // Fall thru
+ // Fall through.
case elfcpp::R_PPC64_REL64:
case elfcpp::R_POWERPC_REL32:
@@ -7589,6 +7589,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
if (size != 64)
// R_PPC_TLSGD, R_PPC_TLSLD, R_PPC_EMB_RELST_LO, R_PPC_EMB_RELST_HI
break;
+ // Fall through.
case elfcpp::R_POWERPC_TPREL16:
case elfcpp::R_POWERPC_TPREL16_LO:
case elfcpp::R_POWERPC_TPREL16_HI:
@@ -7612,6 +7613,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
// R_PPC_EMB_NADDR32, R_PPC_EMB_NADDR16, R_PPC_EMB_NADDR16_LO
// R_PPC_EMB_NADDR16_HI, R_PPC_EMB_NADDR16_HA, R_PPC_EMB_SDAI16
break;
+ // Fall through.
case elfcpp::R_POWERPC_DTPREL16:
case elfcpp::R_POWERPC_DTPREL16_LO:
case elfcpp::R_POWERPC_DTPREL16_HI:
@@ -7640,6 +7642,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
case elfcpp::R_POWERPC_ADDR14_BRTAKEN:
case elfcpp::R_POWERPC_REL14_BRTAKEN:
branch_bit = 1 << 21;
+ // Fall through.
case elfcpp::R_POWERPC_ADDR14_BRNTAKEN:
case elfcpp::R_POWERPC_REL14_BRNTAKEN:
{
@@ -8038,6 +8041,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
if (size == 32)
// R_PPC_EMB_MRKREF, R_PPC_EMB_RELST_LO, R_PPC_EMB_RELST_HA
goto unsupp;
+ // Fall through.
case elfcpp::R_POWERPC_ADDR16_HI:
case elfcpp::R_POWERPC_REL16_HI:
case elfcpp::R_PPC64_TOC16_HI:
@@ -8058,6 +8062,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
if (size == 32)
// R_PPC_EMB_RELSEC16, R_PPC_EMB_RELST_HI, R_PPC_EMB_BIT_FLD
goto unsupp;
+ // Fall through.
case elfcpp::R_POWERPC_ADDR16_HA:
case elfcpp::R_POWERPC_REL16_HA:
case elfcpp::R_PPC64_TOC16_HA:
@@ -8080,6 +8085,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
if (size == 32)
// R_PPC_EMB_NADDR16_LO
goto unsupp;
+ // Fall through.
case elfcpp::R_PPC64_ADDR16_HIGHER:
case elfcpp::R_PPC64_TPREL16_HIGHER:
Reloc::addr16_hi2(view, value);
@@ -8089,6 +8095,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
if (size == 32)
// R_PPC_EMB_NADDR16_HI
goto unsupp;
+ // Fall through.
case elfcpp::R_PPC64_ADDR16_HIGHERA:
case elfcpp::R_PPC64_TPREL16_HIGHERA:
Reloc::addr16_ha2(view, value);
@@ -8098,6 +8105,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
if (size == 32)
// R_PPC_EMB_NADDR16_HA
goto unsupp;
+ // Fall through.
case elfcpp::R_PPC64_ADDR16_HIGHEST:
case elfcpp::R_PPC64_TPREL16_HIGHEST:
Reloc::addr16_hi3(view, value);
@@ -8107,6 +8115,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
if (size == 32)
// R_PPC_EMB_SDAI16
goto unsupp;
+ // Fall through.
case elfcpp::R_PPC64_ADDR16_HIGHESTA:
case elfcpp::R_PPC64_TPREL16_HIGHESTA:
Reloc::addr16_ha3(view, value);
@@ -8117,11 +8126,13 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
if (size == 32)
// R_PPC_EMB_NADDR32, R_PPC_EMB_NADDR16
goto unsupp;
+ // Fall through.
case elfcpp::R_PPC64_TPREL16_DS:
case elfcpp::R_PPC64_TPREL16_LO_DS:
if (size == 32)
// R_PPC_TLSGD, R_PPC_TLSLD
break;
+ // Fall through.
case elfcpp::R_PPC64_ADDR16_DS:
case elfcpp::R_PPC64_ADDR16_LO_DS:
case elfcpp::R_PPC64_TOC16_DS:
diff --git a/gold/resolve.cc b/gold/resolve.cc
index 11f3229..3213333 100644
--- a/gold/resolve.cc
+++ b/gold/resolve.cc
@@ -193,6 +193,7 @@ symbol_to_bits(elfcpp::STB binding, bool is_dynamic,
// table.
gold_error(_("invalid STB_LOCAL symbol in external symbols"));
bits = global_flag;
+ break;
default:
// Any target which wants to handle STB_LOOS, etc., needs to
diff --git a/gold/s390.cc b/gold/s390.cc
index c496018..9f578e4 100644
--- a/gold/s390.cc
+++ b/gold/s390.cc
@@ -2555,7 +2555,7 @@ Target_s390<size>::Scan::local(Symbol_table* symtab,
unsupported_reloc_local(object, r_type);
}
}
- // fall through
+ // Fall through.
case elfcpp::R_390_TLS_IEENT:
case elfcpp::R_390_TLS_GOTIE12:
case elfcpp::R_390_TLS_GOTIE20:
@@ -2993,7 +2993,7 @@ Target_s390<size>::Scan::global(Symbol_table* symtab,
unsupported_reloc_global(object, r_type, gsym);
}
}
- // fall through
+ // Fall through.
case elfcpp::R_390_TLS_IEENT:
case elfcpp::R_390_TLS_GOTIE12:
case elfcpp::R_390_TLS_GOTIE20:
@@ -3241,7 +3241,7 @@ Target_s390<size>::Relocate::relocate(
|| (gsym->is_defined()
&& !gsym->is_from_dynobj()
&& !gsym->is_preemptible()));
- // fallthru
+ // Fall through.
case elfcpp::R_390_8:
case elfcpp::R_390_12:
case elfcpp::R_390_16:
@@ -3270,7 +3270,7 @@ Target_s390<size>::Relocate::relocate(
gold_assert(gsym == NULL
|| gsym->has_plt_offset()
|| gsym->final_value_is_known());
- // fallthru
+ // Fall through.
case elfcpp::R_390_GOTOFF64:
case elfcpp::R_390_GOTOFF32:
case elfcpp::R_390_GOTOFF16:
diff --git a/gold/sparc.cc b/gold/sparc.cc
index 8e66b77..eb8b40c 100644
--- a/gold/sparc.cc
+++ b/gold/sparc.cc
@@ -2305,7 +2305,7 @@ Target_sparc<size, big_endian>::Scan::local(
reloc.get_r_addend(), is_ifunc);
break;
}
- /* Fall through. */
+ // Fall through.
case elfcpp::R_SPARC_HIX22:
case elfcpp::R_SPARC_LOX10:
@@ -2815,6 +2815,7 @@ Target_sparc<size, big_endian>::Scan::global(
// and code transform the GOT load into an addition.
break;
}
+ // Fall through.
case elfcpp::R_SPARC_GOT10:
case elfcpp::R_SPARC_GOT13:
case elfcpp::R_SPARC_GOT22:
@@ -3354,6 +3355,7 @@ Target_sparc<size, big_endian>::Relocate::relocate(
gdop_valid = true;
break;
}
+ // Fall through.
case elfcpp::R_SPARC_GOT10:
case elfcpp::R_SPARC_GOT13:
case elfcpp::R_SPARC_GOT22:
@@ -3475,7 +3477,7 @@ Target_sparc<size, big_endian>::Relocate::relocate(
Reloc::gdop_lox10(view, got_offset);
break;
}
- /* Fall through. */
+ // Fall through.
case elfcpp::R_SPARC_GOT10:
Reloc::lo10(view, got_offset, addend);
break;
@@ -3504,7 +3506,7 @@ Target_sparc<size, big_endian>::Relocate::relocate(
Reloc::gdop_hix22(view, got_offset);
break;
}
- /* Fall through. */
+ // Fall through.
case elfcpp::R_SPARC_GOT22:
Reloc::hi22(view, got_offset, addend);
break;
diff --git a/gold/tilegx.cc b/gold/tilegx.cc
index bb17330..ee262d1 100644
--- a/gold/tilegx.cc
+++ b/gold/tilegx.cc
@@ -4428,6 +4428,7 @@ Target_tilegx<size, big_endian>::Relocate::relocate(
psymval = &symval;
always_apply_relocation = true;
addend = 0;
+ // Fall through.
// when under PIC mode, these relocations are deferred to rtld
case elfcpp::R_TILEGX_IMM16_X0_HW0:
@@ -4618,6 +4619,7 @@ Target_tilegx<size, big_endian>::Relocate::relocate(
got_type = GOT_TYPE_TLS_OFFSET;
have_got_offset = true;
}
+ // Fall through.
do_update_value:
if (have_got_offset) {
if (gsym != NULL) {
diff --git a/gold/x86_64.cc b/gold/x86_64.cc
index 8d494ea..9004aec 100644
--- a/gold/x86_64.cc
+++ b/gold/x86_64.cc
@@ -2361,7 +2361,7 @@ Target_x86_64<size>::Scan::check_non_pic(Relobj* object, unsigned int r_type,
&& !gsym->is_undefined()
&& !gsym->is_preemptible()))
return;
- /* Fall through. */
+ // Fall through.
case elfcpp::R_X86_64_32:
// R_X86_64_32 is OK for x32.
if (size == 32 && r_type == elfcpp::R_X86_64_32)
generated by cgit v1.1 at 2024-11-29 21:21:29 +0000