diff options
Diffstat (limited to 'gdb')
| -rw-r--r-- | gdb/ChangeLog | 8 | ||||
| -rw-r--r-- | gdb/features/riscv/64bit-csr.xml | 65 | ||||
| -rwxr-xr-x | gdb/features/riscv/rebuild-csr-xml.sh | 10 | ||||
| -rw-r--r-- | gdb/riscv-tdep.c | 6 | ||||
| -rw-r--r-- | gdb/riscv-tdep.h | 2 |
5 files changed, 21 insertions, 70 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 40bee39..f8a491b 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,11 @@ +2020-02-20 Nelson Chu <nelson.chu@sifive.com> + + * riscv-tdep.c: Updated since the DECLARE_CSR is changed. + * riscv-tdep.h: Likewise. + * features/riscv/rebuild-csr-xml.sh: Generate the 64bit-csr.xml without + rv32-only CSR. + * features/riscv/64bit-csr.xml: Regenerated. + 2020-02-20 Sergio Durigan Junior <sergiodj@redhat.com> Tom Tromey <tom@tromey.com> diff --git a/gdb/features/riscv/64bit-csr.xml b/gdb/features/riscv/64bit-csr.xml index cf15a7f..8ec0ffe 100644 --- a/gdb/features/riscv/64bit-csr.xml +++ b/gdb/features/riscv/64bit-csr.xml @@ -50,38 +50,6 @@ <reg name="hpmcounter29" bitsize="64"/> <reg name="hpmcounter30" bitsize="64"/> <reg name="hpmcounter31" bitsize="64"/> - <reg name="cycleh" bitsize="64"/> - <reg name="timeh" bitsize="64"/> - <reg name="instreth" bitsize="64"/> - <reg name="hpmcounter3h" bitsize="64"/> - <reg name="hpmcounter4h" bitsize="64"/> - <reg name="hpmcounter5h" bitsize="64"/> - <reg name="hpmcounter6h" bitsize="64"/> - <reg name="hpmcounter7h" bitsize="64"/> - <reg name="hpmcounter8h" bitsize="64"/> - <reg name="hpmcounter9h" bitsize="64"/> - <reg name="hpmcounter10h" bitsize="64"/> - <reg name="hpmcounter11h" bitsize="64"/> - <reg name="hpmcounter12h" bitsize="64"/> - <reg name="hpmcounter13h" bitsize="64"/> - <reg name="hpmcounter14h" bitsize="64"/> - <reg name="hpmcounter15h" bitsize="64"/> - <reg name="hpmcounter16h" bitsize="64"/> - <reg name="hpmcounter17h" bitsize="64"/> - <reg name="hpmcounter18h" bitsize="64"/> - <reg name="hpmcounter19h" bitsize="64"/> - <reg name="hpmcounter20h" bitsize="64"/> - <reg name="hpmcounter21h" bitsize="64"/> - <reg name="hpmcounter22h" bitsize="64"/> - <reg name="hpmcounter23h" bitsize="64"/> - <reg name="hpmcounter24h" bitsize="64"/> - <reg name="hpmcounter25h" bitsize="64"/> - <reg name="hpmcounter26h" bitsize="64"/> - <reg name="hpmcounter27h" bitsize="64"/> - <reg name="hpmcounter28h" bitsize="64"/> - <reg name="hpmcounter29h" bitsize="64"/> - <reg name="hpmcounter30h" bitsize="64"/> - <reg name="hpmcounter31h" bitsize="64"/> <reg name="sstatus" bitsize="64"/> <reg name="sedeleg" bitsize="64"/> <reg name="sideleg" bitsize="64"/> @@ -111,9 +79,7 @@ <reg name="mtval" bitsize="64"/> <reg name="mip" bitsize="64"/> <reg name="pmpcfg0" bitsize="64"/> - <reg name="pmpcfg1" bitsize="64"/> <reg name="pmpcfg2" bitsize="64"/> - <reg name="pmpcfg3" bitsize="64"/> <reg name="pmpaddr0" bitsize="64"/> <reg name="pmpaddr1" bitsize="64"/> <reg name="pmpaddr2" bitsize="64"/> @@ -161,37 +127,6 @@ <reg name="mhpmcounter29" bitsize="64"/> <reg name="mhpmcounter30" bitsize="64"/> <reg name="mhpmcounter31" bitsize="64"/> - <reg name="mcycleh" bitsize="64"/> - <reg name="minstreth" bitsize="64"/> - <reg name="mhpmcounter3h" bitsize="64"/> - <reg name="mhpmcounter4h" bitsize="64"/> - <reg name="mhpmcounter5h" bitsize="64"/> - <reg name="mhpmcounter6h" bitsize="64"/> - <reg name="mhpmcounter7h" bitsize="64"/> - <reg name="mhpmcounter8h" bitsize="64"/> - <reg name="mhpmcounter9h" bitsize="64"/> - <reg name="mhpmcounter10h" bitsize="64"/> - <reg name="mhpmcounter11h" bitsize="64"/> - <reg name="mhpmcounter12h" bitsize="64"/> - <reg name="mhpmcounter13h" bitsize="64"/> - <reg name="mhpmcounter14h" bitsize="64"/> - <reg name="mhpmcounter15h" bitsize="64"/> - <reg name="mhpmcounter16h" bitsize="64"/> - <reg name="mhpmcounter17h" bitsize="64"/> - <reg name="mhpmcounter18h" bitsize="64"/> - <reg name="mhpmcounter19h" bitsize="64"/> - <reg name="mhpmcounter20h" bitsize="64"/> - <reg name="mhpmcounter21h" bitsize="64"/> - <reg name="mhpmcounter22h" bitsize="64"/> - <reg name="mhpmcounter23h" bitsize="64"/> - <reg name="mhpmcounter24h" bitsize="64"/> - <reg name="mhpmcounter25h" bitsize="64"/> - <reg name="mhpmcounter26h" bitsize="64"/> - <reg name="mhpmcounter27h" bitsize="64"/> - <reg name="mhpmcounter28h" bitsize="64"/> - <reg name="mhpmcounter29h" bitsize="64"/> - <reg name="mhpmcounter30h" bitsize="64"/> - <reg name="mhpmcounter31h" bitsize="64"/> <reg name="mhpmevent3" bitsize="64"/> <reg name="mhpmevent4" bitsize="64"/> <reg name="mhpmevent5" bitsize="64"/> diff --git a/gdb/features/riscv/rebuild-csr-xml.sh b/gdb/features/riscv/rebuild-csr-xml.sh index e21aaba..1adb180 100755 --- a/gdb/features/riscv/rebuild-csr-xml.sh +++ b/gdb/features/riscv/rebuild-csr-xml.sh @@ -19,10 +19,18 @@ function gen_csr_xml () <feature name="org.gnu.gdb.riscv.csr"> EOF +if [ "$bitsize" = "64" ]; then grep "^DECLARE_CSR(" ${RISCV_OPC_FILE} \ - | sed -e "s!DECLARE_CSR(\(.*\), .*! <reg name=\"\1\" bitsize=\"$bitsize\"/>!" + | sed /CSR_CLASS_.*_32/d \ + | sed -e "s!DECLARE_CSR(\(.*\), .*, .*! <reg name=\"\1\" bitsize=\"$bitsize\"/>!" echo "</feature>" +else + grep "^DECLARE_CSR(" ${RISCV_OPC_FILE} \ + | sed -e "s!DECLARE_CSR(\(.*\), .*, .*! <reg name=\"\1\" bitsize=\"$bitsize\"/>!" + + echo "</feature>" +fi } gen_csr_xml 32 > ${RISCV_FEATURE_DIR}/32bit-csr.xml diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index 0515729..97741a3 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -240,7 +240,7 @@ static struct riscv_register_feature riscv_csr_feature = { "org.gnu.gdb.riscv.csr", { -#define DECLARE_CSR(NAME,VALUE) \ +#define DECLARE_CSR(NAME,VALUE,CLASS) \ { RISCV_ ## VALUE ## _REGNUM, { # NAME }, false }, #include "opcode/riscv-opc.h" #undef DECLARE_CSR @@ -534,7 +534,7 @@ riscv_register_name (struct gdbarch *gdbarch, int regnum) if (regnum >= RISCV_FIRST_CSR_REGNUM && regnum <= RISCV_LAST_CSR_REGNUM) { -#define DECLARE_CSR(NAME,VALUE) \ +#define DECLARE_CSR(NAME,VALUE,CLASS) \ case RISCV_ ## VALUE ## _REGNUM: return # NAME; switch (regnum) @@ -870,7 +870,7 @@ riscv_is_regnum_a_named_csr (int regnum) switch (regnum) { -#define DECLARE_CSR(name, num) case RISCV_ ## num ## _REGNUM: +#define DECLARE_CSR(name, num, class) case RISCV_ ## num ## _REGNUM: #include "opcode/riscv-opc.h" #undef DECLARE_CSR return true; diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h index aaed33c..90bae08 100644 --- a/gdb/riscv-tdep.h +++ b/gdb/riscv-tdep.h @@ -44,7 +44,7 @@ enum RISCV_LAST_FP_REGNUM = 64, /* Last Floating Point Register */ RISCV_FIRST_CSR_REGNUM = 65, /* First CSR */ -#define DECLARE_CSR(name, num) \ +#define DECLARE_CSR(name, num, class) \ RISCV_ ## num ## _REGNUM = RISCV_FIRST_CSR_REGNUM + num, #include "opcode/riscv-opc.h" #undef DECLARE_CSR |