diff options
Diffstat (limited to 'gdb')
| -rw-r--r-- | gdb/ChangeLog | 8 | ||||
| -rw-r--r-- | gdb/Makefile.in | 2 | ||||
| -rw-r--r-- | gdb/mips-linux-tdep.c | 19 | ||||
| -rw-r--r-- | gdb/mips-tdep.c | 27 |
4 files changed, 53 insertions, 3 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index e327c5f..f1e678a 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,13 @@ 2006-03-15 Daniel Jacobowitz <dan@codesourcery.com> + * mips-linux-tdep.c: Include "floatformat.h". + (mips_linux_init_abi): Use 128-bit long double for N32 and N64. + (mips_n32n64_return_value): Support 128-bit long double. + (print_gp_register_row): Don't print spaces before ignored + or floating point registers. + +2006-03-15 Daniel Jacobowitz <dan@codesourcery.com> + * mips-mdebug-tdep.c (compare_pdr_entries): Use bfd_get_signed_32 for code addresses. (non_heuristic_proc_desc): Likewise. diff --git a/gdb/Makefile.in b/gdb/Makefile.in index 74bdf0b..45139fb 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -2299,7 +2299,7 @@ mips-linux-nat.o: mips-linux-nat.c $(defs_h) $(mips_tdep_h) $(target_h) \ mips-linux-tdep.o: mips-linux-tdep.c $(defs_h) $(gdbcore_h) $(target_h) \ $(solib_svr4_h) $(osabi_h) $(mips_tdep_h) $(gdb_string_h) \ $(gdb_assert_h) $(frame_h) $(regcache_h) $(trad_frame_h) \ - $(tramp_frame_h) + $(tramp_frame_h) $(floatformat_h) mips-mdebug-tdep.o: mips-mdebug-tdep.c $(defs_h) $(frame_h) $(mips_tdep_h) \ $(trad_frame_h) $(block_h) $(symtab_h) $(objfiles_h) $(elf_mips_h) \ $(elf_bfd_h) $(gdb_assert_h) $(frame_unwind_h) $(frame_base_h) \ diff --git a/gdb/mips-linux-tdep.c b/gdb/mips-linux-tdep.c index 021edc7..f2a941c 100644 --- a/gdb/mips-linux-tdep.c +++ b/gdb/mips-linux-tdep.c @@ -32,6 +32,7 @@ #include "regcache.h" #include "trad-frame.h" #include "tramp-frame.h" +#include "floatformat.h" /* Copied from <asm/elf.h>. */ #define ELF_NGREG 45 @@ -1110,6 +1111,15 @@ mips_linux_init_abi (struct gdbarch_info info, set_solib_svr4_fetch_link_map_offsets (gdbarch, svr4_ilp32_fetch_link_map_offsets); set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr); + set_gdbarch_long_double_bit (gdbarch, 128); + /* These floatformats should probably be renamed. MIPS uses + the same 128-bit IEEE floating point format that IA-64 uses, + except that the quiet/signalling NaN bit is reversed (GDB + does not distinguish between quiet and signalling NaNs). */ + if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) + set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big); + else + set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_little); tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n32_rt_sigframe); break; case MIPS_ABI_N64: @@ -1118,6 +1128,15 @@ mips_linux_init_abi (struct gdbarch_info info, set_solib_svr4_fetch_link_map_offsets (gdbarch, svr4_lp64_fetch_link_map_offsets); set_mips_linux_register_addr (gdbarch, mips64_linux_register_addr); + set_gdbarch_long_double_bit (gdbarch, 128); + /* These floatformats should probably be renamed. MIPS uses + the same 128-bit IEEE floating point format that IA-64 uses, + except that the quiet/signalling NaN bit is reversed (GDB + does not distinguish between quiet and signalling NaNs). */ + if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) + set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big); + else + set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_little); tramp_frame_prepend_unwinder (gdbarch, &mips_linux_n64_rt_sigframe); break; default: diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 679dd9d..9b3935f 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -1,7 +1,7 @@ /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger. Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, - 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 + 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU @@ -2911,6 +2911,24 @@ mips_n32n64_return_value (struct gdbarch *gdbarch, || TYPE_LENGTH (type) > 2 * mips_abi_regsize (gdbarch)) return RETURN_VALUE_STRUCT_CONVENTION; else if (TYPE_CODE (type) == TYPE_CODE_FLT + && TYPE_LENGTH (type) == 16 + && tdep->mips_fpu_type != MIPS_FPU_NONE) + { + /* A 128-bit floating-point value fills both $f0 and $f2. The + two registers are used in the same as memory order, so the + eight bytes with the lower memory address are in $f0. */ + if (mips_debug) + fprintf_unfiltered (gdb_stderr, "Return float in $f0 and $f2\n"); + mips_xfer_register (regcache, + NUM_REGS + mips_regnum (current_gdbarch)->fp0, + 8, TARGET_BYTE_ORDER, readbuf, writebuf, 0); + mips_xfer_register (regcache, + NUM_REGS + mips_regnum (current_gdbarch)->fp0 + 2, + 8, TARGET_BYTE_ORDER, readbuf ? readbuf + 8 : readbuf, + writebuf ? writebuf + 8 : writebuf, 0); + return RETURN_VALUE_REGISTER_CONVENTION; + } + else if (TYPE_CODE (type) == TYPE_CODE_FLT && tdep->mips_fpu_type != MIPS_FPU_NONE) { /* A floating-point value belongs in the least significant part @@ -4037,7 +4055,6 @@ print_gp_register_row (struct ui_file *file, struct frame_info *frame, int regnum; /* For GP registers, we print a separate row of names above the vals */ - fprintf_filtered (file, " "); for (col = 0, regnum = start_regnum; col < ncols && regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) { @@ -4046,11 +4063,17 @@ print_gp_register_row (struct ui_file *file, struct frame_info *frame, if (TYPE_CODE (gdbarch_register_type (gdbarch, regnum)) == TYPE_CODE_FLT) break; /* end the row: reached FP register */ + if (col == 0) + fprintf_filtered (file, " "); fprintf_filtered (file, mips_abi_regsize (current_gdbarch) == 8 ? "%17s" : "%9s", REGISTER_NAME (regnum)); col++; } + + if (col == 0) + return regnum; + /* print the R0 to R31 names */ if ((start_regnum % NUM_REGS) < MIPS_NUMREGS) fprintf_filtered (file, "\n R%-4d", start_regnum % NUM_REGS); |