diff options
Diffstat (limited to 'gdb')
-rw-r--r-- | gdb/ChangeLog | 20 | ||||
-rw-r--r-- | gdb/alpha-tdep.c | 3 | ||||
-rw-r--r-- | gdb/alpha-tdep.h | 2 | ||||
-rw-r--r-- | gdb/arm-tdep.c | 4 | ||||
-rw-r--r-- | gdb/cris-tdep.c | 4 | ||||
-rw-r--r-- | gdb/gdbarch.c | 4 | ||||
-rw-r--r-- | gdb/gdbarch.h | 21 | ||||
-rwxr-xr-x | gdb/gdbarch.sh | 21 | ||||
-rw-r--r-- | gdb/infrun.c | 28 | ||||
-rw-r--r-- | gdb/mips-tdep.c | 4 | ||||
-rw-r--r-- | gdb/mips-tdep.h | 2 | ||||
-rw-r--r-- | gdb/rs6000-tdep.c | 3 | ||||
-rw-r--r-- | gdb/rs6000-tdep.h | 4 | ||||
-rw-r--r-- | gdb/sparc-tdep.c | 4 | ||||
-rw-r--r-- | gdb/sparc-tdep.h | 4 | ||||
-rw-r--r-- | gdb/spu-tdep.c | 6 |
16 files changed, 90 insertions, 44 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 6bb1ef8..f0c2734 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,23 @@ +2007-04-12 Luis Machado <luisgpm@br.ibm.com> + + * gdbarch.sh (software_single_step): Change the return type + from void to int and reformatted some comments to <= 80 + columns. + * gdbarch.c, gdbarch.h: Regenerated. + * alpha-tdep.c (alpha_software_single_step): Likewise. + * alpha-tdep.h (alpha_software_single_step): Likewise. + * arm-tdep.c (arm_software_single_step): Likewise. + * cris-tdep.c (cris_software_single_step): Likewise. + * mips-tdep.c (mips_software_single_step): Likewise. + * mips-tdep.h (mips_software_single_step): Likewise. + * rs6000-tdep.c (rs6000_software_single_step): Likewise. + * rs6000-tdep.h (rs6000_software_single_step): Likewise. + * sparc-tdep.c (sparc_software_single_step): Likewise. + * sparc-tdep.h (sparc_software_single_step): Likewise. + * spu-tdep.c (spu_software_single_step): Likewise. + * infrun.c (resume): Check the return value from SOFTWARE_SINGLE_STEP + and act accordingly. + 2007-04-11 Steve Ellcey <sje@cup.hp.com> * configure.ac (build_warnings): Add -Wno-char-subscripts. diff --git a/gdb/alpha-tdep.c b/gdb/alpha-tdep.c index 83e95a1..9c7b621 100644 --- a/gdb/alpha-tdep.c +++ b/gdb/alpha-tdep.c @@ -1518,7 +1518,7 @@ alpha_next_pc (CORE_ADDR pc) return (pc + ALPHA_INSN_SIZE); } -void +int alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p) { static CORE_ADDR next_pc; @@ -1536,6 +1536,7 @@ alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p) remove_single_step_breakpoints (); write_pc (next_pc); } + return 1; } diff --git a/gdb/alpha-tdep.h b/gdb/alpha-tdep.h index 861b4b4..4967059 100644 --- a/gdb/alpha-tdep.h +++ b/gdb/alpha-tdep.h @@ -107,7 +107,7 @@ struct gdbarch_tdep }; extern unsigned int alpha_read_insn (CORE_ADDR pc); -extern void alpha_software_single_step (enum target_signal, int); +extern int alpha_software_single_step (enum target_signal, int); extern CORE_ADDR alpha_after_prologue (CORE_ADDR pc); extern void alpha_mdebug_init_abi (struct gdbarch_info, struct gdbarch *); diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 22a08f8..fda2669 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -1907,7 +1907,7 @@ arm_get_next_pc (CORE_ADDR pc) single_step() is also called just after the inferior stops. If we had set up a simulated single-step, we undo our damage. */ -static void +static int arm_software_single_step (enum target_signal sig, int insert_bpt) { /* NOTE: This may insert the wrong breakpoint instruction when @@ -1922,6 +1922,8 @@ arm_software_single_step (enum target_signal sig, int insert_bpt) } else remove_single_step_breakpoints (); + + return 1; } #include "bfd-in2.h" diff --git a/gdb/cris-tdep.c b/gdb/cris-tdep.c index 6175123..51a1cc8 100644 --- a/gdb/cris-tdep.c +++ b/gdb/cris-tdep.c @@ -2119,7 +2119,7 @@ find_step_target (inst_env_type *inst_env) digs through the opcodes in order to find all possible targets. Either one ordinary target or two targets for branches may be found. */ -static void +static int cris_software_single_step (enum target_signal ignore, int insert_breakpoints) { inst_env_type inst_env; @@ -2152,6 +2152,8 @@ cris_software_single_step (enum target_signal ignore, int insert_breakpoints) } else remove_single_step_breakpoints (); + + return 1; } /* Calculates the prefix value for quick offset addressing mode. */ diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c index 99f6ddf..2c4fe63 100644 --- a/gdb/gdbarch.c +++ b/gdb/gdbarch.c @@ -3289,14 +3289,14 @@ gdbarch_software_single_step_p (struct gdbarch *gdbarch) return gdbarch->software_single_step != NULL; } -void +int gdbarch_software_single_step (struct gdbarch *gdbarch, enum target_signal sig, int insert_breakpoints_p) { gdb_assert (gdbarch != NULL); gdb_assert (gdbarch->software_single_step != NULL); if (gdbarch_debug >= 2) fprintf_unfiltered (gdb_stdlog, "gdbarch_software_single_step called\n"); - gdbarch->software_single_step (sig, insert_breakpoints_p); + return gdbarch->software_single_step (sig, insert_breakpoints_p); } void diff --git a/gdb/gdbarch.h b/gdb/gdbarch.h index 2c9bc57..1f7bb3a 100644 --- a/gdb/gdbarch.h +++ b/gdb/gdbarch.h @@ -1144,14 +1144,19 @@ extern void set_gdbarch_smash_text_address (struct gdbarch *gdbarch, gdbarch_sma #define SMASH_TEXT_ADDRESS(addr) (gdbarch_smash_text_address (current_gdbarch, addr)) #endif -/* FIXME/cagney/2001-01-18: This should be split in two. A target method that indicates if - the target needs software single step. An ISA method to implement it. +/* FIXME/cagney/2001-01-18: This should be split in two. A target method that + indicates if the target needs software single step. An ISA method to + implement it. - FIXME/cagney/2001-01-18: This should be replaced with something that inserts breakpoints - using the breakpoint system instead of blatting memory directly (as with rs6000). + FIXME/cagney/2001-01-18: This should be replaced with something that inserts + breakpoints using the breakpoint system instead of blatting memory directly + (as with rs6000). - FIXME/cagney/2001-01-18: The logic is backwards. It should be asking if the target can - single step. If not, then implement single step using breakpoints. */ + FIXME/cagney/2001-01-18: The logic is backwards. It should be asking if the + target can single step. If not, then implement single step using breakpoints. + + A return value of 1 means that the software_single_step breakpoints + were inserted; 0 means they were not. */ #if defined (SOFTWARE_SINGLE_STEP) /* Legacy for systems yet to multi-arch SOFTWARE_SINGLE_STEP */ @@ -1168,8 +1173,8 @@ extern int gdbarch_software_single_step_p (struct gdbarch *gdbarch); #define SOFTWARE_SINGLE_STEP_P() (gdbarch_software_single_step_p (current_gdbarch)) #endif -typedef void (gdbarch_software_single_step_ftype) (enum target_signal sig, int insert_breakpoints_p); -extern void gdbarch_software_single_step (struct gdbarch *gdbarch, enum target_signal sig, int insert_breakpoints_p); +typedef int (gdbarch_software_single_step_ftype) (enum target_signal sig, int insert_breakpoints_p); +extern int gdbarch_software_single_step (struct gdbarch *gdbarch, enum target_signal sig, int insert_breakpoints_p); extern void set_gdbarch_software_single_step (struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step); #if !defined (GDB_TM_FILE) && defined (SOFTWARE_SINGLE_STEP) #error "Non multi-arch definition of SOFTWARE_SINGLE_STEP" diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh index e65716c..0bcbd73 100755 --- a/gdb/gdbarch.sh +++ b/gdb/gdbarch.sh @@ -614,15 +614,22 @@ f:=:CORE_ADDR:addr_bits_remove:CORE_ADDR addr:addr::core_addr_identity::0 # It is not at all clear why SMASH_TEXT_ADDRESS is not folded into # ADDR_BITS_REMOVE. f:=:CORE_ADDR:smash_text_address:CORE_ADDR addr:addr::core_addr_identity::0 -# FIXME/cagney/2001-01-18: This should be split in two. A target method that indicates if -# the target needs software single step. An ISA method to implement it. + +# FIXME/cagney/2001-01-18: This should be split in two. A target method that +# indicates if the target needs software single step. An ISA method to +# implement it. +# +# FIXME/cagney/2001-01-18: This should be replaced with something that inserts +# breakpoints using the breakpoint system instead of blatting memory directly +# (as with rs6000). # -# FIXME/cagney/2001-01-18: This should be replaced with something that inserts breakpoints -# using the breakpoint system instead of blatting memory directly (as with rs6000). +# FIXME/cagney/2001-01-18: The logic is backwards. It should be asking if the +# target can single step. If not, then implement single step using breakpoints. # -# FIXME/cagney/2001-01-18: The logic is backwards. It should be asking if the target can -# single step. If not, then implement single step using breakpoints. -F:=:void:software_single_step:enum target_signal sig, int insert_breakpoints_p:sig, insert_breakpoints_p +# A return value of 1 means that the software_single_step breakpoints +# were inserted; 0 means they were not. +F:=:int:software_single_step:enum target_signal sig, int insert_breakpoints_p:sig, insert_breakpoints_p + # Return non-zero if the processor is executing a delay slot and a # further single-step is needed before the instruction finishes. M::int:single_step_through_delay:struct frame_info *frame:frame diff --git a/gdb/infrun.c b/gdb/infrun.c index 8fd0376..91198b7 100644 --- a/gdb/infrun.c +++ b/gdb/infrun.c @@ -548,14 +548,16 @@ resume (int step, enum target_signal sig) if (SOFTWARE_SINGLE_STEP_P () && step) { /* Do it the hard way, w/temp breakpoints */ - SOFTWARE_SINGLE_STEP (sig, 1 /*insert-breakpoints */ ); - /* ...and don't ask hardware to do it. */ - step = 0; - /* and do not pull these breakpoints until after a `wait' in - `wait_for_inferior' */ - singlestep_breakpoints_inserted_p = 1; - singlestep_ptid = inferior_ptid; - singlestep_pc = read_pc (); + if (SOFTWARE_SINGLE_STEP (sig, 1 /*insert-breakpoints */ )) + { + /* ...and don't ask hardware to do it. */ + step = 0; + /* and do not pull these breakpoints until after a `wait' in + `wait_for_inferior' */ + singlestep_breakpoints_inserted_p = 1; + singlestep_ptid = inferior_ptid; + singlestep_pc = read_pc (); + } } /* If there were any forks/vforks/execs that were caught and are @@ -1378,7 +1380,7 @@ handle_inferior_event (struct execution_control_state *ecs) (LONGEST) ecs->ws.value.integer)); gdb_flush (gdb_stdout); target_mourn_inferior (); - singlestep_breakpoints_inserted_p = 0; /*SOFTWARE_SINGLE_STEP_P() */ + singlestep_breakpoints_inserted_p = 0; /* SOFTWARE_SINGLE_STEP_P() */ stop_print_frame = 0; stop_stepping (ecs); return; @@ -1398,7 +1400,7 @@ handle_inferior_event (struct execution_control_state *ecs) target_mourn_inferior (); print_stop_reason (SIGNAL_EXITED, stop_signal); - singlestep_breakpoints_inserted_p = 0; /*SOFTWARE_SINGLE_STEP_P() */ + singlestep_breakpoints_inserted_p = 0; /* SOFTWARE_SINGLE_STEP_P() */ stop_stepping (ecs); return; @@ -1569,7 +1571,7 @@ handle_inferior_event (struct execution_control_state *ecs) if (debug_infrun) fprintf_unfiltered (gdb_stdlog, "infrun: stepping_past_singlestep_breakpoint\n"); /* Pull the single step breakpoints out of the target. */ - SOFTWARE_SINGLE_STEP (0, 0); + (void) SOFTWARE_SINGLE_STEP (0, 0); singlestep_breakpoints_inserted_p = 0; ecs->random_signal = 0; @@ -1678,7 +1680,7 @@ handle_inferior_event (struct execution_control_state *ecs) if (SOFTWARE_SINGLE_STEP_P () && singlestep_breakpoints_inserted_p) { /* Pull the single step breakpoints out of the target. */ - SOFTWARE_SINGLE_STEP (0, 0); + (void) SOFTWARE_SINGLE_STEP (0, 0); singlestep_breakpoints_inserted_p = 0; } @@ -1749,7 +1751,7 @@ handle_inferior_event (struct execution_control_state *ecs) if (SOFTWARE_SINGLE_STEP_P () && singlestep_breakpoints_inserted_p) { /* Pull the single step breakpoints out of the target. */ - SOFTWARE_SINGLE_STEP (0, 0); + (void) SOFTWARE_SINGLE_STEP (0, 0); singlestep_breakpoints_inserted_p = 0; } diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 09be223..f27a457 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -2204,7 +2204,7 @@ mips_addr_bits_remove (CORE_ADDR addr) single_step is also called just after the inferior stops. If we had set up a simulated single-step, we undo our damage. */ -void +int mips_software_single_step (enum target_signal sig, int insert_breakpoints_p) { CORE_ADDR pc, next_pc; @@ -2218,6 +2218,8 @@ mips_software_single_step (enum target_signal sig, int insert_breakpoints_p) } else remove_single_step_breakpoints (); + + return 1; } /* Test whether the PC points to the return instruction at the diff --git a/gdb/mips-tdep.h b/gdb/mips-tdep.h index a0bafa3..4fb6ba7 100644 --- a/gdb/mips-tdep.h +++ b/gdb/mips-tdep.h @@ -100,7 +100,7 @@ enum }; /* Single step based on where the current instruction will take us. */ -extern void mips_software_single_step (enum target_signal, int); +extern int mips_software_single_step (enum target_signal, int); /* Tell if the program counter value in MEMADDR is in a MIPS16 function. */ diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c index 73dffee..eb5c8b4 100644 --- a/gdb/rs6000-tdep.c +++ b/gdb/rs6000-tdep.c @@ -722,7 +722,7 @@ rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size) /* AIX does not support PT_STEP. Simulate it. */ -void +int rs6000_software_single_step (enum target_signal signal, int insert_breakpoints_p) { @@ -761,6 +761,7 @@ rs6000_software_single_step (enum target_signal signal, errno = 0; /* FIXME, don't ignore errors! */ /* What errors? {read,write}_memory call error(). */ + return 1; } diff --git a/gdb/rs6000-tdep.h b/gdb/rs6000-tdep.h index f655f63..569fa18 100644 --- a/gdb/rs6000-tdep.h +++ b/gdb/rs6000-tdep.h @@ -21,8 +21,8 @@ #include "defs.h" -extern void rs6000_software_single_step (enum target_signal signal, - int insert_breakpoints_p); +extern int rs6000_software_single_step (enum target_signal signal, + int insert_breakpoints_p); /* Hook in rs6000-tdep.c for determining the TOC address when calling functions in the inferior. */ diff --git a/gdb/sparc-tdep.c b/gdb/sparc-tdep.c index 9f934b3..3d2d97b 100644 --- a/gdb/sparc-tdep.c +++ b/gdb/sparc-tdep.c @@ -1329,7 +1329,7 @@ sparc_step_trap (unsigned long insn) return 0; } -void +int sparc_software_single_step (enum target_signal sig, int insert_breakpoints_p) { struct gdbarch *arch = current_gdbarch; @@ -1359,6 +1359,8 @@ sparc_software_single_step (enum target_signal sig, int insert_breakpoints_p) } else remove_single_step_breakpoints (); + + return 1; } static void diff --git a/gdb/sparc-tdep.h b/gdb/sparc-tdep.h index df613c1..e1e97c4 100644 --- a/gdb/sparc-tdep.h +++ b/gdb/sparc-tdep.h @@ -167,8 +167,8 @@ extern struct sparc_frame_cache * -extern void sparc_software_single_step (enum target_signal sig, - int insert_breakpoints_p); +extern int sparc_software_single_step (enum target_signal sig, + int insert_breakpoints_p); extern void sparc_supply_rwindow (struct regcache *regcache, CORE_ADDR sp, int regnum); diff --git a/gdb/spu-tdep.c b/gdb/spu-tdep.c index 5f584ea..7e72275 100644 --- a/gdb/spu-tdep.c +++ b/gdb/spu-tdep.c @@ -1078,7 +1078,7 @@ spu_breakpoint_from_pc (CORE_ADDR * pcptr, int *lenptr) /* Software single-stepping support. */ -void +int spu_software_single_step (enum target_signal signal, int insert_breakpoints_p) { if (insert_breakpoints_p) @@ -1093,7 +1093,7 @@ spu_software_single_step (enum target_signal signal, int insert_breakpoints_p) pc = extract_unsigned_integer (buf, 4) & -4; if (target_read_memory (pc, buf, 4)) - return; + return 1; insn = extract_unsigned_integer (buf, 4); /* Next sequential instruction is at PC + 4, except if the current @@ -1125,6 +1125,8 @@ spu_software_single_step (enum target_signal signal, int insert_breakpoints_p) } else remove_single_step_breakpoints (); + + return 1; } |