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-rw-r--r--gdb/config/mips/tm-mips.h13
-rw-r--r--gdb/config/sparc/tm-sparc.h6
2 files changed, 19 insertions, 0 deletions
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h
index d8b2bd1..39c6623 100644
--- a/gdb/config/mips/tm-mips.h
+++ b/gdb/config/mips/tm-mips.h
@@ -496,3 +496,16 @@ extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *));
/* Convert a ecoff register number to a gdb REGNUM */
#define ECOFF_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)
+
+/* If the current gcc for for this target does not produce correct debugging
+ information for float parameters, both prototyped and unprototyped, then
+ define this macro. This forces gdb to always assume that floats are
+ passed as doubles and then converted in the callee.
+
+ For the mips chip, it appears that the debug info marks the parameters as
+ floats regardless of whether the function is prototyped, but the actual
+ values are passed as doubles for the non-prototyped case and floats for
+ the prototyped case. Thus we choose to make the non-prototyped case work
+ and break the prototyped case. (FIXME). */
+
+#define COERCE_FLOAT_TO_DOUBLE 1
diff --git a/gdb/config/sparc/tm-sparc.h b/gdb/config/sparc/tm-sparc.h
index a106f0c..5081064 100644
--- a/gdb/config/sparc/tm-sparc.h
+++ b/gdb/config/sparc/tm-sparc.h
@@ -634,3 +634,9 @@ extern int deferred_stores;
target_store_registers (-2);
#define CLEAR_DEFERRED_STORES \
deferred_stores = 0;
+
+/* If the current gcc for for this target does not produce correct debugging
+ information for float parameters, both prototyped and unprototyped, then
+ define this macro. This forces gdb to always assume that floats are
+ passed as doubles and then converted in the callee. */
+#define COERCE_FLOAT_TO_DOUBLE 1